100 	struct fsl_esai *esai_priv = (struct fsl_esai *)devid;  in esai_isr()  local
101 	struct platform_device *pdev = esai_priv->pdev;  in esai_isr()
105 	regmap_read(esai_priv->regmap, REG_ESAI_ESR, &esr);  in esai_isr()
106 	regmap_read(esai_priv->regmap, REG_ESAI_SAISR, &saisr);  in esai_isr()
109 	    esai_priv->soc->reset_at_xrun) {  in esai_isr()
111 		regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR,  in esai_isr()
113 		regmap_update_bits(esai_priv->regmap, REG_ESAI_RCR,  in esai_isr()
115 		schedule_work(&esai_priv->work);  in esai_isr()
168 	struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai);  in fsl_esai_divisor_cal()  local
234 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xCCR(tx),  in fsl_esai_divisor_cal()
243 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xCCR(tx),  in fsl_esai_divisor_cal()
262 	struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai);  in fsl_esai_set_dai_sysclk()  local
263 	struct clk *clksrc = esai_priv->extalclk;  in fsl_esai_set_dai_sysclk()
264 	bool tx = (clk_id <= ESAI_HCKT_EXTAL || esai_priv->synchronous);  in fsl_esai_set_dai_sysclk()
277 	if (freq == esai_priv->hck_rate[tx] && dir == esai_priv->hck_dir[tx])  in fsl_esai_set_dai_sysclk()
281 	esai_priv->sck_div[tx] = true;  in fsl_esai_set_dai_sysclk()
284 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xCCR(tx),  in fsl_esai_set_dai_sysclk()
293 		clksrc = esai_priv->fsysclk;  in fsl_esai_set_dai_sysclk()
299 		ecr |= esai_priv->synchronous ? ESAI_ECR_ETI : ESAI_ECR_ERI;  in fsl_esai_set_dai_sysclk()
328 	if (ratio == 1 && clksrc == esai_priv->extalclk) {  in fsl_esai_set_dai_sysclk()
343 	esai_priv->sck_div[tx] = false;  in fsl_esai_set_dai_sysclk()
346 	esai_priv->hck_dir[tx] = dir;  in fsl_esai_set_dai_sysclk()
347 	esai_priv->hck_rate[tx] = freq;  in fsl_esai_set_dai_sysclk()
349 	regmap_update_bits(esai_priv->regmap, REG_ESAI_ECR,  in fsl_esai_set_dai_sysclk()
364 	struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai);  in fsl_esai_set_bclk()  local
365 	u32 hck_rate = esai_priv->hck_rate[tx];  in fsl_esai_set_bclk()
370 	if (esai_priv->consumer_mode || esai_priv->sck_rate[tx] == freq)  in fsl_esai_set_bclk()
388 	if (!esai_priv->sck_div[tx] && (ratio > 16 || ratio == 0)) {  in fsl_esai_set_bclk()
394 			esai_priv->sck_div[tx] ? 0 : ratio);  in fsl_esai_set_bclk()
399 	esai_priv->sck_rate[tx] = freq;  in fsl_esai_set_bclk()
407 	struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai);  in fsl_esai_set_dai_tdm_slot()  local
409 	regmap_update_bits(esai_priv->regmap, REG_ESAI_TCCR,  in fsl_esai_set_dai_tdm_slot()
412 	regmap_update_bits(esai_priv->regmap, REG_ESAI_RCCR,  in fsl_esai_set_dai_tdm_slot()
415 	esai_priv->slot_width = slot_width;  in fsl_esai_set_dai_tdm_slot()
416 	esai_priv->slots = slots;  in fsl_esai_set_dai_tdm_slot()
417 	esai_priv->tx_mask = tx_mask;  in fsl_esai_set_dai_tdm_slot()
418 	esai_priv->rx_mask = rx_mask;  in fsl_esai_set_dai_tdm_slot()
425 	struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai);  in fsl_esai_set_dai_fmt()  local
479 	esai_priv->consumer_mode = false;  in fsl_esai_set_dai_fmt()
484 		esai_priv->consumer_mode = true;  in fsl_esai_set_dai_fmt()
500 	regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR, mask, xcr);  in fsl_esai_set_dai_fmt()
501 	regmap_update_bits(esai_priv->regmap, REG_ESAI_RCR, mask, xcr);  in fsl_esai_set_dai_fmt()
505 	regmap_update_bits(esai_priv->regmap, REG_ESAI_TCCR, mask, xccr);  in fsl_esai_set_dai_fmt()
506 	regmap_update_bits(esai_priv->regmap, REG_ESAI_RCCR, mask, xccr);  in fsl_esai_set_dai_fmt()
514 	struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai);  in fsl_esai_startup()  local
518 		regmap_update_bits(esai_priv->regmap, REG_ESAI_SAICR,  in fsl_esai_startup()
519 				   ESAI_SAICR_SYNC, esai_priv->synchronous ?  in fsl_esai_startup()
523 		regmap_update_bits(esai_priv->regmap, REG_ESAI_TCCR,  in fsl_esai_startup()
525 				   ESAI_xCCR_xDC(esai_priv->slots));  in fsl_esai_startup()
526 		regmap_update_bits(esai_priv->regmap, REG_ESAI_RCCR,  in fsl_esai_startup()
528 				   ESAI_xCCR_xDC(esai_priv->slots));  in fsl_esai_startup()
539 	struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai);  in fsl_esai_hw_params()  local
543 	u32 pins = DIV_ROUND_UP(channels, esai_priv->slots);  in fsl_esai_hw_params()
549 	if (esai_priv->slot_width)  in fsl_esai_hw_params()
550 		slot_width = esai_priv->slot_width;  in fsl_esai_hw_params()
552 	bclk = params_rate(params) * slot_width * esai_priv->slots;  in fsl_esai_hw_params()
554 	ret = fsl_esai_set_bclk(dai, esai_priv->synchronous || tx, bclk);  in fsl_esai_hw_params()
561 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx), mask, val);  in fsl_esai_hw_params()
563 	if (!tx && esai_priv->synchronous)  in fsl_esai_hw_params()
564 		regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR, mask, val);  in fsl_esai_hw_params()
567 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx),  in fsl_esai_hw_params()
571 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xFCR(tx),  in fsl_esai_hw_params()
576 	val = ESAI_xFCR_xWA(width) | ESAI_xFCR_xFWM(esai_priv->fifo_depth) |  in fsl_esai_hw_params()
579 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xFCR(tx), mask, val);  in fsl_esai_hw_params()
582 		regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR,  in fsl_esai_hw_params()
586 	regmap_update_bits(esai_priv->regmap, REG_ESAI_PRRC,  in fsl_esai_hw_params()
588 	regmap_update_bits(esai_priv->regmap, REG_ESAI_PCRC,  in fsl_esai_hw_params()
593 static int fsl_esai_hw_init(struct fsl_esai *esai_priv)  in fsl_esai_hw_init()  argument
595 	struct platform_device *pdev = esai_priv->pdev;  in fsl_esai_hw_init()
599 	ret = regmap_update_bits(esai_priv->regmap, REG_ESAI_ECR,  in fsl_esai_hw_init()
611 	ret = regmap_update_bits(esai_priv->regmap, REG_ESAI_ECR,  in fsl_esai_hw_init()
619 	regmap_update_bits(esai_priv->regmap, REG_ESAI_PRRC,  in fsl_esai_hw_init()
621 	regmap_update_bits(esai_priv->regmap, REG_ESAI_PCRC,  in fsl_esai_hw_init()
627 static int fsl_esai_register_restore(struct fsl_esai *esai_priv)  in fsl_esai_register_restore()  argument
632 	regmap_update_bits(esai_priv->regmap, REG_ESAI_TFCR,  in fsl_esai_register_restore()
634 	regmap_update_bits(esai_priv->regmap, REG_ESAI_RFCR,  in fsl_esai_register_restore()
637 	regcache_mark_dirty(esai_priv->regmap);  in fsl_esai_register_restore()
638 	ret = regcache_sync(esai_priv->regmap);  in fsl_esai_register_restore()
643 	regmap_update_bits(esai_priv->regmap, REG_ESAI_TFCR, ESAI_xFCR_xFR, 0);  in fsl_esai_register_restore()
644 	regmap_update_bits(esai_priv->regmap, REG_ESAI_RFCR, ESAI_xFCR_xFR, 0);  in fsl_esai_register_restore()
649 static void fsl_esai_trigger_start(struct fsl_esai *esai_priv, bool tx)  in fsl_esai_trigger_start()  argument
651 	u8 i, channels = esai_priv->channels[tx];  in fsl_esai_trigger_start()
652 	u32 pins = DIV_ROUND_UP(channels, esai_priv->slots);  in fsl_esai_trigger_start()
655 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xFCR(tx),  in fsl_esai_trigger_start()
660 		regmap_write(esai_priv->regmap, REG_ESAI_ETDR, 0x0);  in fsl_esai_trigger_start()
674 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx),  in fsl_esai_trigger_start()
677 	mask = tx ? esai_priv->tx_mask : esai_priv->rx_mask;  in fsl_esai_trigger_start()
679 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xSMB(tx),  in fsl_esai_trigger_start()
681 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xSMA(tx),  in fsl_esai_trigger_start()
685 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx),  in fsl_esai_trigger_start()
689 static void fsl_esai_trigger_stop(struct fsl_esai *esai_priv, bool tx)  in fsl_esai_trigger_stop()  argument
691 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx),  in fsl_esai_trigger_stop()
694 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx),  in fsl_esai_trigger_stop()
696 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xSMA(tx),  in fsl_esai_trigger_stop()
698 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xSMB(tx),  in fsl_esai_trigger_stop()
702 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xFCR(tx),  in fsl_esai_trigger_stop()
704 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xFCR(tx),  in fsl_esai_trigger_stop()
710 	struct fsl_esai *esai_priv = container_of(work, struct fsl_esai, work);  in fsl_esai_hw_reset()  local
715 	spin_lock_irqsave(&esai_priv->lock, lock_flags);  in fsl_esai_hw_reset()
717 	regmap_read(esai_priv->regmap, REG_ESAI_TFCR, &tfcr);  in fsl_esai_hw_reset()
718 	regmap_read(esai_priv->regmap, REG_ESAI_RFCR, &rfcr);  in fsl_esai_hw_reset()
723 	fsl_esai_trigger_stop(esai_priv, tx);  in fsl_esai_hw_reset()
724 	fsl_esai_trigger_stop(esai_priv, rx);  in fsl_esai_hw_reset()
727 	fsl_esai_hw_init(esai_priv);  in fsl_esai_hw_reset()
730 	regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR,  in fsl_esai_hw_reset()
732 	regmap_update_bits(esai_priv->regmap, REG_ESAI_RCR,  in fsl_esai_hw_reset()
736 	fsl_esai_register_restore(esai_priv);  in fsl_esai_hw_reset()
739 	regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR,  in fsl_esai_hw_reset()
741 	regmap_update_bits(esai_priv->regmap, REG_ESAI_RCR,  in fsl_esai_hw_reset()
743 	regmap_update_bits(esai_priv->regmap, REG_ESAI_PRRC,  in fsl_esai_hw_reset()
745 	regmap_update_bits(esai_priv->regmap, REG_ESAI_PCRC,  in fsl_esai_hw_reset()
750 		fsl_esai_trigger_start(esai_priv, tx);  in fsl_esai_hw_reset()
752 		fsl_esai_trigger_start(esai_priv, rx);  in fsl_esai_hw_reset()
754 	spin_unlock_irqrestore(&esai_priv->lock, lock_flags);  in fsl_esai_hw_reset()
760 	struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai);  in fsl_esai_trigger()  local
764 	esai_priv->channels[tx] = substream->runtime->channels;  in fsl_esai_trigger()
770 		spin_lock_irqsave(&esai_priv->lock, lock_flags);  in fsl_esai_trigger()
771 		fsl_esai_trigger_start(esai_priv, tx);  in fsl_esai_trigger()
772 		spin_unlock_irqrestore(&esai_priv->lock, lock_flags);  in fsl_esai_trigger()
777 		spin_lock_irqsave(&esai_priv->lock, lock_flags);  in fsl_esai_trigger()
778 		fsl_esai_trigger_stop(esai_priv, tx);  in fsl_esai_trigger()
779 		spin_unlock_irqrestore(&esai_priv->lock, lock_flags);  in fsl_esai_trigger()
790 	struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai);  in fsl_esai_dai_probe()  local
792 	snd_soc_dai_init_dma_data(dai, &esai_priv->dma_params_tx,  in fsl_esai_dai_probe()
793 				  &esai_priv->dma_params_rx);  in fsl_esai_dai_probe()
957 	struct fsl_esai *esai_priv;  in fsl_esai_probe()  local
963 	esai_priv = devm_kzalloc(&pdev->dev, sizeof(*esai_priv), GFP_KERNEL);  in fsl_esai_probe()
964 	if (!esai_priv)  in fsl_esai_probe()
967 	esai_priv->pdev = pdev;  in fsl_esai_probe()
968 	snprintf(esai_priv->name, sizeof(esai_priv->name), "%pOFn", np);  in fsl_esai_probe()
970 	esai_priv->soc = of_device_get_match_data(&pdev->dev);  in fsl_esai_probe()
977 	esai_priv->regmap = devm_regmap_init_mmio(&pdev->dev, regs, &fsl_esai_regmap_config);  in fsl_esai_probe()
978 	if (IS_ERR(esai_priv->regmap)) {  in fsl_esai_probe()
980 				PTR_ERR(esai_priv->regmap));  in fsl_esai_probe()
981 		return PTR_ERR(esai_priv->regmap);  in fsl_esai_probe()
984 	esai_priv->coreclk = devm_clk_get(&pdev->dev, "core");  in fsl_esai_probe()
985 	if (IS_ERR(esai_priv->coreclk)) {  in fsl_esai_probe()
987 				PTR_ERR(esai_priv->coreclk));  in fsl_esai_probe()
988 		return PTR_ERR(esai_priv->coreclk);  in fsl_esai_probe()
991 	esai_priv->extalclk = devm_clk_get(&pdev->dev, "extal");  in fsl_esai_probe()
992 	if (IS_ERR(esai_priv->extalclk))  in fsl_esai_probe()
994 				PTR_ERR(esai_priv->extalclk));  in fsl_esai_probe()
996 	esai_priv->fsysclk = devm_clk_get(&pdev->dev, "fsys");  in fsl_esai_probe()
997 	if (IS_ERR(esai_priv->fsysclk))  in fsl_esai_probe()
999 				PTR_ERR(esai_priv->fsysclk));  in fsl_esai_probe()
1001 	esai_priv->spbaclk = devm_clk_get(&pdev->dev, "spba");  in fsl_esai_probe()
1002 	if (IS_ERR(esai_priv->spbaclk))  in fsl_esai_probe()
1004 				PTR_ERR(esai_priv->spbaclk));  in fsl_esai_probe()
1011 			       esai_priv->name, esai_priv);  in fsl_esai_probe()
1018 	esai_priv->slots = 2;  in fsl_esai_probe()
1021 	esai_priv->consumer_mode = true;  in fsl_esai_probe()
1026 		esai_priv->fifo_depth = be32_to_cpup(iprop);  in fsl_esai_probe()
1028 		esai_priv->fifo_depth = 64;  in fsl_esai_probe()
1030 	esai_priv->dma_params_tx.maxburst = 16;  in fsl_esai_probe()
1031 	esai_priv->dma_params_rx.maxburst = 16;  in fsl_esai_probe()
1032 	esai_priv->dma_params_tx.addr = res->start + REG_ESAI_ETDR;  in fsl_esai_probe()
1033 	esai_priv->dma_params_rx.addr = res->start + REG_ESAI_ERDR;  in fsl_esai_probe()
1035 	esai_priv->synchronous =  in fsl_esai_probe()
1039 	if (esai_priv->synchronous) {  in fsl_esai_probe()
1045 	dev_set_drvdata(&pdev->dev, esai_priv);  in fsl_esai_probe()
1046 	spin_lock_init(&esai_priv->lock);  in fsl_esai_probe()
1058 	ret = fsl_esai_hw_init(esai_priv);  in fsl_esai_probe()
1062 	esai_priv->tx_mask = 0xFFFFFFFF;  in fsl_esai_probe()
1063 	esai_priv->rx_mask = 0xFFFFFFFF;  in fsl_esai_probe()
1066 	regmap_write(esai_priv->regmap, REG_ESAI_TSMA, 0);  in fsl_esai_probe()
1067 	regmap_write(esai_priv->regmap, REG_ESAI_TSMB, 0);  in fsl_esai_probe()
1068 	regmap_write(esai_priv->regmap, REG_ESAI_RSMA, 0);  in fsl_esai_probe()
1069 	regmap_write(esai_priv->regmap, REG_ESAI_RSMB, 0);  in fsl_esai_probe()
1092 	INIT_WORK(&esai_priv->work, fsl_esai_hw_reset);  in fsl_esai_probe()
1106 	struct fsl_esai *esai_priv = platform_get_drvdata(pdev);  in fsl_esai_remove()  local
1112 	cancel_work_sync(&esai_priv->work);  in fsl_esai_remove()