Lines Matching refs:CLS_H_NORMAL
252 case CLS_H_NORMAL: in wcd_clsh_set_gain_path()
280 case CLS_H_NORMAL: in wcd_clsh_v2_set_hph_mode()
323 case CLS_H_NORMAL: in wcd_clsh_v3_set_hph_mode()
504 wcd_clsh_v3_set_flyback_mode(component, CLS_H_NORMAL); in wcd_clsh_v3_state_aux()
505 wcd_clsh_v3_set_buck_mode(component, CLS_H_NORMAL); in wcd_clsh_v3_state_aux()
530 wcd_clsh_set_flyback_mode(comp, CLS_H_NORMAL); in wcd_clsh_state_lo()
531 wcd_clsh_set_buck_mode(comp, CLS_H_NORMAL); in wcd_clsh_state_lo()
532 wcd_clsh_set_buck_regulator_mode(comp, CLS_H_NORMAL); in wcd_clsh_state_lo()
541 if (mode == CLS_H_NORMAL) { in wcd_clsh_v3_state_hph_r()
557 wcd_clsh_v3_set_hph_mode(component, CLS_H_NORMAL); in wcd_clsh_v3_state_hph_r()
560 wcd_clsh_v3_flyback_ctrl(component, ctrl, CLS_H_NORMAL, false); in wcd_clsh_v3_state_hph_r()
561 wcd_clsh_v3_buck_ctrl(component, ctrl, CLS_H_NORMAL, false); in wcd_clsh_v3_state_hph_r()
562 wcd_clsh_v3_force_iq_ctl(component, CLS_H_NORMAL, false); in wcd_clsh_v3_state_hph_r()
563 wcd_clsh_v3_set_flyback_mode(component, CLS_H_NORMAL); in wcd_clsh_v3_state_hph_r()
564 wcd_clsh_v3_set_buck_mode(component, CLS_H_NORMAL); in wcd_clsh_v3_state_hph_r()
573 if (mode == CLS_H_NORMAL) { in wcd_clsh_state_hph_r()
608 wcd_clsh_v2_set_hph_mode(comp, CLS_H_NORMAL); in wcd_clsh_state_hph_r()
618 wcd_clsh_buck_ctrl(ctrl, CLS_H_NORMAL, false); in wcd_clsh_state_hph_r()
619 wcd_clsh_flyback_ctrl(ctrl, CLS_H_NORMAL, false); in wcd_clsh_state_hph_r()
620 wcd_clsh_set_flyback_mode(comp, CLS_H_NORMAL); in wcd_clsh_state_hph_r()
621 wcd_clsh_set_buck_mode(comp, CLS_H_NORMAL); in wcd_clsh_state_hph_r()
622 wcd_clsh_set_buck_regulator_mode(comp, CLS_H_NORMAL); in wcd_clsh_state_hph_r()
631 if (mode == CLS_H_NORMAL) { in wcd_clsh_v3_state_hph_l()
647 wcd_clsh_v3_set_hph_mode(component, CLS_H_NORMAL); in wcd_clsh_v3_state_hph_l()
650 wcd_clsh_v3_flyback_ctrl(component, ctrl, CLS_H_NORMAL, false); in wcd_clsh_v3_state_hph_l()
651 wcd_clsh_v3_buck_ctrl(component, ctrl, CLS_H_NORMAL, false); in wcd_clsh_v3_state_hph_l()
652 wcd_clsh_v3_force_iq_ctl(component, CLS_H_NORMAL, false); in wcd_clsh_v3_state_hph_l()
653 wcd_clsh_v3_set_flyback_mode(component, CLS_H_NORMAL); in wcd_clsh_v3_state_hph_l()
654 wcd_clsh_v3_set_buck_mode(component, CLS_H_NORMAL); in wcd_clsh_v3_state_hph_l()
663 if (mode == CLS_H_NORMAL) { in wcd_clsh_state_hph_l()
698 wcd_clsh_v2_set_hph_mode(comp, CLS_H_NORMAL); in wcd_clsh_state_hph_l()
708 wcd_clsh_buck_ctrl(ctrl, CLS_H_NORMAL, false); in wcd_clsh_state_hph_l()
709 wcd_clsh_flyback_ctrl(ctrl, CLS_H_NORMAL, false); in wcd_clsh_state_hph_l()
710 wcd_clsh_set_flyback_mode(comp, CLS_H_NORMAL); in wcd_clsh_state_hph_l()
711 wcd_clsh_set_buck_mode(comp, CLS_H_NORMAL); in wcd_clsh_state_hph_l()
712 wcd_clsh_set_buck_regulator_mode(comp, CLS_H_NORMAL); in wcd_clsh_state_hph_l()
731 wcd_clsh_v3_set_hph_mode(component, CLS_H_NORMAL); in wcd_clsh_v3_state_ear()
734 wcd_clsh_v3_flyback_ctrl(component, ctrl, CLS_H_NORMAL, false); in wcd_clsh_v3_state_ear()
735 wcd_clsh_v3_buck_ctrl(component, ctrl, CLS_H_NORMAL, false); in wcd_clsh_v3_state_ear()
736 wcd_clsh_v3_force_iq_ctl(component, CLS_H_NORMAL, false); in wcd_clsh_v3_state_ear()
737 wcd_clsh_v3_set_flyback_mode(component, CLS_H_NORMAL); in wcd_clsh_v3_state_ear()
738 wcd_clsh_v3_set_buck_mode(component, CLS_H_NORMAL); in wcd_clsh_v3_state_ear()
747 if (mode != CLS_H_NORMAL) { in wcd_clsh_state_ear()
772 wcd_clsh_set_flyback_mode(comp, CLS_H_NORMAL); in wcd_clsh_state_ear()
773 wcd_clsh_set_buck_mode(comp, CLS_H_NORMAL); in wcd_clsh_state_ear()