78 			struct clk_aic32x4_pll_muldiv *settings)  in clk_aic32x4_pll_get_muldiv()  argument
87 	settings->r = val & AIC32X4_PLL_R_MASK;  in clk_aic32x4_pll_get_muldiv()
88 	settings->p = (val & AIC32X4_PLL_P_MASK) >> AIC32X4_PLL_P_SHIFT;  in clk_aic32x4_pll_get_muldiv()
93 	settings->j = val;  in clk_aic32x4_pll_get_muldiv()
98 	settings->d = val << 8;  in clk_aic32x4_pll_get_muldiv()
103 	settings->d |= val;  in clk_aic32x4_pll_get_muldiv()
109 			struct clk_aic32x4_pll_muldiv *settings)  in clk_aic32x4_pll_set_muldiv()  argument
115 				AIC32X4_PLL_R_MASK, settings->r);  in clk_aic32x4_pll_set_muldiv()
121 				settings->p << AIC32X4_PLL_P_SHIFT);  in clk_aic32x4_pll_set_muldiv()
125 	ret = regmap_write(pll->regmap, AIC32X4_PLLJ, settings->j);  in clk_aic32x4_pll_set_muldiv()
129 	ret = regmap_write(pll->regmap, AIC32X4_PLLDMSB, (settings->d >> 8));  in clk_aic32x4_pll_set_muldiv()
132 	ret = regmap_write(pll->regmap, AIC32X4_PLLDLSB, (settings->d & 0xff));  in clk_aic32x4_pll_set_muldiv()
140 			struct clk_aic32x4_pll_muldiv *settings,  in clk_aic32x4_pll_calc_rate()  argument
148 	rate = (u64) parent_rate * settings->r *  in clk_aic32x4_pll_calc_rate()
149 				((settings->j * 10000) + settings->d);  in clk_aic32x4_pll_calc_rate()
151 	return (unsigned long) DIV_ROUND_UP_ULL(rate, settings->p * 10000);  in clk_aic32x4_pll_calc_rate()
154 static int clk_aic32x4_pll_calc_muldiv(struct clk_aic32x4_pll_muldiv *settings,  in clk_aic32x4_pll_calc_muldiv()  argument
159 	settings->p = parent_rate / AIC32X4_MAX_PLL_CLKIN + 1;  in clk_aic32x4_pll_calc_muldiv()
160 	if (settings->p > 8)  in clk_aic32x4_pll_calc_muldiv()
168 	multiplier = (u64) rate * settings->p * 10000;  in clk_aic32x4_pll_calc_muldiv()
175 	settings->r = ((u32) multiplier / 640000) + 1;  in clk_aic32x4_pll_calc_muldiv()
176 	if (settings->r > 4)  in clk_aic32x4_pll_calc_muldiv()
178 	do_div(multiplier, settings->r);  in clk_aic32x4_pll_calc_muldiv()
187 	settings->j = (u32) multiplier / 10000;  in clk_aic32x4_pll_calc_muldiv()
188 	settings->d = (u32) multiplier % 10000;  in clk_aic32x4_pll_calc_muldiv()
197 	struct clk_aic32x4_pll_muldiv settings;  in clk_aic32x4_pll_recalc_rate()  local
200 	ret =  clk_aic32x4_pll_get_muldiv(pll, &settings);  in clk_aic32x4_pll_recalc_rate()
204 	return clk_aic32x4_pll_calc_rate(&settings, parent_rate);  in clk_aic32x4_pll_recalc_rate()
210 	struct clk_aic32x4_pll_muldiv settings;  in clk_aic32x4_pll_determine_rate()  local
213 	ret = clk_aic32x4_pll_calc_muldiv(&settings, req->rate, req->best_parent_rate);  in clk_aic32x4_pll_determine_rate()
217 	req->rate = clk_aic32x4_pll_calc_rate(&settings, req->best_parent_rate);  in clk_aic32x4_pll_determine_rate()
227 	struct clk_aic32x4_pll_muldiv settings;  in clk_aic32x4_pll_set_rate()  local
230 	ret = clk_aic32x4_pll_calc_muldiv(&settings, rate, parent_rate);  in clk_aic32x4_pll_set_rate()
234 	ret = clk_aic32x4_pll_set_muldiv(pll, &settings);  in clk_aic32x4_pll_set_rate()