Lines Matching refs:RT5670_PR_BASE
57 #define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING)) macro
60 { .name = "PR", .range_min = RT5670_PR_BASE,
61 .range_max = RT5670_PR_BASE + 0xf8,
70 { RT5670_PR_BASE + 0x14, 0x9a8a },
71 { RT5670_PR_BASE + 0x38, 0x1fe1 },
72 { RT5670_PR_BASE + 0x3d, 0x3640 },
1458 regmap_write(rt5670->regmap, RT5670_PR_BASE + in rt5670_hp_power_event()
1483 regmap_write(rt5670->regmap, RT5670_PR_BASE + in rt5670_hp_event()
1498 regmap_write(rt5670->regmap, RT5670_PR_BASE + in rt5670_hp_event()
1513 regmap_write(rt5670->regmap, RT5670_PR_BASE + in rt5670_hp_event()
1691 SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE +