Lines Matching +full:adc +full:- +full:channel +full:- +full:clk +full:- +full:src
1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5665.c -- RT5665/RT5658 ALSA SoC audio codec driver
26 #include <sound/soc-dapm.h>
887 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2250, 150, 0);
888 static const DECLARE_TLV_DB_SCALE(mono_vol_tlv, -1400, 150, 0);
889 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
890 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
891 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
892 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
894 static const DECLARE_TLV_DB_SCALE(in_bst_tlv, -1200, 75, 0);
955 SOC_DAPM_ENUM("IF1_1 01 ADC Swap Mux", rt5665_if1_1_01_adc_enum);
958 SOC_DAPM_ENUM("IF1_1 23 ADC Swap Mux", rt5665_if1_1_23_adc_enum);
961 SOC_DAPM_ENUM("IF1_1 45 ADC Swap Mux", rt5665_if1_1_45_adc_enum);
964 SOC_DAPM_ENUM("IF1_1 67 ADC Swap Mux", rt5665_if1_1_67_adc_enum);
967 SOC_DAPM_ENUM("IF1_2 01 ADC Swap Mux", rt5665_if1_2_01_adc_enum);
982 SOC_DAPM_ENUM("IF2_1 ADC Swap Source", rt5665_if2_1_adc_enum);
988 SOC_DAPM_ENUM("IF2_2 ADC Swap Source", rt5665_if2_2_adc_enum);
994 SOC_DAPM_ENUM("IF3 ADC Swap Source", rt5665_if3_adc_enum);
1029 * rt5665_sel_asrc_clk_src - select ASRC clock source for a set of filters
1061 return -EINVAL; in rt5665_sel_asrc_clk_src()
1158 * rt5665_headset_detect - Detect headset.
1176 regmap_update_bits(rt5665->regmap, RT5665_MICBIAS_2, 0x100, in rt5665_headset_detect()
1179 regmap_read(rt5665->regmap, RT5665_GPIO_STA, &val); in rt5665_headset_detect()
1181 regmap_update_bits(rt5665->regmap, RT5665_EJD_CTRL_1, in rt5665_headset_detect()
1184 regmap_read(rt5665->regmap, RT5665_GPIO_STA, &val); in rt5665_headset_detect()
1187 regmap_read(rt5665->regmap, RT5665_GPIO_STA, in rt5665_headset_detect()
1192 regmap_update_bits(rt5665->regmap, RT5665_EJD_CTRL_1, in rt5665_headset_detect()
1194 regmap_write(rt5665->regmap, RT5665_EJD_CTRL_3, 0x3424); in rt5665_headset_detect()
1195 regmap_write(rt5665->regmap, RT5665_IL_CMD_1, 0x0048); in rt5665_headset_detect()
1196 regmap_write(rt5665->regmap, RT5665_SAR_IL_CMD_1, 0xa291); in rt5665_headset_detect()
1200 rt5665->sar_adc_value = snd_soc_component_read(rt5665->component, in rt5665_headset_detect()
1203 sar_hs_type = rt5665->pdata.sar_hs_type ? in rt5665_headset_detect()
1204 rt5665->pdata.sar_hs_type : 729; in rt5665_headset_detect()
1206 if (rt5665->sar_adc_value > sar_hs_type) { in rt5665_headset_detect()
1207 rt5665->jack_type = SND_JACK_HEADSET; in rt5665_headset_detect()
1210 rt5665->jack_type = SND_JACK_HEADPHONE; in rt5665_headset_detect()
1211 regmap_write(rt5665->regmap, RT5665_SAR_IL_CMD_1, in rt5665_headset_detect()
1213 regmap_update_bits(rt5665->regmap, RT5665_MICBIAS_2, in rt5665_headset_detect()
1219 regmap_write(rt5665->regmap, RT5665_SAR_IL_CMD_1, 0x2291); in rt5665_headset_detect()
1220 regmap_update_bits(rt5665->regmap, RT5665_MICBIAS_2, 0x100, 0); in rt5665_headset_detect()
1223 if (rt5665->jack_type == SND_JACK_HEADSET) in rt5665_headset_detect()
1225 rt5665->jack_type = 0; in rt5665_headset_detect()
1228 dev_dbg(component->dev, "jack_type = %d\n", rt5665->jack_type); in rt5665_headset_detect()
1229 return rt5665->jack_type; in rt5665_headset_detect()
1237 &rt5665->jack_detect_work, msecs_to_jiffies(250)); in rt5665_irq()
1247 if (snd_soc_component_read(rt5665->component, RT5665_AJD1_CTRL) & 0x0010) { in rt5665_jd_check_handler()
1249 rt5665->jack_type = rt5665_headset_detect(rt5665->component, 0); in rt5665_jd_check_handler()
1251 snd_soc_jack_report(rt5665->hs_jack, rt5665->jack_type, in rt5665_jd_check_handler()
1256 schedule_delayed_work(&rt5665->jd_check_work, 500); in rt5665_jd_check_handler()
1265 switch (rt5665->pdata.jd_src) { in rt5665_set_jack_detect()
1267 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_1, in rt5665_set_jack_detect()
1269 regmap_update_bits(rt5665->regmap, RT5665_RC_CLK_CTRL, in rt5665_set_jack_detect()
1271 regmap_update_bits(rt5665->regmap, RT5665_PWR_ANLG_2, in rt5665_set_jack_detect()
1273 regmap_update_bits(rt5665->regmap, RT5665_IRQ_CTRL_1, 0x8, 0x8); in rt5665_set_jack_detect()
1280 dev_warn(component->dev, "Wrong JD source\n"); in rt5665_set_jack_detect()
1284 rt5665->hs_jack = hs_jack; in rt5665_set_jack_detect()
1295 while (!rt5665->component) { in rt5665_jack_detect_handler()
1300 while (!snd_soc_card_is_instantiated(rt5665->component->card)) { in rt5665_jack_detect_handler()
1305 while (!rt5665->calibration_done) { in rt5665_jack_detect_handler()
1310 mutex_lock(&rt5665->calibrate_mutex); in rt5665_jack_detect_handler()
1312 val = snd_soc_component_read(rt5665->component, RT5665_AJD1_CTRL) & 0x0010; in rt5665_jack_detect_handler()
1315 if (rt5665->jack_type == 0) { in rt5665_jack_detect_handler()
1317 rt5665->jack_type = in rt5665_jack_detect_handler()
1318 rt5665_headset_detect(rt5665->component, 1); in rt5665_jack_detect_handler()
1321 rt5665->jack_type = SND_JACK_HEADSET; in rt5665_jack_detect_handler()
1322 btn_type = rt5665_button_detect(rt5665->component); in rt5665_jack_detect_handler()
1334 rt5665->jack_type |= SND_JACK_BTN_0; in rt5665_jack_detect_handler()
1339 rt5665->jack_type |= SND_JACK_BTN_1; in rt5665_jack_detect_handler()
1344 rt5665->jack_type |= SND_JACK_BTN_2; in rt5665_jack_detect_handler()
1349 rt5665->jack_type |= SND_JACK_BTN_3; in rt5665_jack_detect_handler()
1355 dev_err(rt5665->component->dev, in rt5665_jack_detect_handler()
1363 rt5665->jack_type = rt5665_headset_detect(rt5665->component, 0); in rt5665_jack_detect_handler()
1366 snd_soc_jack_report(rt5665->hs_jack, rt5665->jack_type, in rt5665_jack_detect_handler()
1371 if (rt5665->jack_type & (SND_JACK_BTN_0 | SND_JACK_BTN_1 | in rt5665_jack_detect_handler()
1373 schedule_delayed_work(&rt5665->jd_check_work, 0); in rt5665_jack_detect_handler()
1375 cancel_delayed_work_sync(&rt5665->jd_check_work); in rt5665_jack_detect_handler()
1377 mutex_unlock(&rt5665->calibrate_mutex); in rt5665_jack_detect_handler()
1432 /* ADC Digital Volume Control */
1433 SOC_DOUBLE("STO1 ADC Capture Switch", RT5665_STO1_ADC_DIG_VOL,
1435 SOC_DOUBLE_TLV("STO1 ADC Capture Volume", RT5665_STO1_ADC_DIG_VOL,
1437 SOC_DOUBLE("Mono ADC Capture Switch", RT5665_MONO_ADC_DIG_VOL,
1439 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5665_MONO_ADC_DIG_VOL,
1441 SOC_DOUBLE("STO2 ADC Capture Switch", RT5665_STO2_ADC_DIG_VOL,
1443 SOC_DOUBLE_TLV("STO2 ADC Capture Volume", RT5665_STO2_ADC_DIG_VOL,
1446 /* ADC Boost Volume Control */
1447 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5665_STO1_ADC_BOOST,
1451 SOC_DOUBLE_TLV("Mono ADC Boost Gain Volume", RT5665_MONO_ADC_BOOST,
1455 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5665_STO2_ADC_BOOST,
1459 /* I2S3 CLK Source */
1460 SOC_ENUM("I2S1 Master Clk Sel", rt5665_enum[0]),
1461 SOC_ENUM("I2S2 Master Clk Sel", rt5665_enum[1]),
1462 SOC_ENUM("I2S3 Master Clk Sel", rt5665_enum[2]),
1466 * set_dmic_clk - Set parameter of dmic.
1478 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in set_dmic_clk()
1482 pd = rl6231_get_pre_div(rt5665->regmap, in set_dmic_clk()
1484 idx = rl6231_calc_dmic_clk(rt5665->sysclk / pd); in set_dmic_clk()
1487 dev_err(component->dev, "Failed to set DMIC clock\n"); in set_dmic_clk()
1498 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in rt5665_charge_pump_event()
1522 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in is_sys_clk_from_pll()
1536 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in is_using_asrc()
1538 switch (w->shift) { in is_using_asrc()
1634 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5665_AD_DA_MIXER,
1641 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5665_AD_DA_MIXER,
1837 /*MX-17 [6:4], MX-17 [2:0]*/
1839 "IF1 DAC2", "IF2_1 DAC", "IF2_2 DAC", "IF3 DAC", "Mono ADC MIX"
1857 /*MX-1B [6:4], MX-1B [2:0]*/
1859 "IF1 DAC2", "IF2_1 DAC", "IF2_2 DAC", "IF3 DAC", "STO2 ADC MIX"
1877 /* MX-26 [13] [5] */
1879 "DD Mux", "ADC"
1896 /* STO1 ADC Source */
1897 /* MX-26 [11:10] [3:2] */
1917 /* MX-26 [12] [4] */
1937 /* MX-26 [8] */
1949 /* MX-26 [9] */
1961 /* MX-26 [1:0] */
1973 /* MONO ADC L2 Source */
1974 /* MX-27 [12] */
1984 SOC_DAPM_ENUM("Mono ADC L2 Source", rt5665_mono_adc_l2_enum);
1987 /* MONO ADC L1 Source */
1988 /* MX-27 [13] */
1990 "DD Mux", "ADC"
1998 SOC_DAPM_ENUM("Mono ADC L1 Source", rt5665_mono_adc_l1_enum);
2000 /* MX-27 [9][1]*/
2019 /* MONO ADC L Source, MONO ADC R Source*/
2020 /* MX-27 [11:10], MX-27 [3:2] */
2030 SOC_DAPM_ENUM("Mono ADC L Source", rt5665_mono_adc_l_enum);
2037 SOC_DAPM_ENUM("Mono ADC R Source", rt5665_mono_adcr_enum);
2040 /* MX-27 [8] */
2052 /* MONO ADC R2 Source */
2053 /* MX-27 [4] */
2063 SOC_DAPM_ENUM("Mono ADC R2 Source", rt5665_mono_adc_r2_enum);
2065 /* MONO ADC R1 Source */
2066 /* MX-27 [5] */
2068 "DD Mux", "ADC"
2076 SOC_DAPM_ENUM("Mono ADC R1 Source", rt5665_mono_adc_r1_enum);
2079 /* MX-27 [0] */
2093 /* MX-28 [13] [5] */
2095 "DD Mux", "ADC"
2112 /* STO2 ADC Source */
2113 /* MX-28 [11:10] [3:2] */
2133 /* MX-28 [12] [4] */
2153 /* MX-28 [8] */
2165 /* MX-28 [9] */
2177 /* MX-28 [1] */
2190 /* MX-29 [11:10], MX-29 [9:8]*/
2210 /* MX-2D [13:12], MX-2D [9:8]*/
2230 /* MX-2D [5:4], MX-2D [1:0]*/
2250 /* MX-2E [5:4], MX-2E [0]*/
2269 /* Interface2 ADC Data Input*/
2270 /* MX-2F [14:12] */
2272 "STO1 ADC", "STO2 ADC", "MONO ADC", "IF1 DAC1",
2281 SOC_DAPM_ENUM("IF2_1 ADC IN Source", rt5665_if2_1_adc_in_enum);
2283 /* MX-2F [6:4] */
2285 "STO1 ADC", "STO2 ADC", "MONO ADC", "IF1 DAC1",
2294 SOC_DAPM_ENUM("IF2_1 ADC IN Source", rt5665_if2_2_adc_in_enum);
2296 /* Interface3 ADC Data Input*/
2297 /* MX-30 [6:4] */
2299 "STO1 ADC", "STO2 ADC", "MONO ADC", "IF1 DAC1",
2308 SOC_DAPM_ENUM("IF3 ADC IN Source", rt5665_if3_adc_in_enum);
2311 /* MX-31 [11:10] [9:8] */
2332 /* MX-7a[10] */
2334 "STO1 ADC", "IF2_1 DAC",
2344 /* MX-7a[9] */
2346 "STO2 ADC", "IF2_2 DAC",
2356 /* MX-7a[8] */
2358 "MONO ADC", "IF3 DAC",
2368 /* MX-7b[10] */
2370 "STO1 ADC", "IF1 DAC",
2380 /* MX-7b[9] */
2382 "STO2 ADC", "IF2_1 DAC",
2392 /* MX-7b[8] */
2394 "MONO ADC", "IF2_2 DAC",
2404 /* MX-7b[7] */
2416 /* MX-7a[4:0] MX-7b[4:0] */
2429 SOC_DAPM_ENUM("TDM1 ADC Mux", rt5665_tdm1_adc_data_enum);
2473 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in rt5665_mono_event()
2505 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in rt5665_hp_event()
2531 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in rt5665_lout_event()
2571 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in rt5665_set_verf()
2575 switch (w->shift) { in rt5665_set_verf()
2598 switch (w->shift) { in rt5665_set_verf()
2629 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in rt5665_i2s_pin_event()
2632 switch (w->shift) { in rt5665_i2s_pin_event()
2709 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5665_ASRC_1,
2711 SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5665_ASRC_1,
2713 SND_SOC_DAPM_SUPPLY_S("ADC Mono L ASRC", 1, RT5665_ASRC_1,
2715 SND_SOC_DAPM_SUPPLY_S("ADC Mono R ASRC", 1, RT5665_ASRC_1,
2752 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2833 /* ADC Mux */
2838 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2840 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2842 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2844 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2846 SND_SOC_DAPM_MUX("Stereo1 ADC L Mux", SND_SOC_NOPM, 0, 0,
2848 SND_SOC_DAPM_MUX("Stereo1 ADC R Mux", SND_SOC_NOPM, 0, 0,
2854 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2856 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2858 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2860 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2866 SND_SOC_DAPM_MUX("Mono ADC L Mux", SND_SOC_NOPM, 0, 0,
2868 SND_SOC_DAPM_MUX("Mono ADC R Mux", SND_SOC_NOPM, 0, 0,
2878 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2880 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2882 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2884 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2886 SND_SOC_DAPM_MUX("Stereo2 ADC L Mux", SND_SOC_NOPM, 0, 0,
2888 SND_SOC_DAPM_MUX("Stereo2 ADC R Mux", SND_SOC_NOPM, 0, 0,
2894 /* ADC Mixer */
2895 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5665_PWR_DIG_2,
2897 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5665_PWR_DIG_2,
2899 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", RT5665_STO1_ADC_DIG_VOL,
2902 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", RT5665_STO1_ADC_DIG_VOL,
2905 SND_SOC_DAPM_MIXER("Stereo2 ADC MIXL", RT5665_STO2_ADC_DIG_VOL,
2908 SND_SOC_DAPM_MIXER("Stereo2 ADC MIXR", RT5665_STO2_ADC_DIG_VOL,
2911 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5665_PWR_DIG_2,
2913 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5665_MONO_ADC_DIG_VOL,
2916 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5665_PWR_DIG_2,
2918 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5665_MONO_ADC_DIG_VOL,
2922 /* ADC PGA */
2923 SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2924 SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2925 SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2957 SND_SOC_DAPM_PGA("IF2_1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2958 SND_SOC_DAPM_PGA("IF2_2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2963 SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2997 SND_SOC_DAPM_MUX("IF2_1 ADC Mux", SND_SOC_NOPM, 0, 0,
2999 SND_SOC_DAPM_MUX("IF2_2 ADC Mux", SND_SOC_NOPM, 0, 0,
3001 SND_SOC_DAPM_MUX("IF3 ADC Mux", SND_SOC_NOPM, 0, 0,
3003 SND_SOC_DAPM_MUX("IF1_1 0 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3005 SND_SOC_DAPM_MUX("IF1_1 1 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3007 SND_SOC_DAPM_MUX("IF1_1 2 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3009 SND_SOC_DAPM_MUX("IF1_1 3 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3011 SND_SOC_DAPM_MUX("IF1_1 4 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3013 SND_SOC_DAPM_MUX("IF1_1 5 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3015 SND_SOC_DAPM_MUX("IF1_1 6 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3017 SND_SOC_DAPM_MUX("IF1_1 7 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3019 SND_SOC_DAPM_MUX("IF1_2 0 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3021 SND_SOC_DAPM_MUX("IF1_2 1 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3023 SND_SOC_DAPM_MUX("IF1_2 2 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3025 SND_SOC_DAPM_MUX("IF1_2 3 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3027 SND_SOC_DAPM_MUX("IF1_2 4 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3029 SND_SOC_DAPM_MUX("IF1_2 5 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3031 SND_SOC_DAPM_MUX("IF1_2 6 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3033 SND_SOC_DAPM_MUX("IF1_2 7 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3037 SND_SOC_DAPM_MUX("IF2_1 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3041 SND_SOC_DAPM_MUX("IF2_2 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3045 SND_SOC_DAPM_MUX("IF3 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
3103 /* DAC channel Mux */
3221 /* CLK DET */
3245 {"ADC Stereo1 Filter", NULL, "PLL", is_sys_clk_from_pll},
3246 {"ADC Stereo2 Filter", NULL, "PLL", is_sys_clk_from_pll},
3247 {"ADC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll},
3248 {"ADC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll},
3255 {"ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc},
3256 {"ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc},
3257 {"ADC Mono Left Filter", NULL, "ADC Mono L ASRC", is_using_asrc},
3258 {"ADC Mono Right Filter", NULL, "ADC Mono R ASRC", is_using_asrc},
3377 {"DMIC L1", NULL, "DMIC CLK"},
3379 {"DMIC R1", NULL, "DMIC CLK"},
3381 {"DMIC L2", NULL, "DMIC CLK"},
3383 {"DMIC R2", NULL, "DMIC CLK"},
3404 {"Stereo1 ADC L Mux", "ADC1 L", "ADC1 L"},
3405 {"Stereo1 ADC L Mux", "ADC1 R", "ADC1 R"},
3406 {"Stereo1 ADC L Mux", "ADC2 L", "ADC2 L"},
3407 {"Stereo1 ADC L Mux", "ADC2 R", "ADC2 R"},
3408 {"Stereo1 ADC R Mux", "ADC1 L", "ADC1 L"},
3409 {"Stereo1 ADC R Mux", "ADC1 R", "ADC1 R"},
3410 {"Stereo1 ADC R Mux", "ADC2 L", "ADC2 L"},
3411 {"Stereo1 ADC R Mux", "ADC2 R", "ADC2 R"},
3419 {"Stereo1 ADC L1 Mux", "ADC", "Stereo1 ADC L Mux"},
3420 {"Stereo1 ADC L1 Mux", "DD Mux", "Stereo1 DD L Mux"},
3421 {"Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC L Mux"},
3422 {"Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL"},
3424 {"Stereo1 ADC R1 Mux", "ADC", "Stereo1 ADC R Mux"},
3425 {"Stereo1 ADC R1 Mux", "DD Mux", "Stereo1 DD R Mux"},
3426 {"Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC R Mux"},
3427 {"Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR"},
3429 {"Mono ADC L Mux", "ADC1 L", "ADC1 L"},
3430 {"Mono ADC L Mux", "ADC1 R", "ADC1 R"},
3431 {"Mono ADC L Mux", "ADC2 L", "ADC2 L"},
3432 {"Mono ADC L Mux", "ADC2 R", "ADC2 R"},
3434 {"Mono ADC R Mux", "ADC1 L", "ADC1 L"},
3435 {"Mono ADC R Mux", "ADC1 R", "ADC1 R"},
3436 {"Mono ADC R Mux", "ADC2 L", "ADC2 L"},
3437 {"Mono ADC R Mux", "ADC2 R", "ADC2 R"},
3445 {"Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux"},
3446 {"Mono ADC L2 Mux", "DAC MIXL", "DAC MIXL"},
3447 {"Mono ADC L1 Mux", "DD Mux", "Mono DD L Mux"},
3448 {"Mono ADC L1 Mux", "ADC", "Mono ADC L Mux"},
3450 {"Mono ADC R1 Mux", "DD Mux", "Mono DD R Mux"},
3451 {"Mono ADC R1 Mux", "ADC", "Mono ADC R Mux"},
3452 {"Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux"},
3453 {"Mono ADC R2 Mux", "DAC MIXR", "DAC MIXR"},
3455 {"Stereo2 ADC L Mux", "ADC1 L", "ADC1 L"},
3456 {"Stereo2 ADC L Mux", "ADC2 L", "ADC2 L"},
3457 {"Stereo2 ADC L Mux", "ADC1 R", "ADC1 R"},
3458 {"Stereo2 ADC R Mux", "ADC1 L", "ADC1 L"},
3459 {"Stereo2 ADC R Mux", "ADC2 L", "ADC2 L"},
3460 {"Stereo2 ADC R Mux", "ADC1 R", "ADC1 R"},
3468 {"Stereo2 ADC L1 Mux", "ADC", "Stereo2 ADC L Mux"},
3469 {"Stereo2 ADC L1 Mux", "DD Mux", "Stereo2 DD L Mux"},
3470 {"Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC L Mux"},
3471 {"Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL"},
3473 {"Stereo2 ADC R1 Mux", "ADC", "Stereo2 ADC R Mux"},
3474 {"Stereo2 ADC R1 Mux", "DD Mux", "Stereo2 DD R Mux"},
3475 {"Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC R Mux"},
3476 {"Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR"},
3478 {"Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux"},
3479 {"Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux"},
3480 {"Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter"},
3482 {"Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux"},
3483 {"Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux"},
3484 {"Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter"},
3486 {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
3487 {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
3488 {"Mono ADC MIXL", NULL, "ADC Mono Left Filter"},
3490 {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
3491 {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
3492 {"Mono ADC MIXR", NULL, "ADC Mono Right Filter"},
3494 {"Stereo2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux"},
3495 {"Stereo2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux"},
3496 {"Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter"},
3498 {"Stereo2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux"},
3499 {"Stereo2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux"},
3500 {"Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter"},
3502 {"Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL"},
3503 {"Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR"},
3504 {"Stereo2 ADC MIX", NULL, "Stereo2 ADC MIXL"},
3505 {"Stereo2 ADC MIX", NULL, "Stereo2 ADC MIXR"},
3506 {"Mono ADC MIX", NULL, "Mono ADC MIXL"},
3507 {"Mono ADC MIX", NULL, "Mono ADC MIXR"},
3509 {"IF1_1_ADC1 Mux", "STO1 ADC", "Stereo1 ADC MIX"},
3511 {"IF1_1_ADC2 Mux", "STO2 ADC", "Stereo2 ADC MIX"},
3513 {"IF1_1_ADC3 Mux", "MONO ADC", "Mono ADC MIX"},
3517 {"IF1_2_ADC1 Mux", "STO1 ADC", "Stereo1 ADC MIX"},
3519 {"IF1_2_ADC2 Mux", "STO2 ADC", "Stereo2 ADC MIX"},
3521 {"IF1_2_ADC3 Mux", "MONO ADC", "Mono ADC MIX"},
3735 {"IF1_1 0 ADC Swap Mux", "L/R", "TDM1 slot 01 Data Mux"},
3736 {"IF1_1 0 ADC Swap Mux", "L/L", "TDM1 slot 01 Data Mux"},
3737 {"IF1_1 1 ADC Swap Mux", "R/L", "TDM1 slot 01 Data Mux"},
3738 {"IF1_1 1 ADC Swap Mux", "R/R", "TDM1 slot 01 Data Mux"},
3739 {"IF1_1 2 ADC Swap Mux", "L/R", "TDM1 slot 23 Data Mux"},
3740 {"IF1_1 2 ADC Swap Mux", "R/L", "TDM1 slot 23 Data Mux"},
3741 {"IF1_1 3 ADC Swap Mux", "L/L", "TDM1 slot 23 Data Mux"},
3742 {"IF1_1 3 ADC Swap Mux", "R/R", "TDM1 slot 23 Data Mux"},
3743 {"IF1_1 4 ADC Swap Mux", "L/R", "TDM1 slot 45 Data Mux"},
3744 {"IF1_1 4 ADC Swap Mux", "R/L", "TDM1 slot 45 Data Mux"},
3745 {"IF1_1 5 ADC Swap Mux", "L/L", "TDM1 slot 45 Data Mux"},
3746 {"IF1_1 5 ADC Swap Mux", "R/R", "TDM1 slot 45 Data Mux"},
3747 {"IF1_1 6 ADC Swap Mux", "L/R", "TDM1 slot 67 Data Mux"},
3748 {"IF1_1 6 ADC Swap Mux", "R/L", "TDM1 slot 67 Data Mux"},
3749 {"IF1_1 7 ADC Swap Mux", "L/L", "TDM1 slot 67 Data Mux"},
3750 {"IF1_1 7 ADC Swap Mux", "R/R", "TDM1 slot 67 Data Mux"},
3751 {"IF1_2 0 ADC Swap Mux", "L/R", "TDM2 slot 01 Data Mux"},
3752 {"IF1_2 0 ADC Swap Mux", "R/L", "TDM2 slot 01 Data Mux"},
3753 {"IF1_2 1 ADC Swap Mux", "L/L", "TDM2 slot 01 Data Mux"},
3754 {"IF1_2 1 ADC Swap Mux", "R/R", "TDM2 slot 01 Data Mux"},
3755 {"IF1_2 2 ADC Swap Mux", "L/R", "TDM2 slot 23 Data Mux"},
3756 {"IF1_2 2 ADC Swap Mux", "R/L", "TDM2 slot 23 Data Mux"},
3757 {"IF1_2 3 ADC Swap Mux", "L/L", "TDM2 slot 23 Data Mux"},
3758 {"IF1_2 3 ADC Swap Mux", "R/R", "TDM2 slot 23 Data Mux"},
3759 {"IF1_2 4 ADC Swap Mux", "L/R", "TDM2 slot 45 Data Mux"},
3760 {"IF1_2 4 ADC Swap Mux", "R/L", "TDM2 slot 45 Data Mux"},
3761 {"IF1_2 5 ADC Swap Mux", "L/L", "TDM2 slot 45 Data Mux"},
3762 {"IF1_2 5 ADC Swap Mux", "R/R", "TDM2 slot 45 Data Mux"},
3763 {"IF1_2 6 ADC Swap Mux", "L/R", "TDM2 slot 67 Data Mux"},
3764 {"IF1_2 6 ADC Swap Mux", "R/L", "TDM2 slot 67 Data Mux"},
3765 {"IF1_2 7 ADC Swap Mux", "L/L", "TDM2 slot 67 Data Mux"},
3766 {"IF1_2 7 ADC Swap Mux", "R/R", "TDM2 slot 67 Data Mux"},
3768 {"IF2_1 ADC Mux", "STO1 ADC", "Stereo1 ADC MIX"},
3769 {"IF2_1 ADC Mux", "STO2 ADC", "Stereo2 ADC MIX"},
3770 {"IF2_1 ADC Mux", "MONO ADC", "Mono ADC MIX"},
3771 {"IF2_1 ADC Mux", "IF1 DAC1", "IF1 DAC1"},
3772 {"IF2_1 ADC Mux", "IF1 DAC2", "IF1 DAC2"},
3773 {"IF2_1 ADC Mux", "IF2_2 DAC", "IF2_2 DAC"},
3774 {"IF2_1 ADC Mux", "IF3 DAC", "IF3 DAC"},
3775 {"IF2_1 ADC Mux", "DAC1 MIX", "DAC1 MIX"},
3776 {"IF2_1 ADC", NULL, "IF2_1 ADC Mux"},
3777 {"IF2_1 ADC", NULL, "I2S2_1"},
3779 {"IF2_2 ADC Mux", "STO1 ADC", "Stereo1 ADC MIX"},
3780 {"IF2_2 ADC Mux", "STO2 ADC", "Stereo2 ADC MIX"},
3781 {"IF2_2 ADC Mux", "MONO ADC", "Mono ADC MIX"},
3782 {"IF2_2 ADC Mux", "IF1 DAC1", "IF1 DAC1"},
3783 {"IF2_2 ADC Mux", "IF1 DAC2", "IF1 DAC2"},
3784 {"IF2_2 ADC Mux", "IF2_1 DAC", "IF2_1 DAC"},
3785 {"IF2_2 ADC Mux", "IF3 DAC", "IF3 DAC"},
3786 {"IF2_2 ADC Mux", "DAC1 MIX", "DAC1 MIX"},
3787 {"IF2_2 ADC", NULL, "IF2_2 ADC Mux"},
3788 {"IF2_2 ADC", NULL, "I2S2_2"},
3790 {"IF3 ADC Mux", "STO1 ADC", "Stereo1 ADC MIX"},
3791 {"IF3 ADC Mux", "STO2 ADC", "Stereo2 ADC MIX"},
3792 {"IF3 ADC Mux", "MONO ADC", "Mono ADC MIX"},
3793 {"IF3 ADC Mux", "IF1 DAC1", "IF1 DAC1"},
3794 {"IF3 ADC Mux", "IF1 DAC2", "IF1 DAC2"},
3795 {"IF3 ADC Mux", "IF2_1 DAC", "IF2_1 DAC"},
3796 {"IF3 ADC Mux", "IF2_2 DAC", "IF2_2 DAC"},
3797 {"IF3 ADC Mux", "DAC1 MIX", "DAC1 MIX"},
3798 {"IF3 ADC", NULL, "IF3 ADC Mux"},
3799 {"IF3 ADC", NULL, "I2S3"},
3801 {"AIF1_1TX slot 0", NULL, "IF1_1 0 ADC Swap Mux"},
3802 {"AIF1_1TX slot 1", NULL, "IF1_1 1 ADC Swap Mux"},
3803 {"AIF1_1TX slot 2", NULL, "IF1_1 2 ADC Swap Mux"},
3804 {"AIF1_1TX slot 3", NULL, "IF1_1 3 ADC Swap Mux"},
3805 {"AIF1_1TX slot 4", NULL, "IF1_1 4 ADC Swap Mux"},
3806 {"AIF1_1TX slot 5", NULL, "IF1_1 5 ADC Swap Mux"},
3807 {"AIF1_1TX slot 6", NULL, "IF1_1 6 ADC Swap Mux"},
3808 {"AIF1_1TX slot 7", NULL, "IF1_1 7 ADC Swap Mux"},
3809 {"AIF1_2TX slot 0", NULL, "IF1_2 0 ADC Swap Mux"},
3810 {"AIF1_2TX slot 1", NULL, "IF1_2 1 ADC Swap Mux"},
3811 {"AIF1_2TX slot 2", NULL, "IF1_2 2 ADC Swap Mux"},
3812 {"AIF1_2TX slot 3", NULL, "IF1_2 3 ADC Swap Mux"},
3813 {"AIF1_2TX slot 4", NULL, "IF1_2 4 ADC Swap Mux"},
3814 {"AIF1_2TX slot 5", NULL, "IF1_2 5 ADC Swap Mux"},
3815 {"AIF1_2TX slot 6", NULL, "IF1_2 6 ADC Swap Mux"},
3816 {"AIF1_2TX slot 7", NULL, "IF1_2 7 ADC Swap Mux"},
3817 {"IF2_1 ADC Swap Mux", "L/R", "IF2_1 ADC"},
3818 {"IF2_1 ADC Swap Mux", "R/L", "IF2_1 ADC"},
3819 {"IF2_1 ADC Swap Mux", "L/L", "IF2_1 ADC"},
3820 {"IF2_1 ADC Swap Mux", "R/R", "IF2_1 ADC"},
3821 {"AIF2_1TX", NULL, "IF2_1 ADC Swap Mux"},
3822 {"IF2_2 ADC Swap Mux", "L/R", "IF2_2 ADC"},
3823 {"IF2_2 ADC Swap Mux", "R/L", "IF2_2 ADC"},
3824 {"IF2_2 ADC Swap Mux", "L/L", "IF2_2 ADC"},
3825 {"IF2_2 ADC Swap Mux", "R/R", "IF2_2 ADC"},
3826 {"AIF2_2TX", NULL, "IF2_2 ADC Swap Mux"},
3827 {"IF3 ADC Swap Mux", "L/R", "IF3 ADC"},
3828 {"IF3 ADC Swap Mux", "R/L", "IF3 ADC"},
3829 {"IF3 ADC Swap Mux", "L/L", "IF3 ADC"},
3830 {"IF3 ADC Swap Mux", "R/R", "IF3 ADC"},
3831 {"AIF3TX", NULL, "IF3 ADC Swap Mux"},
3884 {"DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"},
3886 {"DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"},
3896 {"DAC L2 Mux", "Mono ADC MIX", "Mono ADC MIXL"},
3903 {"DAC R2 Mux", "Mono ADC MIX", "Mono ADC MIXR"},
3910 {"DAC L3 Mux", "STO2 ADC MIX", "Stereo2 ADC MIXL"},
3917 {"DAC R3 Mux", "STO2 ADC MIX", "Stereo2 ADC MIXR"},
4051 struct snd_soc_component *component = dai->component; in rt5665_set_tdm_slot()
4073 return -EINVAL; in rt5665_set_tdm_slot()
4092 return -EINVAL; in rt5665_set_tdm_slot()
4107 struct snd_soc_component *component = dai->component; in rt5665_hw_params()
4112 rt5665->lrck[dai->id] = params_rate(params); in rt5665_hw_params()
4113 pre_div = rl6231_get_clk_info(rt5665->sysclk, rt5665->lrck[dai->id]); in rt5665_hw_params()
4115 dev_warn(component->dev, "Force using PLL"); in rt5665_hw_params()
4117 rt5665->sysclk, rt5665->lrck[dai->id] * 512); in rt5665_hw_params()
4119 rt5665->lrck[dai->id] * 512, 0); in rt5665_hw_params()
4124 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size); in rt5665_hw_params()
4125 return -EINVAL; in rt5665_hw_params()
4128 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n", in rt5665_hw_params()
4129 rt5665->lrck[dai->id], pre_div, dai->id); in rt5665_hw_params()
4147 return -EINVAL; in rt5665_hw_params()
4150 switch (dai->id) { in rt5665_hw_params()
4178 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); in rt5665_hw_params()
4179 return -EINVAL; in rt5665_hw_params()
4185 switch (rt5665->lrck[dai->id]) { in rt5665_hw_params()
4203 if (rt5665->master[RT5665_AIF2_1] || rt5665->master[RT5665_AIF2_2]) { in rt5665_hw_params()
4207 if (rt5665->master[RT5665_AIF3]) { in rt5665_hw_params()
4217 struct snd_soc_component *component = dai->component; in rt5665_set_dai_fmt()
4223 rt5665->master[dai->id] = 1; in rt5665_set_dai_fmt()
4227 rt5665->master[dai->id] = 0; in rt5665_set_dai_fmt()
4230 return -EINVAL; in rt5665_set_dai_fmt()
4240 return -EINVAL; in rt5665_set_dai_fmt()
4256 return -EINVAL; in rt5665_set_dai_fmt()
4259 switch (dai->id) { in rt5665_set_dai_fmt()
4278 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); in rt5665_set_dai_fmt()
4279 return -EINVAL; in rt5665_set_dai_fmt()
4288 unsigned int reg_val = 0, src = 0; in rt5665_set_component_sysclk() local
4290 if (freq == rt5665->sysclk && clk_id == rt5665->sysclk_src) in rt5665_set_component_sysclk()
4296 src = RT5665_CLK_SRC_MCLK; in rt5665_set_component_sysclk()
4300 src = RT5665_CLK_SRC_PLL1; in rt5665_set_component_sysclk()
4304 src = RT5665_CLK_SRC_RCCLK; in rt5665_set_component_sysclk()
4307 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id); in rt5665_set_component_sysclk()
4308 return -EINVAL; in rt5665_set_component_sysclk()
4313 if (rt5665->master[RT5665_AIF2_1] || rt5665->master[RT5665_AIF2_2]) { in rt5665_set_component_sysclk()
4315 RT5665_I2S2_SRC_MASK, src << RT5665_I2S2_SRC_SFT); in rt5665_set_component_sysclk()
4317 if (rt5665->master[RT5665_AIF3]) { in rt5665_set_component_sysclk()
4319 RT5665_I2S3_SRC_MASK, src << RT5665_I2S3_SRC_SFT); in rt5665_set_component_sysclk()
4322 rt5665->sysclk = freq; in rt5665_set_component_sysclk()
4323 rt5665->sysclk_src = clk_id; in rt5665_set_component_sysclk()
4325 dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id); in rt5665_set_component_sysclk()
4338 if (source == rt5665->pll_src && freq_in == rt5665->pll_in && in rt5665_set_component_pll()
4339 freq_out == rt5665->pll_out) in rt5665_set_component_pll()
4343 dev_dbg(component->dev, "PLL disabled\n"); in rt5665_set_component_pll()
4345 rt5665->pll_in = 0; in rt5665_set_component_pll()
4346 rt5665->pll_out = 0; in rt5665_set_component_pll()
4370 dev_err(component->dev, "Unknown PLL Source %d\n", source); in rt5665_set_component_pll()
4371 return -EINVAL; in rt5665_set_component_pll()
4376 dev_err(component->dev, "Unsupported input clock %d\n", freq_in); in rt5665_set_component_pll()
4380 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n", in rt5665_set_component_pll()
4390 rt5665->pll_in = freq_in; in rt5665_set_component_pll()
4391 rt5665->pll_out = freq_out; in rt5665_set_component_pll()
4392 rt5665->pll_src = source; in rt5665_set_component_pll()
4399 struct snd_soc_component *component = dai->component; in rt5665_set_bclk_ratio()
4402 dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio); in rt5665_set_bclk_ratio()
4404 rt5665->bclk[dai->id] = ratio; in rt5665_set_bclk_ratio()
4407 switch (dai->id) { in rt5665_set_bclk_ratio()
4432 regmap_update_bits(rt5665->regmap, RT5665_DIG_MISC, in rt5665_set_bias_level()
4437 regmap_update_bits(rt5665->regmap, RT5665_PWR_DIG_1, in rt5665_set_bias_level()
4439 regmap_update_bits(rt5665->regmap, RT5665_PWR_ANLG_1, in rt5665_set_bias_level()
4441 regmap_update_bits(rt5665->regmap, RT5665_DIG_MISC, in rt5665_set_bias_level()
4445 regmap_update_bits(rt5665->regmap, RT5665_PWR_DIG_1, in rt5665_set_bias_level()
4447 regmap_update_bits(rt5665->regmap, RT5665_PWR_ANLG_1, in rt5665_set_bias_level()
4462 rt5665->component = component; in rt5665_probe()
4464 schedule_delayed_work(&rt5665->calibrate_work, msecs_to_jiffies(100)); in rt5665_probe()
4473 regmap_write(rt5665->regmap, RT5665_RESET, 0); in rt5665_remove()
4475 regulator_bulk_disable(ARRAY_SIZE(rt5665->supplies), rt5665->supplies); in rt5665_remove()
4483 regcache_cache_only(rt5665->regmap, true); in rt5665_suspend()
4484 regcache_mark_dirty(rt5665->regmap); in rt5665_suspend()
4492 regcache_cache_only(rt5665->regmap, false); in rt5665_resume()
4493 regcache_sync(rt5665->regmap); in rt5665_resume()
4515 .name = "rt5665-aif1_1",
4534 .name = "rt5665-aif1_2",
4546 .name = "rt5665-aif2_1",
4565 .name = "rt5665-aif2_2",
4584 .name = "rt5665-aif3",
4645 rt5665->pdata.in1_diff = of_property_read_bool(dev->of_node, in rt5665_parse_dt()
4646 "realtek,in1-differential"); in rt5665_parse_dt()
4647 rt5665->pdata.in2_diff = of_property_read_bool(dev->of_node, in rt5665_parse_dt()
4648 "realtek,in2-differential"); in rt5665_parse_dt()
4649 rt5665->pdata.in3_diff = of_property_read_bool(dev->of_node, in rt5665_parse_dt()
4650 "realtek,in3-differential"); in rt5665_parse_dt()
4651 rt5665->pdata.in4_diff = of_property_read_bool(dev->of_node, in rt5665_parse_dt()
4652 "realtek,in4-differential"); in rt5665_parse_dt()
4654 of_property_read_u32(dev->of_node, "realtek,dmic1-data-pin", in rt5665_parse_dt()
4655 &rt5665->pdata.dmic1_data_pin); in rt5665_parse_dt()
4656 of_property_read_u32(dev->of_node, "realtek,dmic2-data-pin", in rt5665_parse_dt()
4657 &rt5665->pdata.dmic2_data_pin); in rt5665_parse_dt()
4658 of_property_read_u32(dev->of_node, "realtek,jd-src", in rt5665_parse_dt()
4659 &rt5665->pdata.jd_src); in rt5665_parse_dt()
4668 mutex_lock(&rt5665->calibrate_mutex); in rt5665_calibrate()
4670 regcache_cache_bypass(rt5665->regmap, true); in rt5665_calibrate()
4672 regmap_write(rt5665->regmap, RT5665_RESET, 0); in rt5665_calibrate()
4673 regmap_write(rt5665->regmap, RT5665_BIAS_CUR_CTRL_8, 0xa602); in rt5665_calibrate()
4674 regmap_write(rt5665->regmap, RT5665_HP_CHARGE_PUMP_1, 0x0c26); in rt5665_calibrate()
4675 regmap_write(rt5665->regmap, RT5665_MONOMIX_IN_GAIN, 0x021f); in rt5665_calibrate()
4676 regmap_write(rt5665->regmap, RT5665_MONO_OUT, 0x480a); in rt5665_calibrate()
4677 regmap_write(rt5665->regmap, RT5665_PWR_MIXER, 0x083f); in rt5665_calibrate()
4678 regmap_write(rt5665->regmap, RT5665_PWR_DIG_1, 0x0180); in rt5665_calibrate()
4679 regmap_write(rt5665->regmap, RT5665_EJD_CTRL_1, 0x4040); in rt5665_calibrate()
4680 regmap_write(rt5665->regmap, RT5665_HP_LOGIC_CTRL_2, 0x0000); in rt5665_calibrate()
4681 regmap_write(rt5665->regmap, RT5665_DIG_MISC, 0x0001); in rt5665_calibrate()
4682 regmap_write(rt5665->regmap, RT5665_MICBIAS_2, 0x0380); in rt5665_calibrate()
4683 regmap_write(rt5665->regmap, RT5665_GLB_CLK, 0x8000); in rt5665_calibrate()
4684 regmap_write(rt5665->regmap, RT5665_ADDA_CLK_1, 0x1000); in rt5665_calibrate()
4685 regmap_write(rt5665->regmap, RT5665_CHOP_DAC, 0x3030); in rt5665_calibrate()
4686 regmap_write(rt5665->regmap, RT5665_CALIB_ADC_CTRL, 0x3c05); in rt5665_calibrate()
4687 regmap_write(rt5665->regmap, RT5665_PWR_ANLG_1, 0xaa3e); in rt5665_calibrate()
4689 regmap_write(rt5665->regmap, RT5665_PWR_ANLG_1, 0xfe7e); in rt5665_calibrate()
4690 regmap_write(rt5665->regmap, RT5665_HP_CALIB_CTRL_2, 0x0321); in rt5665_calibrate()
4692 regmap_write(rt5665->regmap, RT5665_HP_CALIB_CTRL_1, 0xfc00); in rt5665_calibrate()
4695 regmap_read(rt5665->regmap, RT5665_HP_CALIB_STA_1, &value); in rt5665_calibrate()
4703 regmap_write(rt5665->regmap, RT5665_RESET, 0); in rt5665_calibrate()
4704 regcache_cache_bypass(rt5665->regmap, false); in rt5665_calibrate()
4711 regmap_write(rt5665->regmap, RT5665_MONO_AMP_CALIB_CTRL_1, 0x9e24); in rt5665_calibrate()
4714 regmap_read(rt5665->regmap, RT5665_MONO_AMP_CALIB_STA1, &value); in rt5665_calibrate()
4722 regmap_write(rt5665->regmap, RT5665_RESET, 0); in rt5665_calibrate()
4723 regcache_cache_bypass(rt5665->regmap, false); in rt5665_calibrate()
4730 regmap_write(rt5665->regmap, RT5665_RESET, 0); in rt5665_calibrate()
4731 regcache_cache_bypass(rt5665->regmap, false); in rt5665_calibrate()
4733 regcache_mark_dirty(rt5665->regmap); in rt5665_calibrate()
4734 regcache_sync(rt5665->regmap); in rt5665_calibrate()
4736 regmap_write(rt5665->regmap, RT5665_BIAS_CUR_CTRL_8, 0xa602); in rt5665_calibrate()
4737 regmap_write(rt5665->regmap, RT5665_ASRC_8, 0x0120); in rt5665_calibrate()
4740 rt5665->calibration_done = true; in rt5665_calibrate()
4741 mutex_unlock(&rt5665->calibrate_mutex); in rt5665_calibrate()
4749 while (!snd_soc_card_is_instantiated(rt5665->component->card)) { in rt5665_calibrate_handler()
4759 struct rt5665_platform_data *pdata = dev_get_platdata(&i2c->dev); in rt5665_i2c_probe()
4764 rt5665 = devm_kzalloc(&i2c->dev, sizeof(struct rt5665_priv), in rt5665_i2c_probe()
4768 return -ENOMEM; in rt5665_i2c_probe()
4773 rt5665->pdata = *pdata; in rt5665_i2c_probe()
4775 rt5665_parse_dt(rt5665, &i2c->dev); in rt5665_i2c_probe()
4777 for (i = 0; i < ARRAY_SIZE(rt5665->supplies); i++) in rt5665_i2c_probe()
4778 rt5665->supplies[i].supply = rt5665_supply_names[i]; in rt5665_i2c_probe()
4780 ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(rt5665->supplies), in rt5665_i2c_probe()
4781 rt5665->supplies); in rt5665_i2c_probe()
4783 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret); in rt5665_i2c_probe()
4787 ret = regulator_bulk_enable(ARRAY_SIZE(rt5665->supplies), in rt5665_i2c_probe()
4788 rt5665->supplies); in rt5665_i2c_probe()
4790 dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret); in rt5665_i2c_probe()
4795 rt5665->gpiod_ldo1_en = devm_gpiod_get_optional(&i2c->dev, in rt5665_i2c_probe()
4796 "realtek,ldo1-en", in rt5665_i2c_probe()
4798 if (IS_ERR(rt5665->gpiod_ldo1_en)) { in rt5665_i2c_probe()
4799 dev_err(&i2c->dev, "Failed gpio request ldo1_en\n"); in rt5665_i2c_probe()
4800 return PTR_ERR(rt5665->gpiod_ldo1_en); in rt5665_i2c_probe()
4806 rt5665->regmap = devm_regmap_init_i2c(i2c, &rt5665_regmap); in rt5665_i2c_probe()
4807 if (IS_ERR(rt5665->regmap)) { in rt5665_i2c_probe()
4808 ret = PTR_ERR(rt5665->regmap); in rt5665_i2c_probe()
4809 dev_err(&i2c->dev, "Failed to allocate register map: %d\n", in rt5665_i2c_probe()
4814 regmap_read(rt5665->regmap, RT5665_DEVICE_ID, &val); in rt5665_i2c_probe()
4816 dev_err(&i2c->dev, in rt5665_i2c_probe()
4818 return -ENODEV; in rt5665_i2c_probe()
4821 regmap_read(rt5665->regmap, RT5665_RESET, &val); in rt5665_i2c_probe()
4824 rt5665->id = CODEC_5666; in rt5665_i2c_probe()
4828 rt5665->id = CODEC_5665; in rt5665_i2c_probe()
4832 regmap_write(rt5665->regmap, RT5665_RESET, 0); in rt5665_i2c_probe()
4835 if (rt5665->pdata.in1_diff) in rt5665_i2c_probe()
4836 regmap_update_bits(rt5665->regmap, RT5665_IN1_IN2, in rt5665_i2c_probe()
4838 if (rt5665->pdata.in2_diff) in rt5665_i2c_probe()
4839 regmap_update_bits(rt5665->regmap, RT5665_IN1_IN2, in rt5665_i2c_probe()
4841 if (rt5665->pdata.in3_diff) in rt5665_i2c_probe()
4842 regmap_update_bits(rt5665->regmap, RT5665_IN3_IN4, in rt5665_i2c_probe()
4844 if (rt5665->pdata.in4_diff) in rt5665_i2c_probe()
4845 regmap_update_bits(rt5665->regmap, RT5665_IN3_IN4, in rt5665_i2c_probe()
4849 if (rt5665->pdata.dmic1_data_pin != RT5665_DMIC1_NULL || in rt5665_i2c_probe()
4850 rt5665->pdata.dmic2_data_pin != RT5665_DMIC2_NULL) { in rt5665_i2c_probe()
4851 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_2, in rt5665_i2c_probe()
4853 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_1, in rt5665_i2c_probe()
4855 switch (rt5665->pdata.dmic1_data_pin) { in rt5665_i2c_probe()
4857 regmap_update_bits(rt5665->regmap, RT5665_DMIC_CTRL_1, in rt5665_i2c_probe()
4862 regmap_update_bits(rt5665->regmap, RT5665_DMIC_CTRL_1, in rt5665_i2c_probe()
4864 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_1, in rt5665_i2c_probe()
4869 dev_dbg(&i2c->dev, "no DMIC1\n"); in rt5665_i2c_probe()
4873 switch (rt5665->pdata.dmic2_data_pin) { in rt5665_i2c_probe()
4875 regmap_update_bits(rt5665->regmap, RT5665_DMIC_CTRL_1, in rt5665_i2c_probe()
4880 regmap_update_bits(rt5665->regmap, in rt5665_i2c_probe()
4884 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_1, in rt5665_i2c_probe()
4889 dev_dbg(&i2c->dev, "no DMIC2\n"); in rt5665_i2c_probe()
4895 regmap_write(rt5665->regmap, RT5665_HP_LOGIC_CTRL_2, 0x0002); in rt5665_i2c_probe()
4896 regmap_update_bits(rt5665->regmap, RT5665_EJD_CTRL_1, in rt5665_i2c_probe()
4899 regmap_update_bits(rt5665->regmap, RT5665_STO1_DAC_SIL_DET, in rt5665_i2c_probe()
4902 regmap_update_bits(rt5665->regmap, RT5665_HP_CHARGE_PUMP_1, in rt5665_i2c_probe()
4906 if (rt5665->id == CODEC_5666) { in rt5665_i2c_probe()
4907 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_2, in rt5665_i2c_probe()
4909 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_3, in rt5665_i2c_probe()
4914 regmap_update_bits(rt5665->regmap, RT5665_PWR_ANLG_1, in rt5665_i2c_probe()
4918 INIT_DELAYED_WORK(&rt5665->jack_detect_work, in rt5665_i2c_probe()
4920 INIT_DELAYED_WORK(&rt5665->calibrate_work, in rt5665_i2c_probe()
4922 INIT_DELAYED_WORK(&rt5665->jd_check_work, in rt5665_i2c_probe()
4925 mutex_init(&rt5665->calibrate_mutex); in rt5665_i2c_probe()
4927 if (i2c->irq) { in rt5665_i2c_probe()
4928 ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, in rt5665_i2c_probe()
4932 dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret); in rt5665_i2c_probe()
4936 return devm_snd_soc_register_component(&i2c->dev, in rt5665_i2c_probe()
4945 regmap_write(rt5665->regmap, RT5665_RESET, 0); in rt5665_i2c_shutdown()