Lines Matching refs:RT5663_PWR_ANLG_1

827 	case RT5663_PWR_ANLG_1:  in rt5663_readable_register()
1565 snd_soc_component_update_bits(component, RT5663_PWR_ANLG_1, in rt5663_jack_detect()
1569 snd_soc_component_update_bits(component, RT5663_PWR_ANLG_1, in rt5663_jack_detect()
1574 snd_soc_component_update_bits(component, RT5663_PWR_ANLG_1, in rt5663_jack_detect()
1635 RT5663_PWR_ANLG_1, in rt5663_jack_detect()
1662 snd_soc_component_update_bits(component, RT5663_PWR_ANLG_1, in rt5663_jack_detect()
1711 snd_soc_component_update_bits(component, RT5663_PWR_ANLG_1, in rt5663_impedance_sensing()
1716 snd_soc_component_update_bits(component, RT5663_PWR_ANLG_1, in rt5663_impedance_sensing()
1803 snd_soc_component_update_bits(component, RT5663_PWR_ANLG_1, in rt5663_impedance_sensing()
3081 snd_soc_component_update_bits(component, RT5663_PWR_ANLG_1, in rt5663_set_bias_level()
3104 snd_soc_component_update_bits(component, RT5663_PWR_ANLG_1, in rt5663_set_bias_level()
3122 RT5663_PWR_ANLG_1, in rt5663_set_bias_level()
3128 RT5663_PWR_ANLG_1, in rt5663_set_bias_level()
3332 regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0xa23e); in rt5663_v2_calibrate()
3334 regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0xf23e); in rt5663_v2_calibrate()
3355 regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0xa23b); in rt5663_calibrate()
3357 regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0xf23b); in rt5663_calibrate()
3448 regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0x003b); in rt5663_calibrate()
3650 regmap_update_bits(rt5663->regmap, RT5663_PWR_ANLG_1, in rt5663_i2c_probe()