Lines Matching refs:NAU8821_R01_ENA_CTRL

131 	{ NAU8821_R01_ENA_CTRL, 0x00ff },
213 	case NAU8821_R00_RESET ... NAU8821_R01_ENA_CTRL:  in nau8821_readable_reg()
239 	case NAU8821_R00_RESET ... NAU8821_R01_ENA_CTRL:  in nau8821_writeable_reg()
515 		regmap_update_bits(nau8821->regmap, NAU8821_R01_ENA_CTRL,  in nau8821_left_adc_event()
520 			NAU8821_R01_ENA_CTRL, NAU8821_EN_ADCL, 0);  in nau8821_left_adc_event()
539 		regmap_update_bits(nau8821->regmap, NAU8821_R01_ENA_CTRL,  in nau8821_right_adc_event()
544 			NAU8821_R01_ENA_CTRL, NAU8821_EN_ADCR, 0);  in nau8821_right_adc_event()
674 	SND_SOC_DAPM_PGA_S("ADCL Digital path", 0, NAU8821_R01_ENA_CTRL,
677 	SND_SOC_DAPM_PGA_S("ADCR Digital path", 0, NAU8821_R01_ENA_CTRL,
694 	SND_SOC_DAPM_DAC("DDACR", NULL, NAU8821_R01_ENA_CTRL,
696 	SND_SOC_DAPM_DAC("DDACL", NULL, NAU8821_R01_ENA_CTRL,