Lines Matching refs:component
310 static void m98088_eq_band(struct snd_soc_component *component, unsigned int dai, in m98088_eq_band() argument
328 snd_soc_component_write(component, eq_reg++, M98088_BYTE1(coefs[i])); in m98088_eq_band()
329 snd_soc_component_write(component, eq_reg++, M98088_BYTE0(coefs[i])); in m98088_eq_band()
383 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_mic1pre_set() local
384 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_mic1pre_set()
388 snd_soc_component_update_bits(component, M98088_REG_35_LVL_MIC1, M98088_MICPRE_MASK, in max98088_mic1pre_set()
397 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_mic1pre_get() local
398 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_mic1pre_get()
407 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_mic2pre_set() local
408 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_mic2pre_set()
412 snd_soc_component_update_bits(component, M98088_REG_36_LVL_MIC2, M98088_MICPRE_MASK, in max98088_mic2pre_set()
421 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_mic2pre_get() local
422 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_mic2pre_get()
623 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in max98088_mic_event() local
624 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_mic_event()
629 snd_soc_component_update_bits(component, w->reg, M98088_MICPRE_MASK, in max98088_mic_event()
632 snd_soc_component_update_bits(component, w->reg, M98088_MICPRE_MASK, in max98088_mic_event()
637 snd_soc_component_update_bits(component, w->reg, M98088_MICPRE_MASK, 0); in max98088_mic_event()
653 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in max98088_line_pga() local
654 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_line_pga()
674 snd_soc_component_update_bits(component, w->reg, in max98088_line_pga()
680 snd_soc_component_update_bits(component, w->reg, in max98088_line_pga()
969 struct snd_soc_component *component = dai->component; in max98088_dai1_hw_params() local
970 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_dai1_hw_params()
982 snd_soc_component_update_bits(component, M98088_REG_14_DAI1_FORMAT, in max98088_dai1_hw_params()
986 snd_soc_component_update_bits(component, M98088_REG_14_DAI1_FORMAT, in max98088_dai1_hw_params()
993 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, 0); in max98088_dai1_hw_params()
998 snd_soc_component_update_bits(component, M98088_REG_11_DAI1_CLKMODE, in max98088_dai1_hw_params()
1003 if (snd_soc_component_read(component, M98088_REG_14_DAI1_FORMAT) in max98088_dai1_hw_params()
1008 dev_err(component->dev, "Invalid system clock frequency\n"); in max98088_dai1_hw_params()
1015 snd_soc_component_write(component, M98088_REG_12_DAI1_CLKCFG_HI, in max98088_dai1_hw_params()
1017 snd_soc_component_write(component, M98088_REG_13_DAI1_CLKCFG_LO, in max98088_dai1_hw_params()
1023 snd_soc_component_update_bits(component, M98088_REG_18_DAI1_FILTERS, in max98088_dai1_hw_params()
1026 snd_soc_component_update_bits(component, M98088_REG_18_DAI1_FILTERS, in max98088_dai1_hw_params()
1029 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, in max98088_dai1_hw_params()
1039 struct snd_soc_component *component = dai->component; in max98088_dai2_hw_params() local
1040 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_dai2_hw_params()
1052 snd_soc_component_update_bits(component, M98088_REG_1C_DAI2_FORMAT, in max98088_dai2_hw_params()
1056 snd_soc_component_update_bits(component, M98088_REG_1C_DAI2_FORMAT, in max98088_dai2_hw_params()
1063 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, 0); in max98088_dai2_hw_params()
1068 snd_soc_component_update_bits(component, M98088_REG_19_DAI2_CLKMODE, in max98088_dai2_hw_params()
1073 if (snd_soc_component_read(component, M98088_REG_1C_DAI2_FORMAT) in max98088_dai2_hw_params()
1078 dev_err(component->dev, "Invalid system clock frequency\n"); in max98088_dai2_hw_params()
1085 snd_soc_component_write(component, M98088_REG_1A_DAI2_CLKCFG_HI, in max98088_dai2_hw_params()
1087 snd_soc_component_write(component, M98088_REG_1B_DAI2_CLKCFG_LO, in max98088_dai2_hw_params()
1093 snd_soc_component_update_bits(component, M98088_REG_20_DAI2_FILTERS, in max98088_dai2_hw_params()
1096 snd_soc_component_update_bits(component, M98088_REG_20_DAI2_FILTERS, in max98088_dai2_hw_params()
1099 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, in max98088_dai2_hw_params()
1108 struct snd_soc_component *component = dai->component; in max98088_dai_set_sysclk() local
1109 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_dai_set_sysclk()
1125 snd_soc_component_write(component, M98088_REG_10_SYS_CLK, 0x10); in max98088_dai_set_sysclk()
1128 snd_soc_component_write(component, M98088_REG_10_SYS_CLK, 0x20); in max98088_dai_set_sysclk()
1131 dev_err(component->dev, "Invalid master clock frequency\n"); in max98088_dai_set_sysclk()
1135 if (snd_soc_component_read(component, M98088_REG_51_PWR_SYS) & M98088_SHDNRUN) { in max98088_dai_set_sysclk()
1136 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, in max98088_dai_set_sysclk()
1138 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, in max98088_dai_set_sysclk()
1151 struct snd_soc_component *component = codec_dai->component; in max98088_dai1_set_fmt() local
1152 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_dai1_set_fmt()
1165 snd_soc_component_write(component, M98088_REG_12_DAI1_CLKCFG_HI, in max98088_dai1_set_fmt()
1167 snd_soc_component_write(component, M98088_REG_13_DAI1_CLKCFG_LO, in max98088_dai1_set_fmt()
1175 dev_err(component->dev, "Clock mode unsupported"); in max98088_dai1_set_fmt()
1205 snd_soc_component_update_bits(component, M98088_REG_14_DAI1_FORMAT, in max98088_dai1_set_fmt()
1212 snd_soc_component_write(component, M98088_REG_15_DAI1_CLOCK, reg15val); in max98088_dai1_set_fmt()
1221 struct snd_soc_component *component = codec_dai->component; in max98088_dai2_set_fmt() local
1222 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_dai2_set_fmt()
1234 snd_soc_component_write(component, M98088_REG_1A_DAI2_CLKCFG_HI, in max98088_dai2_set_fmt()
1236 snd_soc_component_write(component, M98088_REG_1B_DAI2_CLKCFG_LO, in max98088_dai2_set_fmt()
1244 dev_err(component->dev, "Clock mode unsupported"); in max98088_dai2_set_fmt()
1274 snd_soc_component_update_bits(component, M98088_REG_1C_DAI2_FORMAT, in max98088_dai2_set_fmt()
1278 snd_soc_component_write(component, M98088_REG_1D_DAI2_CLOCK, in max98088_dai2_set_fmt()
1288 struct snd_soc_component *component = codec_dai->component; in max98088_dai1_mute() local
1296 snd_soc_component_update_bits(component, M98088_REG_2F_LVL_DAI1_PLAY, in max98088_dai1_mute()
1304 struct snd_soc_component *component = codec_dai->component; in max98088_dai2_mute() local
1312 snd_soc_component_update_bits(component, M98088_REG_31_LVL_DAI2_PLAY, in max98088_dai2_mute()
1317 static int max98088_set_bias_level(struct snd_soc_component *component, in max98088_set_bias_level() argument
1320 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_set_bias_level()
1335 if (snd_soc_component_get_bias_level(component) == in max98088_set_bias_level()
1344 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) in max98088_set_bias_level()
1347 snd_soc_component_update_bits(component, M98088_REG_4C_PWR_EN_IN, in max98088_set_bias_level()
1352 snd_soc_component_update_bits(component, M98088_REG_4C_PWR_EN_IN, in max98088_set_bias_level()
1413 static int max98088_get_channel(struct snd_soc_component *component, const char *name) in max98088_get_channel() argument
1419 dev_err(component->dev, "Bad EQ channel name '%s'\n", name); in max98088_get_channel()
1423 static void max98088_setup_eq1(struct snd_soc_component *component) in max98088_setup_eq1() argument
1425 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_setup_eq1()
1450 dev_dbg(component->dev, "Selected %s/%dHz for %dHz sample rate\n", in max98088_setup_eq1()
1455 save = snd_soc_component_read(component, M98088_REG_49_CFG_LEVEL); in max98088_setup_eq1()
1456 snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ1EN, 0); in max98088_setup_eq1()
1460 m98088_eq_band(component, 0, 0, coef_set->band1); in max98088_setup_eq1()
1461 m98088_eq_band(component, 0, 1, coef_set->band2); in max98088_setup_eq1()
1462 m98088_eq_band(component, 0, 2, coef_set->band3); in max98088_setup_eq1()
1463 m98088_eq_band(component, 0, 3, coef_set->band4); in max98088_setup_eq1()
1464 m98088_eq_band(component, 0, 4, coef_set->band5); in max98088_setup_eq1()
1467 snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ1EN, save); in max98088_setup_eq1()
1470 static void max98088_setup_eq2(struct snd_soc_component *component) in max98088_setup_eq2() argument
1472 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_setup_eq2()
1497 dev_dbg(component->dev, "Selected %s/%dHz for %dHz sample rate\n", in max98088_setup_eq2()
1502 save = snd_soc_component_read(component, M98088_REG_49_CFG_LEVEL); in max98088_setup_eq2()
1503 snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ2EN, 0); in max98088_setup_eq2()
1507 m98088_eq_band(component, 1, 0, coef_set->band1); in max98088_setup_eq2()
1508 m98088_eq_band(component, 1, 1, coef_set->band2); in max98088_setup_eq2()
1509 m98088_eq_band(component, 1, 2, coef_set->band3); in max98088_setup_eq2()
1510 m98088_eq_band(component, 1, 3, coef_set->band4); in max98088_setup_eq2()
1511 m98088_eq_band(component, 1, 4, coef_set->band5); in max98088_setup_eq2()
1514 snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ2EN, in max98088_setup_eq2()
1521 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_put_eq_enum() local
1522 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_put_eq_enum()
1524 int channel = max98088_get_channel(component, kcontrol->id.name); in max98088_put_eq_enum()
1540 max98088_setup_eq1(component); in max98088_put_eq_enum()
1543 max98088_setup_eq2(component); in max98088_put_eq_enum()
1553 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_get_eq_enum() local
1554 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_get_eq_enum()
1555 int channel = max98088_get_channel(component, kcontrol->id.name); in max98088_get_eq_enum()
1566 static void max98088_handle_eq_pdata(struct snd_soc_component *component) in max98088_handle_eq_pdata() argument
1568 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_handle_eq_pdata()
1621 ret = snd_soc_add_component_controls(component, controls, ARRAY_SIZE(controls)); in max98088_handle_eq_pdata()
1623 dev_err(component->dev, "Failed to add EQ control: %d\n", ret); in max98088_handle_eq_pdata()
1626 static void max98088_handle_pdata(struct snd_soc_component *component) in max98088_handle_pdata() argument
1628 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_handle_pdata()
1633 dev_dbg(component->dev, "No platform data\n"); in max98088_handle_pdata()
1646 snd_soc_component_write(component, M98088_REG_48_CFG_MIC, regval); in max98088_handle_pdata()
1650 snd_soc_component_update_bits(component, M98088_REG_2A_MIC_REC_CNTL, in max98088_handle_pdata()
1655 max98088_handle_eq_pdata(component); in max98088_handle_pdata()
1658 static int max98088_probe(struct snd_soc_component *component) in max98088_probe() argument
1660 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_probe()
1688 ret = snd_soc_component_read(component, M98088_REG_FF_REV_ID); in max98088_probe()
1690 dev_err(component->dev, "Failed to read device revision: %d\n", in max98088_probe()
1694 dev_info(component->dev, "revision %c\n", ret - 0x40 + 'A'); in max98088_probe()
1696 snd_soc_component_write(component, M98088_REG_51_PWR_SYS, M98088_PWRSV); in max98088_probe()
1698 snd_soc_component_write(component, M98088_REG_0F_IRQ_ENABLE, 0x00); in max98088_probe()
1700 snd_soc_component_write(component, M98088_REG_22_MIX_DAC, in max98088_probe()
1704 snd_soc_component_write(component, M98088_REG_4E_BIAS_CNTL, 0xF0); in max98088_probe()
1705 snd_soc_component_write(component, M98088_REG_50_DAC_BIAS2, 0x0F); in max98088_probe()
1707 snd_soc_component_write(component, M98088_REG_16_DAI1_IOCFG, in max98088_probe()
1710 snd_soc_component_write(component, M98088_REG_1E_DAI2_IOCFG, in max98088_probe()
1713 max98088_handle_pdata(component); in max98088_probe()
1719 static void max98088_remove(struct snd_soc_component *component) in max98088_remove() argument
1721 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_remove()