802 	struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX];  in da7219_dai_event()  local
811 			if (bclk) {  in da7219_dai_event()
812 				ret = clk_prepare_enable(bclk);  in da7219_dai_event()
858 			if (bclk)  in da7219_dai_event()
859 				clk_disable_unprepare(bclk);  in da7219_dai_event()
1430 	struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX];  in da7219_set_dai_tdm_slot()  local
1475 		if (bclk) {  in da7219_set_dai_tdm_slot()
1478 			ret = clk_set_rate(bclk, bclk_rate);  in da7219_set_dai_tdm_slot()
1481 					"Failed to set TDM BCLK rate %lu: %d\n",  in da7219_set_dai_tdm_slot()
1566 	struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX];  in da7219_hw_params()  local
1617 	 * If we're master, then we have a limited set of BCLK rates we  in da7219_hw_params()
1619 	 * the BCLK rate automatically.  in da7219_hw_params()
1627 		if (bclk) {  in da7219_hw_params()
1631 			 * new rate on an already enabled bclk. In that  in da7219_hw_params()
1634 			 * problem, as long as the BCLK rate is suitable for the  in da7219_hw_params()
1637 			bclk_rate = clk_round_rate(bclk, bclk_rate);  in da7219_hw_params()
1640 					"BCLK rate mismatch against frame size");  in da7219_hw_params()
1644 			ret = clk_set_rate(bclk, bclk_rate);  in da7219_hw_params()
1647 					"Failed to set BCLK rate %lu: %d\n",  in da7219_hw_params()
1780 	pdata->dai_clk_names[DA7219_DAI_BCLK_IDX] = "da7219-dai-bclk";  in da7219_fw_to_pdata()
2085 	 * We don't allow changing the parent rate as some BCLK rates can be  in da7219_bclk_round_rate()
2086 	 * derived from multiple parent WCLK rates (BCLK rates are set as a  in da7219_bclk_round_rate()
2088 	 * parent WCLK rate set and find the appropriate multiplier of BCLK to  in da7219_bclk_round_rate()
2089 	 * get the rounded down BCLK value.  in da7219_bclk_round_rate()
2171 			/* Make WCLK the parent of BCLK */  in da7219_register_dai_clks()