Lines Matching +full:2 +full:v
44 #define CS43130_PLL_SET_2 0x030002 /* PLL Setting 2 */
55 #define CS43130_ASP_NUM_2 0x040011 /* ASP Numerator 2 */
57 #define CS43130_ASP_DEN_2 0x040013 /* ASP Denominator 2 */
59 #define CS43130_ASP_LRCK_HI_TIME_2 0x040015 /* ASP LRCK High Time 2 */
61 #define CS43130_ASP_LRCK_PERIOD_2 0x040017 /* ASP LRCK Period 2 */
65 #define CS43130_XSP_NUM_2 0x040021 /* XSP Numerator 2 */
67 #define CS43130_XSP_DEN_2 0x040023 /* XSP Denominator 2 */
69 #define CS43130_XSP_LRCK_HI_TIME_2 0x040025 /* XSP LRCK High Time 2 */
71 #define CS43130_XSP_LRCK_PERIOD_2 0x040027 /* XSP LRCK Period 2 */
75 #define CS43130_ASP_CH_2_LOC 0x050001 /* ASP Chan 2 Location */
77 #define CS43130_ASP_CH_2_SZ_EN 0x05000B /* ASP Chan 2 Size, Enable */
79 #define CS43130_XSP_CH_2_LOC 0x060001 /* XSP Chan 2 Location */
81 #define CS43130_XSP_CH_2_SZ_EN 0x06000B /* XSP Chan 2 Size, Enable */
86 #define CS43130_DSD_PATH_CTL_2 0x070004 /* DSD Proc Path Sig Ctl 2 */
96 #define CS43130_PCM_PATH_CTL_2 0x090004 /* PCM Path Signal Ctl 2 */
111 #define CS43130_HP_MEAS_LOAD_2 0x0E0004 /* HP Load Measurement 2 */
118 #define CS43130_INT_STATUS_2 0x0F0001 /* Interrupt Status 2 */
123 #define CS43130_INT_MASK_2 0x0F0011 /* Interrupt Mask 2 */
131 #define CS43130_MCLK_INT_SHIFT 2
134 #define CS43130_CH_EN_SHIFT 2
137 #define CS43130_XSP_BITSIZE_SHIFT 2
155 #define CS43130_PLL_RDY_INT_SHIFT 2
168 #define CS43130_HPLOAD_DC_INT_SHIFT 2
213 #define CS43130_SP_SCPOL_IN_SHIFT 2
231 #define CS43130_PDN_PLL_SHIFT 2
307 #define CS43130_DSD_SPEED_SHIFT 2
334 CS43130_DSD_SRC_ASP = 2,
363 CS43130_XTAL_IBIAS_15UA = 2,
379 struct u16_fract v; member
384 { 22579200, 32000, .v = { 10, 441, }, },
385 { 22579200, 44100, .v = { 1, 32, }, },
386 { 22579200, 48000, .v = { 5, 147, }, },
387 { 22579200, 88200, .v = { 1, 16, }, },
388 { 22579200, 96000, .v = { 10, 147, }, },
389 { 22579200, 176400, .v = { 1, 8, }, },
390 { 22579200, 192000, .v = { 20, 147, }, },
391 { 22579200, 352800, .v = { 1, 4, }, },
392 { 22579200, 384000, .v = { 40, 147, }, },
393 { 24576000, 32000, .v = { 1, 48, }, },
394 { 24576000, 44100, .v = { 147, 5120, }, },
395 { 24576000, 48000, .v = { 1, 32, }, },
396 { 24576000, 88200, .v = { 147, 2560, }, },
397 { 24576000, 96000, .v = { 1, 16, }, },
398 { 24576000, 176400, .v = { 147, 1280, }, },
399 { 24576000, 192000, .v = { 1, 8, }, },
400 { 24576000, 352800, .v = { 147, 640, }, },
401 { 24576000, 384000, .v = { 1, 4, }, },
406 { 22579200, 32000, .v = { 20, 441, }, },
407 { 22579200, 44100, .v = { 1, 16, }, },
408 { 22579200, 48000, .v = { 10, 147, }, },
409 { 22579200, 88200, .v = { 1, 8, }, },
410 { 22579200, 96000, .v = { 20, 147, }, },
411 { 22579200, 176400, .v = { 1, 4, }, },
412 { 22579200, 192000, .v = { 40, 147, }, },
413 { 22579200, 352800, .v = { 1, 2, }, },
414 { 22579200, 384000, .v = { 80, 147, }, },
415 { 24576000, 32000, .v = { 1, 24, }, },
416 { 24576000, 44100, .v = { 147, 2560, }, },
417 { 24576000, 48000, .v = { 1, 16, }, },
418 { 24576000, 88200, .v = { 147, 1280, }, },
419 { 24576000, 96000, .v = { 1, 8, }, },
420 { 24576000, 176400, .v = { 147, 640, }, },
421 { 24576000, 192000, .v = { 1, 4, }, },
422 { 24576000, 352800, .v = { 147, 320, }, },
423 { 24576000, 384000, .v = { 1, 2, }, },
428 { 22579200, 32000, .v = { 100, 147, }, },
429 { 22579200, 44100, .v = { 3, 32, }, },
430 { 22579200, 48000, .v = { 5, 49, }, },
431 { 22579200, 88200, .v = { 3, 16, }, },
432 { 22579200, 96000, .v = { 10, 49, }, },
433 { 22579200, 176400, .v = { 3, 8, }, },
434 { 22579200, 192000, .v = { 20, 49, }, },
435 { 22579200, 352800, .v = { 3, 4, }, },
436 { 22579200, 384000, .v = { 40, 49, }, },
437 { 24576000, 32000, .v = { 1, 16, }, },
438 { 24576000, 44100, .v = { 441, 5120, }, },
439 { 24576000, 48000, .v = { 3, 32, }, },
440 { 24576000, 88200, .v = { 441, 2560, }, },
441 { 24576000, 96000, .v = { 3, 16, }, },
442 { 24576000, 176400, .v = { 441, 1280, }, },
443 { 24576000, 192000, .v = { 3, 8, }, },
444 { 24576000, 352800, .v = { 441, 640, }, },
445 { 24576000, 384000, .v = { 3, 4, }, },
450 { 22579200, 32000, .v = { 40, 441, }, },
451 { 22579200, 44100, .v = { 1, 8, }, },
452 { 22579200, 48000, .v = { 20, 147, }, },
453 { 22579200, 88200, .v = { 1, 4, }, },
454 { 22579200, 96000, .v = { 40, 147, }, },
455 { 22579200, 176400, .v = { 1, 2, }, },
456 { 22579200, 192000, .v = { 80, 147, }, },
457 { 22579200, 352800, .v = { 1, 1, }, },
458 { 24576000, 32000, .v = { 1, 12, }, },
459 { 24576000, 44100, .v = { 147, 1280, }, },
460 { 24576000, 48000, .v = { 1, 8, }, },
461 { 24576000, 88200, .v = { 147, 640, }, },
462 { 24576000, 96000, .v = { 1, 4, }, },
463 { 24576000, 176400, .v = { 147, 320, }, },
464 { 24576000, 192000, .v = { 1, 2, }, },
465 { 24576000, 352800, .v = { 147, 160, }, },
466 { 24576000, 384000, .v = { 1, 1, }, },
483 #define CS43130_DC_THRESHOLD 2
529 u16 hpload_dc[2];
532 u16 hpload_ac[CS43130_AC_FREQ][2];