Lines Matching refs:CS42L43_DECL_MUX

30 #define CS42L43_DECL_MUX(name, reg) \  macro
38 CS42L43_DECL_MUX(name##_in1, reg); \
39 CS42L43_DECL_MUX(name##_in2, reg + 0x4); \
40 CS42L43_DECL_MUX(name##_in3, reg + 0x8); \
41 CS42L43_DECL_MUX(name##_in4, reg + 0xC)
779 CS42L43_DECL_MUX(asptx1, CS42L43_ASPTX1_INPUT);
780 CS42L43_DECL_MUX(asptx2, CS42L43_ASPTX2_INPUT);
781 CS42L43_DECL_MUX(asptx3, CS42L43_ASPTX3_INPUT);
782 CS42L43_DECL_MUX(asptx4, CS42L43_ASPTX4_INPUT);
783 CS42L43_DECL_MUX(asptx5, CS42L43_ASPTX5_INPUT);
784 CS42L43_DECL_MUX(asptx6, CS42L43_ASPTX6_INPUT);
786 CS42L43_DECL_MUX(dp1tx1, CS42L43_SWIRE_DP1_CH1_INPUT);
787 CS42L43_DECL_MUX(dp1tx2, CS42L43_SWIRE_DP1_CH2_INPUT);
788 CS42L43_DECL_MUX(dp1tx3, CS42L43_SWIRE_DP1_CH3_INPUT);
789 CS42L43_DECL_MUX(dp1tx4, CS42L43_SWIRE_DP1_CH4_INPUT);
790 CS42L43_DECL_MUX(dp2tx1, CS42L43_SWIRE_DP2_CH1_INPUT);
791 CS42L43_DECL_MUX(dp2tx2, CS42L43_SWIRE_DP2_CH2_INPUT);
792 CS42L43_DECL_MUX(dp3tx1, CS42L43_SWIRE_DP3_CH1_INPUT);
793 CS42L43_DECL_MUX(dp3tx2, CS42L43_SWIRE_DP3_CH2_INPUT);
794 CS42L43_DECL_MUX(dp4tx1, CS42L43_SWIRE_DP4_CH1_INPUT);
795 CS42L43_DECL_MUX(dp4tx2, CS42L43_SWIRE_DP4_CH2_INPUT);
797 CS42L43_DECL_MUX(asrcint1, CS42L43_ASRC_INT1_INPUT1);
798 CS42L43_DECL_MUX(asrcint2, CS42L43_ASRC_INT2_INPUT1);
799 CS42L43_DECL_MUX(asrcint3, CS42L43_ASRC_INT3_INPUT1);
800 CS42L43_DECL_MUX(asrcint4, CS42L43_ASRC_INT4_INPUT1);
801 CS42L43_DECL_MUX(asrcdec1, CS42L43_ASRC_DEC1_INPUT1);
802 CS42L43_DECL_MUX(asrcdec2, CS42L43_ASRC_DEC2_INPUT1);
803 CS42L43_DECL_MUX(asrcdec3, CS42L43_ASRC_DEC3_INPUT1);
804 CS42L43_DECL_MUX(asrcdec4, CS42L43_ASRC_DEC4_INPUT1);
806 CS42L43_DECL_MUX(isrc1int1, CS42L43_ISRC1INT1_INPUT1);
807 CS42L43_DECL_MUX(isrc1int2, CS42L43_ISRC1INT2_INPUT1);
808 CS42L43_DECL_MUX(isrc1dec1, CS42L43_ISRC1DEC1_INPUT1);
809 CS42L43_DECL_MUX(isrc1dec2, CS42L43_ISRC1DEC2_INPUT1);
810 CS42L43_DECL_MUX(isrc2int1, CS42L43_ISRC2INT1_INPUT1);
811 CS42L43_DECL_MUX(isrc2int2, CS42L43_ISRC2INT2_INPUT1);
812 CS42L43_DECL_MUX(isrc2dec1, CS42L43_ISRC2DEC1_INPUT1);
813 CS42L43_DECL_MUX(isrc2dec2, CS42L43_ISRC2DEC2_INPUT1);
815 CS42L43_DECL_MUX(spdif1, CS42L43_SPDIF1_INPUT1);
816 CS42L43_DECL_MUX(spdif2, CS42L43_SPDIF2_INPUT1);