Lines Matching refs:CS4265_SPDIF_CTL2

50 	{ CS4265_SPDIF_CTL2, 0x00 },
108 static SOC_ENUM_SINGLE_DECL(spdif_mono_stereo_enum, CS4265_SPDIF_CTL2, 2,
115 static SOC_ENUM_SINGLE_DECL(spdif_mono_select_enum, CS4265_SPDIF_CTL2, 0,
153 	SOC_SINGLE("Validity Bit Control Switch", CS4265_SPDIF_CTL2,
156 	SOC_SINGLE("MMTLR Data Switch", CS4265_SPDIF_CTL2, 0, 1, 0),
188 	SND_SOC_DAPM_SWITCH("SPDIF", CS4265_SPDIF_CTL2, 5, 1,
198 			CS4265_SPDIF_CTL2, 5, 1),
388 		snd_soc_component_update_bits(component, CS4265_SPDIF_CTL2,  in cs4265_mute()
395 		snd_soc_component_update_bits(component, CS4265_SPDIF_CTL2,  in cs4265_mute()
434 		snd_soc_component_update_bits(component, CS4265_SPDIF_CTL2,  in cs4265_pcm_hw_params()
441 			snd_soc_component_update_bits(component, CS4265_SPDIF_CTL2,  in cs4265_pcm_hw_params()
446 			snd_soc_component_update_bits(component, CS4265_SPDIF_CTL2,  in cs4265_pcm_hw_params()
455 		snd_soc_component_update_bits(component, CS4265_SPDIF_CTL2,  in cs4265_pcm_hw_params()