Lines Matching refs:dmadscr
209 acp_dma_dscr_transfer_t dmadscr[NUM_DSCRS_PER_CHANNEL]; in set_acp_sysmem_dma_descriptors() local
212 dmadscr[i].xfer_val = 0; in set_acp_sysmem_dma_descriptors()
215 dmadscr[i].dest = sram_bank + (i * (size / 2)); in set_acp_sysmem_dma_descriptors()
216 dmadscr[i].src = ACP_INTERNAL_APERTURE_WINDOW_0_ADDRESS in set_acp_sysmem_dma_descriptors()
220 dmadscr[i].xfer_val |= in set_acp_sysmem_dma_descriptors()
225 dmadscr[i].xfer_val |= in set_acp_sysmem_dma_descriptors()
231 dmadscr[i].src = sram_bank + (i * (size / 2)); in set_acp_sysmem_dma_descriptors()
232 dmadscr[i].dest = in set_acp_sysmem_dma_descriptors()
237 dmadscr[i].xfer_val |= in set_acp_sysmem_dma_descriptors()
242 dmadscr[i].xfer_val |= in set_acp_sysmem_dma_descriptors()
248 &dmadscr[i]); in set_acp_sysmem_dma_descriptors()
267 acp_dma_dscr_transfer_t dmadscr[NUM_DSCRS_PER_CHANNEL]; in set_acp_to_i2s_dma_descriptors() local
270 dmadscr[i].xfer_val = 0; in set_acp_to_i2s_dma_descriptors()
273 dmadscr[i].src = sram_bank + (i * (size / 2)); in set_acp_to_i2s_dma_descriptors()
275 dmadscr[i].dest = 0; in set_acp_to_i2s_dma_descriptors()
276 dmadscr[i].xfer_val |= BIT(22) | (destination << 16) | in set_acp_to_i2s_dma_descriptors()
281 dmadscr[i].src = 0; in set_acp_to_i2s_dma_descriptors()
282 dmadscr[i].dest = in set_acp_to_i2s_dma_descriptors()
284 dmadscr[i].xfer_val |= BIT(22) | in set_acp_to_i2s_dma_descriptors()
288 &dmadscr[i]); in set_acp_to_i2s_dma_descriptors()