Lines Matching +full:0 +full:x0400000
39 * :1098.7654:3210.9876:5432.1098:7654.3210: 0..31
44 * : . : . : . : x. : HDSPM_ClockModeMaster - 1: Master, 0: Slave
46 * : . : . : . : . : 0:64, 1:128, 2:256, 3:512,
49 … . : . : . :10 . : HDSPM_Frequency1|HDSPM_Frequency0: 1=32K,2=44.1K,3=48K,0=??
57 * : . : . 10: . : . : <MADI> sync ref: 0:WC, 1:Madi, 2:TCO, 3:SyncIn
58 * : . 3 : . 10: 2 . : . : <AES32> 0:WC, 1:AES1 ... 8:AES8, 9: TCO, 10:SyncIn?
60 * : . : . : x . : . : <MADI> HDSPM_InputSelect0 : 0=optical,1=coax
86 * :1098.7654:3210.9876:5432.1098:7654.3210: 0..31
98 * :7654.3210:7654.3210:7654.3210:7654.3210: 0..31
101 * : . : . : . : . x: HDSPM_c0Master 1: Master, 0: Slave
107 * : . : . : . : . : RayDat: 0:WC, 1:AES, 2:SPDIF, 3..6: ADAT1..4,
109 * : . : . : . : . : AIO: 0:WC, 1:AES, 2: SPDIF, 3: ATAT,
116 * :7654.3210:7654.3210:7654.3210:7654.3210: 0..31
143 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
172 #define HDSPM_WR_SETTINGS 0
183 /* DMA enable for 64 channels, only Bit 0 is relevant */
198 #define HDSPM_statusRegister 0
207 #define HDSPM_RD_STATUS_0 0
216 #define HDSPM_TCO1_TCO_lock 0x00000001
217 #define HDSPM_TCO1_WCK_Input_Range_LSB 0x00000002
218 #define HDSPM_TCO1_WCK_Input_Range_MSB 0x00000004
219 #define HDSPM_TCO1_LTC_Input_valid 0x00000008
220 #define HDSPM_TCO1_WCK_Input_valid 0x00000010
221 #define HDSPM_TCO1_Video_Input_Format_NTSC 0x00000020
222 #define HDSPM_TCO1_Video_Input_Format_PAL 0x00000040
224 #define HDSPM_TCO1_set_TC 0x00000100
225 #define HDSPM_TCO1_set_drop_frame_flag 0x00000200
226 #define HDSPM_TCO1_LTC_Format_LSB 0x00000400
227 #define HDSPM_TCO1_LTC_Format_MSB 0x00000800
229 #define HDSPM_TCO2_TC_run 0x00010000
230 #define HDSPM_TCO2_WCK_IO_ratio_LSB 0x00020000
231 #define HDSPM_TCO2_WCK_IO_ratio_MSB 0x00040000
232 #define HDSPM_TCO2_set_num_drop_frames_LSB 0x00080000
233 #define HDSPM_TCO2_set_num_drop_frames_MSB 0x00100000
234 #define HDSPM_TCO2_set_jam_sync 0x00200000
235 #define HDSPM_TCO2_set_flywheel 0x00400000
237 #define HDSPM_TCO2_set_01_4 0x01000000
238 #define HDSPM_TCO2_set_pull_down 0x02000000
239 #define HDSPM_TCO2_set_pull_up 0x04000000
240 #define HDSPM_TCO2_set_freq 0x08000000
241 #define HDSPM_TCO2_set_term_75R 0x10000000
242 #define HDSPM_TCO2_set_input_LSB 0x20000000
243 #define HDSPM_TCO2_set_input_MSB 0x40000000
244 #define HDSPM_TCO2_set_freq_from_app 0x80000000
256 /* status is data bytes in MIDI-FIFO (0-128) */
286 #define HDSPM_Start (1<<0) /* start engine */
290 #define HDSPM_Latency2 (1<<3) /* by Latency{2,1,0} */
292 #define HDSPM_ClockModeMaster (1<<4) /* 1=Master, 0=Autosync */
293 #define HDSPM_c0Master 0x1 /* Master clock bit in settings
298 #define HDSPM_Frequency0 (1<<6) /* 0=44.1kHz/88.2kHz 1=48kHz/96kHz */
299 #define HDSPM_Frequency1 (1<<7) /* 0=32kHz/64kHz */
300 #define HDSPM_DoubleSpeed (1<<8) /* 0=normal speed, 1=double speed */
305 56channelMODE=0 */ /* MADI ONLY*/
309 0=off, 1=on */ /* MADI ONLY */
312 #define HDSPM_InputSelect0 (1<<14) /* Input select 0= optical, 1=coax
315 #define HDSPM_InputSelect1 (1<<15) /* should be 0 */
327 #define HDSPM_Midi0InterruptEnable 0x0400000
328 #define HDSPM_Midi1InterruptEnable 0x0800000
329 #define HDSPM_Midi2InterruptEnable 0x0200000
330 #define HDSPM_Midi3InterruptEnable 0x4000000
332 #define HDSPM_LineOut (1<<24) /* Analog Out on channel 63/64 on=1, mute=0 */
333 #define HDSPe_FLOAT_FORMAT 0x2000000
342 #define HDSPM_c0_Wck48 0x20 /* also RayDAT */
343 #define HDSPM_c0_Input0 0x1000
344 #define HDSPM_c0_Input1 0x2000
345 #define HDSPM_c0_Spdif_Opt 0x4000
346 #define HDSPM_c0_Pro 0x8000
347 #define HDSPM_c0_clr_tms 0x10000
348 #define HDSPM_c0_AEB1 0x20000
349 #define HDSPM_c0_AEB2 0x40000
350 #define HDSPM_c0_LineOut 0x80000
351 #define HDSPM_c0_AD_GAIN0 0x100000
352 #define HDSPM_c0_AD_GAIN1 0x200000
353 #define HDSPM_c0_DA_GAIN0 0x400000
354 #define HDSPM_c0_DA_GAIN1 0x800000
355 #define HDSPM_c0_PH_GAIN0 0x1000000
356 #define HDSPM_c0_PH_GAIN1 0x2000000
357 #define HDSPM_c0_Sym6db 0x4000000
365 #define HDSPM_InputOptical 0
370 #define HDSPM_c0_SyncRef0 0x2
371 #define HDSPM_c0_SyncRef1 0x4
372 #define HDSPM_c0_SyncRef2 0x8
373 #define HDSPM_c0_SyncRef3 0x10
377 #define HDSPM_SYNC_FROM_WORD 0 /* Preferred sync reference */
396 #define HDSPM_SYNC_CHECK_NO_LOCK 0
401 #define HDSPM_AUTOSYNC_FROM_WORD 0
408 #define HDSPM_OPTICAL 0 /* optical */
414 #define hdspm_encode_in(x) (((x)&0x3)<<14)
415 #define hdspm_decode_in(x) (((x)>>14)&0x3)
418 #define HDSPM_TMS (1<<0)
434 #define HDSPM_audioIRQPending (1<<0) /* IRQ is high and pending */
435 #define HDSPM_RX_64ch (1<<1) /* Input 64chan. MODE=1, 56chn MODE=0 */
436 #define HDSPM_AB_int (1<<2) /* InputChannel Opt=0, Coax=1
440 #define HDSPM_madiLock (1<<3) /* MADI Locked =1, no=0 */
443 #define HDSPM_tcoLockMadi 0x00000020 /* Optional TCO locked status for HDSPe MADI*/
444 #define HDSPM_tcoSync 0x10000000 /* Optional TCO sync status for HDSPe MADI and AES32!*/
446 #define HDSPM_syncInLock 0x00010000 /* Sync In lock status for HDSPe MADI! */
447 #define HDSPM_syncInSync 0x00020000 /* Sync In sync status for HDSPe MADI! */
449 #define HDSPM_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */
456 #define HDSPM_madiFreq0 (1<<22) /* system freq 0=error */
464 #define HDSPM_tco_detect 0x08000000
465 #define HDSPM_tcoLockAes 0x20000000 /* Optional TCO locked status for HDSPe AES */
467 #define HDSPM_s2_tco_detect 0x00000040
468 #define HDSPM_s2_AEBO_D 0x00000080
469 #define HDSPM_s2_AEBI_D 0x00000100
472 #define HDSPM_midi0IRQPending 0x40000000
473 #define HDSPM_midi1IRQPending 0x80000000
474 #define HDSPM_midi2IRQPending 0x20000000
475 #define HDSPM_midi2IRQPendingAES 0x00000020
476 #define HDSPM_midi3IRQPending 0x00200000
493 #define HDSPM_version0 (1<<0) /* not really defined but I guess */
503 #define HDSPM_wc_freq3 0x800 /* 1000=176.4, 1001=192 */
505 #define HDSPM_SyncRef0 0x10000 /* Sync Reference */
506 #define HDSPM_SyncRef1 0x20000
526 #define HDSPM_status1_F_0 0x0400000
527 #define HDSPM_status1_F_1 0x0800000
528 #define HDSPM_status1_F_2 0x1000000
529 #define HDSPM_status1_F_3 0x2000000
535 #define HDSPM_SelSyncRef_WORD 0
546 #define HDSPM_AES32_wcLock 0x0200000
547 #define HDSPM_AES32_wcSync 0x0100000
549 /* (status >> HDSPM_AES32_wcFreq_bit) & 0xF gives WC frequency (cf function
552 /* (status >> HDSPM_AES32_syncref_bit) & 0xF gives sync source */
554 #define HDSPM_AES32_AUTOSYNC_FROM_WORD 0
569 #define HDSPM_LockAES 0x80
570 #define HDSPM_LockAES1 0x80
571 #define HDSPM_LockAES2 0x40
572 #define HDSPM_LockAES3 0x20
573 #define HDSPM_LockAES4 0x10
574 #define HDSPM_LockAES5 0x8
575 #define HDSPM_LockAES6 0x4
576 #define HDSPM_LockAES7 0x2
577 #define HDSPM_LockAES8 0x1
597 #define MINUS_INFINITY_GAIN 0
634 #define HDSPM_SPEED_SINGLE 0
799 0, 1, 2, 3, 4, 5, 6, 7,
814 0, 1, /* AES */
827 0, 1, /* AES */
842 0, 1, /* AES */
854 0, 1, /* line in */
868 0, 1, /* line out */
883 0, 1, /* line in */
898 0, 1, /* line out */
913 0, 1, /* line in */
928 0, 1, /* line out */
944 0, 1, 2, 3, 4, 5, 6, 7,
973 int input; /* 0: LTC, 1:Video, 2: WC*/
974 int framerate; /* 0=24, 1=25, 2=29.97, 3=29.97d, 4=30, 5=30d */
975 int wordclock; /* 0=1:1, 1=44.1->48, 2=48->44.1 */
976 int samplerate; /* 0=44.1, 1=48, 2= freq from app */
977 int pull; /* 0=0, 1=+0.1%, 2=-0.1%, 3=+4%, 4=-4%*/
978 int term; /* 0 = off, 1 = on */
1079 .class = 0,
1080 .class_mask = 0,
1081 .driver_data = 0},
1082 {0,}
1118 0, 32000, 44100, 48000, 64000, 88200, in HDSPM_bit2freq()
1121 return 0; in HDSPM_bit2freq()
1153 return 0; in hdspm_read_in_gain()
1162 return 0; in hdspm_read_pb_gain()
1175 (hdspm->mixer->ch[chan].in[in] = data & 0xFFFF)); in hdspm_write_in_gain()
1176 return 0; in hdspm_write_in_gain()
1188 (hdspm->mixer->ch[chan].pb[pb] = data & 0xFFFF)); in hdspm_write_pb_gain()
1189 return 0; in hdspm_write_pb_gain()
1212 (hdspm->playback_pid >= 0) && (hdspm->capture_pid >= 0)) { in snd_hdspm_use_is_exclusive()
1213 ret = 0; in snd_hdspm_use_is_exclusive()
1254 int syncref, rate = 0, rate_bits; in hdspm_external_sample_rate()
1290 return 0; in hdspm_external_sample_rate()
1298 rate = 0; /* no lock */ in hdspm_external_sample_rate()
1320 rate = 0; break; in hdspm_external_sample_rate()
1331 rate = 0; in hdspm_external_sample_rate()
1334 if ((status2 & HDSPM_wcLock) != 0 && in hdspm_external_sample_rate()
1335 (status2 & HDSPM_SelSyncRef0) == 0) { in hdspm_external_sample_rate()
1369 rate = 0; in hdspm_external_sample_rate()
1377 if (rate != 0 && in hdspm_external_sample_rate()
1414 rate = 0; in hdspm_external_sample_rate()
1422 bool is_valid_input = 0; in hdspm_external_sample_rate()
1423 bool has_sync = 0; in hdspm_external_sample_rate()
1460 * 0, 128 samples as 1 ... 4096 samples as 6. For old cards, 7 in hdspm_get_latency()
1491 (hdspm->period_bytes / 4) : 0; in hdspm_hw_pointer()
1520 for (i = 0; i < HDSPM_MAX_CHANNELS; i++) { in hdspm_silence_playback()
1521 memset(buf, 0, n); in hdspm_silence_playback()
1536 * have values from 0 .. 7. While 0 still means 64 samples and in hdspm_set_interrupt_interval()
1541 * 2^(n+6) with n ranging from 0 .. 7. in hdspm_set_interrupt_interval()
1546 n = 0; in hdspm_set_interrupt_interval()
1562 return 0; in hdspm_set_interrupt_interval()
1569 if (period == 0) in hdspm_calc_dds_value()
1570 return 0; in hdspm_calc_dds_value()
1586 return 0; in hdspm_calc_dds_value()
1597 if (snd_BUG_ON(rate <= 0)) in hdspm_set_dds_value()
1633 int not_set = 0; in hdspm_set_rate()
1733 && (hdspm->capture_pid >= 0 || hdspm->playback_pid >= 0)) { in hdspm_set_rate()
1751 hdspm_write(hdspm, HDSPM_eeprom_wr, 0); in hdspm_set_rate()
1778 if (not_set != 0) in hdspm_set_rate()
1781 return 0; in hdspm_set_rate()
1784 /* mainly for init to 0 on load */
1792 else if (sgain < 0) in all_in_all_mixer()
1793 gain = 0; in all_in_all_mixer()
1797 for (i = 0; i < HDSPM_MIXER_CHANNELS; i++) in all_in_all_mixer()
1798 for (j = 0; j < HDSPM_MIXER_CHANNELS; j++) { in all_in_all_mixer()
1811 /* the hardware already does the relevant bit-mask with 0xff */ in snd_hdspm_midi_read_byte()
1818 /* the hardware already does the relevant bit-mask with 0xff */ in snd_hdspm_midi_write_byte()
1824 return hdspm_read(hdspm, hdspm->midi[id].statusIn) & 0xFF; in snd_hdspm_midi_input_available()
1831 fifo_bytes_used = hdspm_read(hdspm, hdspm->midi[id].statusOut) & 0xFF; in snd_hdspm_midi_output_possible()
1836 return 0; in snd_hdspm_midi_output_possible()
1862 if (n_pending > 0) { in snd_hdspm_midi_output_write()
1868 if (to_write > 0) { in snd_hdspm_midi_output_write()
1869 for (i = 0; i < to_write; ++i) in snd_hdspm_midi_output_write()
1877 return 0; in snd_hdspm_midi_output_write()
1891 if (n_pending > 0) { in snd_hdspm_midi_input_read()
1895 for (i = 0; i < n_pending; ++i) in snd_hdspm_midi_input_read()
1908 hmidi->pending = 0; in snd_hdspm_midi_input_read()
1975 snd_hdspm_midi_output_timer, 0); in snd_hdspm_midi_output_trigger()
1980 if (hmidi->istimer && --hmidi->istimer <= 0) in snd_hdspm_midi_output_trigger()
1998 return 0; in snd_hdspm_midi_input_open()
2010 return 0; in snd_hdspm_midi_output_open()
2017 snd_hdspm_midi_input_trigger (substream, 0); in snd_hdspm_midi_input_close()
2024 return 0; in snd_hdspm_midi_input_close()
2031 snd_hdspm_midi_output_trigger (substream, 0); in snd_hdspm_midi_output_close()
2038 return 0; in snd_hdspm_midi_output_close()
2065 if (0 == id) { in snd_hdspm_create_midi()
2068 hdspm->midi[0].dataIn = HDSPM_midiDataIn2; in snd_hdspm_create_midi()
2069 hdspm->midi[0].statusIn = HDSPM_midiStatusIn2; in snd_hdspm_create_midi()
2070 hdspm->midi[0].dataOut = HDSPM_midiDataOut2; in snd_hdspm_create_midi()
2071 hdspm->midi[0].statusOut = HDSPM_midiStatusOut2; in snd_hdspm_create_midi()
2072 hdspm->midi[0].ie = HDSPM_Midi2InterruptEnable; in snd_hdspm_create_midi()
2073 hdspm->midi[0].irq = HDSPM_midi2IRQPending; in snd_hdspm_create_midi()
2075 hdspm->midi[0].dataIn = HDSPM_midiDataIn0; in snd_hdspm_create_midi()
2076 hdspm->midi[0].statusIn = HDSPM_midiStatusIn0; in snd_hdspm_create_midi()
2077 hdspm->midi[0].dataOut = HDSPM_midiDataOut0; in snd_hdspm_create_midi()
2078 hdspm->midi[0].statusOut = HDSPM_midiStatusOut0; in snd_hdspm_create_midi()
2079 hdspm->midi[0].ie = HDSPM_Midi0InterruptEnable; in snd_hdspm_create_midi()
2080 hdspm->midi[0].irq = HDSPM_midi0IRQPending; in snd_hdspm_create_midi()
2117 if ((id == 0) && (MADIface == hdspm->io_type)) { in snd_hdspm_create_midi()
2129 if (err < 0) in snd_hdspm_create_midi()
2154 if (err < 0) in snd_hdspm_create_midi()
2169 return 0; in snd_hdspm_create_midi()
2176 int i = 0; in hdspm_midi_work()
2216 if (0 == hdspm_system_clock_mode(hdspm)) { in hdspm_get_system_sample_rate()
2250 return 0; in snd_hdspm_info_system_sample_rate()
2260 ucontrol->value.integer.value[0] = hdspm_get_system_sample_rate(hdspm); in snd_hdspm_get_system_sample_rate()
2261 return 0; in snd_hdspm_get_system_sample_rate()
2269 int rate = ucontrol->value.integer.value[0]; in snd_hdspm_put_system_sample_rate()
2273 hdspm_set_dds_value(hdspm, ucontrol->value.integer.value[0]); in snd_hdspm_put_system_sample_rate()
2274 return 0; in snd_hdspm_put_system_sample_rate()
2289 return (status >> 16) & 0xF; in hdspm_get_wc_sample_rate()
2292 return (status >> HDSPM_AES32_wcFreq_bit) & 0xF; in hdspm_get_wc_sample_rate()
2298 return 0; in hdspm_get_wc_sample_rate()
2314 return (status >> 20) & 0xF; in hdspm_get_tco_sample_rate()
2317 return (status >> 1) & 0xF; in hdspm_get_tco_sample_rate()
2323 return 0; in hdspm_get_tco_sample_rate()
2339 return (status >> 12) & 0xF; in hdspm_get_sync_in_sample_rate()
2345 return 0; in hdspm_get_sync_in_sample_rate()
2358 return (timecode >> (4*index)) & 0xF; in hdspm_get_aes_sample_rate()
2362 return 0; in hdspm_get_aes_sample_rate()
2373 return (status >> (idx*4)) & 0xF; in hdspm_get_s1_sample_rate()
2386 int i, selected_rate = 0; in hdspm_external_rate_to_enum()
2410 return 0; in snd_hdspm_info_autosync_sample_rate()
2423 case 0: in snd_hdspm_get_autosync_sample_rate()
2424 ucontrol->value.enumerated.item[0] = in snd_hdspm_get_autosync_sample_rate()
2428 ucontrol->value.enumerated.item[0] = in snd_hdspm_get_autosync_sample_rate()
2432 ucontrol->value.enumerated.item[0] = in snd_hdspm_get_autosync_sample_rate()
2436 ucontrol->value.enumerated.item[0] = in snd_hdspm_get_autosync_sample_rate()
2444 case 0: /* WC */ in snd_hdspm_get_autosync_sample_rate()
2445 ucontrol->value.enumerated.item[0] = in snd_hdspm_get_autosync_sample_rate()
2449 ucontrol->value.enumerated.item[0] = in snd_hdspm_get_autosync_sample_rate()
2453 ucontrol->value.enumerated.item[0] = in snd_hdspm_get_autosync_sample_rate()
2457 ucontrol->value.enumerated.item[0] = in snd_hdspm_get_autosync_sample_rate()
2466 case 0: /* WC */ in snd_hdspm_get_autosync_sample_rate()
2467 ucontrol->value.enumerated.item[0] = in snd_hdspm_get_autosync_sample_rate()
2471 ucontrol->value.enumerated.item[0] = in snd_hdspm_get_autosync_sample_rate()
2475 ucontrol->value.enumerated.item[0] = in snd_hdspm_get_autosync_sample_rate()
2479 ucontrol->value.enumerated.item[0] = in snd_hdspm_get_autosync_sample_rate()
2483 ucontrol->value.enumerated.item[0] = in snd_hdspm_get_autosync_sample_rate()
2493 ucontrol->value.enumerated.item[0] = in snd_hdspm_get_autosync_sample_rate()
2500 return 0; in snd_hdspm_get_autosync_sample_rate()
2518 * @returns 0 - master, 1 - slave
2526 return 0; in hdspm_system_clock_mode()
2531 return 0; in hdspm_system_clock_mode()
2540 * @param mode 0 - master, 1 - slave
2547 (0 == mode)); in hdspm_set_system_clock_mode()
2556 return 0; in snd_hdspm_info_system_clock_mode()
2564 ucontrol->value.enumerated.item[0] = hdspm_system_clock_mode(hdspm); in snd_hdspm_get_system_clock_mode()
2565 return 0; in snd_hdspm_get_system_clock_mode()
2577 val = ucontrol->value.enumerated.item[0]; in snd_hdspm_put_system_clock_mode()
2578 if (val < 0) in snd_hdspm_put_system_clock_mode()
2579 val = 0; in snd_hdspm_put_system_clock_mode()
2585 return 0; in snd_hdspm_put_system_clock_mode()
2602 case 32000: return 0; in hdspm_clock_source()
2620 case 0: in hdspm_set_clock_source()
2642 return 0; in hdspm_set_clock_source()
2656 ucontrol->value.enumerated.item[0] = hdspm_clock_source(hdspm); in snd_hdspm_get_clock_source()
2657 return 0; in snd_hdspm_get_clock_source()
2669 val = ucontrol->value.enumerated.item[0]; in snd_hdspm_put_clock_source()
2670 if (val < 0) in snd_hdspm_put_clock_source()
2671 val = 0; in snd_hdspm_put_clock_source()
2676 change = (hdspm_set_clock_source(hdspm, val) == 0) ? 1 : 0; in snd_hdspm_put_clock_source()
2678 change = 0; in snd_hdspm_put_clock_source()
2706 case 0: return 0; /* WC */ in hdspm_pref_sync_ref()
2724 case 0: return 0; /* WC */ in hdspm_pref_sync_ref()
2732 case 0: return 0; /* WC */ in hdspm_pref_sync_ref()
2744 case 0: return 0; /* WC */ in hdspm_pref_sync_ref()
2757 case 0: return 0; /* WC */ in hdspm_pref_sync_ref()
2774 case 0: return 0; /* WC */ in hdspm_pref_sync_ref()
2784 case 0: return 0; /* WC */ in hdspm_pref_sync_ref()
2806 int p = 0; in hdspm_set_pref_sync_ref()
2812 case 0: /* WC */ in hdspm_set_pref_sync_ref()
2857 case 0: /* WC */ in hdspm_set_pref_sync_ref()
2874 case 0: /* WC */ in hdspm_set_pref_sync_ref()
2893 case 0: p = 0; break; /* WC */ in hdspm_set_pref_sync_ref()
2906 case 0: p = 0; break; /* WC */ in hdspm_set_pref_sync_ref()
2922 case 0: p = 0; break; /* WC */ in hdspm_set_pref_sync_ref()
2932 case 0: p = 0; break; /* WC */ in hdspm_set_pref_sync_ref()
2958 return 0; in hdspm_set_pref_sync_ref()
2969 return 0; in snd_hdspm_info_pref_sync_ref()
2978 if (psf >= 0) { in snd_hdspm_get_pref_sync_ref()
2979 ucontrol->value.enumerated.item[0] = psf; in snd_hdspm_get_pref_sync_ref()
2980 return 0; in snd_hdspm_get_pref_sync_ref()
2990 int val, change = 0; in snd_hdspm_put_pref_sync_ref()
2995 val = ucontrol->value.enumerated.item[0]; in snd_hdspm_put_pref_sync_ref()
2997 if (val < 0) in snd_hdspm_put_pref_sync_ref()
2998 val = 0; in snd_hdspm_put_pref_sync_ref()
3004 change = (0 == hdspm_set_pref_sync_ref(hdspm, val)) ? 1 : 0; in snd_hdspm_put_pref_sync_ref()
3026 unsigned int syncref = (status >> HDSPM_AES32_syncref_bit) & 0xF; in hdspm_autosync_ref()
3052 return 0; in hdspm_autosync_ref()
3072 return 0; in snd_hdspm_info_autosync_ref()
3080 ucontrol->value.enumerated.item[0] = hdspm_autosync_ref(hdspm); in snd_hdspm_get_autosync_ref()
3081 return 0; in snd_hdspm_get_autosync_ref()
3100 return 0; in snd_hdspm_info_tco_video_input_format()
3107 int ret = 0; in snd_hdspm_get_tco_video_input_format()
3123 ret = 0; in snd_hdspm_get_tco_video_input_format()
3126 ucontrol->value.enumerated.item[0] = ret; in snd_hdspm_get_tco_video_input_format()
3127 return 0; in snd_hdspm_get_tco_video_input_format()
3147 return 0; in snd_hdspm_info_tco_ltc_frames()
3153 int ret = 0; in hdspm_tco_ltc_frames()
3159 case 0: in hdspm_tco_ltc_frames()
3186 ucontrol->value.enumerated.item[0] = hdspm_tco_ltc_frames(hdspm); in snd_hdspm_get_tco_ltc_frames()
3187 return 0; in snd_hdspm_get_tco_ltc_frames()
3208 return (reg & regmask) ? 1 : 0; in hdspm_toggle_setting()
3231 return 0; in hdspm_set_toggle_setting()
3243 ucontrol->value.integer.value[0] = hdspm_toggle_setting(hdspm, regmask); in snd_hdspm_get_toggle_setting()
3245 return 0; in snd_hdspm_get_toggle_setting()
3258 val = ucontrol->value.integer.value[0] & 1; in snd_hdspm_put_toggle_setting()
3277 return (hdspm->control_register & HDSPM_InputSelect0) ? 1 : 0; in hdspm_input_select()
3288 return 0; in hdspm_set_input_select()
3296 return 0; in snd_hdspm_info_input_select()
3305 ucontrol->value.enumerated.item[0] = hdspm_input_select(hdspm); in snd_hdspm_get_input_select()
3307 return 0; in snd_hdspm_get_input_select()
3319 val = ucontrol->value.integer.value[0] & 1; in snd_hdspm_put_input_select()
3339 return (hdspm->control_register & HDSPM_DS_DoubleWire) ? 1 : 0; in hdspm_ds_wire()
3350 return 0; in hdspm_set_ds_wire()
3358 return 0; in snd_hdspm_info_ds_wire()
3367 ucontrol->value.enumerated.item[0] = hdspm_ds_wire(hdspm); in snd_hdspm_get_ds_wire()
3369 return 0; in snd_hdspm_get_ds_wire()
3381 val = ucontrol->value.integer.value[0] & 1; in snd_hdspm_put_ds_wire()
3405 return 0; in hdspm_qs_wire()
3412 case 0: in hdspm_set_qs_wire()
3423 return 0; in hdspm_set_qs_wire()
3431 return 0; in snd_hdspm_info_qs_wire()
3440 ucontrol->value.enumerated.item[0] = hdspm_qs_wire(hdspm); in snd_hdspm_get_qs_wire()
3442 return 0; in snd_hdspm_get_qs_wire()
3454 val = ucontrol->value.integer.value[0]; in snd_hdspm_put_qs_wire()
3455 if (val < 0) in snd_hdspm_put_qs_wire()
3456 val = 0; in snd_hdspm_put_qs_wire()
3487 return 0; in hdspm_set_tristate()
3506 return 0; in snd_hdspm_info_tristate()
3516 ucontrol->value.enumerated.item[0] = hdspm_tristate(hdspm, regmask); in snd_hdspm_get_tristate()
3518 return 0; in snd_hdspm_get_tristate()
3531 val = ucontrol->value.integer.value[0]; in snd_hdspm_put_tristate()
3532 if (val < 0) in snd_hdspm_put_tristate()
3533 val = 0; in snd_hdspm_put_tristate()
3559 return 0; in hdspm_madi_speedmode()
3566 case 0: in hdspm_set_madi_speedmode()
3577 return 0; in hdspm_set_madi_speedmode()
3585 return 0; in snd_hdspm_info_madi_speedmode()
3594 ucontrol->value.enumerated.item[0] = hdspm_madi_speedmode(hdspm); in snd_hdspm_get_madi_speedmode()
3596 return 0; in snd_hdspm_get_madi_speedmode()
3608 val = ucontrol->value.integer.value[0]; in snd_hdspm_put_madi_speedmode()
3609 if (val < 0) in snd_hdspm_put_madi_speedmode()
3610 val = 0; in snd_hdspm_put_madi_speedmode()
3624 .device = 0, \
3637 uinfo->value.integer.min = 0; in snd_hdspm_info_mixer()
3640 return 0; in snd_hdspm_info_mixer()
3650 source = ucontrol->value.integer.value[0]; in snd_hdspm_get_mixer()
3651 if (source < 0) in snd_hdspm_get_mixer()
3652 source = 0; in snd_hdspm_get_mixer()
3657 if (destination < 0) in snd_hdspm_get_mixer()
3658 destination = 0; in snd_hdspm_get_mixer()
3673 return 0; in snd_hdspm_get_mixer()
3688 source = ucontrol->value.integer.value[0]; in snd_hdspm_put_mixer()
3691 if (source < 0 || source >= 2 * HDSPM_MAX_CHANNELS) in snd_hdspm_put_mixer()
3693 if (destination < 0 || destination >= HDSPM_MAX_CHANNELS) in snd_hdspm_put_mixer()
3741 uinfo->value.integer.min = 0; in snd_hdspm_info_playback_mixer()
3744 return 0; in snd_hdspm_info_playback_mixer()
3755 if (snd_BUG_ON(channel < 0 || channel >= HDSPM_MAX_CHANNELS)) in snd_hdspm_get_playback_mixer()
3759 ucontrol->value.integer.value[0] = in snd_hdspm_get_playback_mixer()
3763 return 0; in snd_hdspm_get_playback_mixer()
3779 if (snd_BUG_ON(channel < 0 || channel >= HDSPM_MAX_CHANNELS)) in snd_hdspm_put_playback_mixer()
3782 gain = ucontrol->value.integer.value[0]*UNITY_GAIN/64; in snd_hdspm_put_playback_mixer()
3820 return 0; in snd_hdspm_info_sync_check()
3828 return 0; in snd_hdspm_tco_info_lock_check()
3844 return 0; in hdspm_wc_sync_check()
3854 return 0; in hdspm_wc_sync_check()
3860 if (status & 0x2000000) in hdspm_wc_sync_check()
3862 else if (status & 0x1000000) in hdspm_wc_sync_check()
3864 return 0; in hdspm_wc_sync_check()
3884 return 0; in hdspm_madi_sync_check()
3894 lock = (status & (0x1<<idx)) ? 1 : 0; in hdspm_s1_sync_check()
3895 sync = (status & (0x100<<idx)) ? 1 : 0; in hdspm_s1_sync_check()
3901 return 0; in hdspm_s1_sync_check()
3907 int status, lock = 0, sync = 0; in hdspm_sync_in_sync_check()
3913 lock = (status & 0x400) ? 1 : 0; in hdspm_sync_in_sync_check()
3914 sync = (status & 0x800) ? 1 : 0; in hdspm_sync_in_sync_check()
3919 lock = (status & HDSPM_syncInLock) ? 1 : 0; in hdspm_sync_in_sync_check()
3920 sync = (status & HDSPM_syncInSync) ? 1 : 0; in hdspm_sync_in_sync_check()
3925 lock = (status & 0x100000) ? 1 : 0; in hdspm_sync_in_sync_check()
3926 sync = (status & 0x200000) ? 1 : 0; in hdspm_sync_in_sync_check()
3938 return 0; in hdspm_sync_in_sync_check()
3946 lock = (status2 & (0x0080 >> idx)) ? 1 : 0; in hdspm_aes_sync_check()
3947 sync = (status2 & (0x8000 >> idx)) ? 1 : 0; in hdspm_aes_sync_check()
3953 return 0; in hdspm_aes_sync_check()
3961 return (status & mask) ? 1 : 0; in hdspm_tco_input_check()
3979 return 0; in hdspm_tco_sync_check()
3988 return 0; in hdspm_tco_sync_check()
3993 if (status & 0x8000000) in hdspm_tco_sync_check()
3995 if (status & 0x4000000) in hdspm_tco_sync_check()
3997 return 0; /* No signal */ in hdspm_tco_sync_check()
4017 case 0: /* WC */ in snd_hdspm_get_sync_check()
4031 case 0: /* WC */ in snd_hdspm_get_sync_check()
4045 case 0: /* WC */ in snd_hdspm_get_sync_check()
4062 case 0: /* WC */ in snd_hdspm_get_sync_check()
4095 ucontrol->value.enumerated.item[0] = val; in snd_hdspm_get_sync_check()
4096 return 0; in snd_hdspm_get_sync_check()
4106 unsigned int tc[4] = { 0, 0, 0, 0}; in hdspm_tco_write()
4109 case 0: in hdspm_tco_write()
4186 hdspm_write(hdspm, HDSPM_WR_TCO, tc[0]); in hdspm_tco_write()
4210 return 0; in snd_hdspm_info_tco_sample_rate()
4218 ucontrol->value.enumerated.item[0] = hdspm->tco->samplerate; in snd_hdspm_get_tco_sample_rate()
4220 return 0; in snd_hdspm_get_tco_sample_rate()
4228 if (hdspm->tco->samplerate != ucontrol->value.enumerated.item[0]) { in snd_hdspm_put_tco_sample_rate()
4229 hdspm->tco->samplerate = ucontrol->value.enumerated.item[0]; in snd_hdspm_put_tco_sample_rate()
4236 return 0; in snd_hdspm_put_tco_sample_rate()
4254 static const char *const texts[] = { "0", "+ 0.1 %", "- 0.1 %", in snd_hdspm_info_tco_pull()
4257 return 0; in snd_hdspm_info_tco_pull()
4265 ucontrol->value.enumerated.item[0] = hdspm->tco->pull; in snd_hdspm_get_tco_pull()
4267 return 0; in snd_hdspm_get_tco_pull()
4275 if (hdspm->tco->pull != ucontrol->value.enumerated.item[0]) { in snd_hdspm_put_tco_pull()
4276 hdspm->tco->pull = ucontrol->value.enumerated.item[0]; in snd_hdspm_put_tco_pull()
4283 return 0; in snd_hdspm_put_tco_pull()
4302 return 0; in snd_hdspm_info_tco_wck_conversion()
4310 ucontrol->value.enumerated.item[0] = hdspm->tco->wordclock; in snd_hdspm_get_tco_wck_conversion()
4312 return 0; in snd_hdspm_get_tco_wck_conversion()
4320 if (hdspm->tco->wordclock != ucontrol->value.enumerated.item[0]) { in snd_hdspm_put_tco_wck_conversion()
4321 hdspm->tco->wordclock = ucontrol->value.enumerated.item[0]; in snd_hdspm_put_tco_wck_conversion()
4328 return 0; in snd_hdspm_put_tco_wck_conversion()
4349 return 0; in snd_hdspm_info_tco_frame_rate()
4357 ucontrol->value.enumerated.item[0] = hdspm->tco->framerate; in snd_hdspm_get_tco_frame_rate()
4359 return 0; in snd_hdspm_get_tco_frame_rate()
4367 if (hdspm->tco->framerate != ucontrol->value.enumerated.item[0]) { in snd_hdspm_put_tco_frame_rate()
4368 hdspm->tco->framerate = ucontrol->value.enumerated.item[0]; in snd_hdspm_put_tco_frame_rate()
4375 return 0; in snd_hdspm_put_tco_frame_rate()
4395 return 0; in snd_hdspm_info_tco_sync_source()
4403 ucontrol->value.enumerated.item[0] = hdspm->tco->input; in snd_hdspm_get_tco_sync_source()
4405 return 0; in snd_hdspm_get_tco_sync_source()
4413 if (hdspm->tco->input != ucontrol->value.enumerated.item[0]) { in snd_hdspm_put_tco_sync_source()
4414 hdspm->tco->input = ucontrol->value.enumerated.item[0]; in snd_hdspm_put_tco_sync_source()
4421 return 0; in snd_hdspm_put_tco_sync_source()
4441 uinfo->value.integer.min = 0; in snd_hdspm_info_tco_word_term()
4444 return 0; in snd_hdspm_info_tco_word_term()
4453 ucontrol->value.integer.value[0] = hdspm->tco->term; in snd_hdspm_get_tco_word_term()
4455 return 0; in snd_hdspm_get_tco_word_term()
4464 if (hdspm->tco->term != ucontrol->value.integer.value[0]) { in snd_hdspm_put_tco_word_term()
4465 hdspm->tco->term = ucontrol->value.integer.value[0]; in snd_hdspm_put_tco_word_term()
4472 return 0; in snd_hdspm_put_tco_word_term()
4479 HDSPM_MIXER("Mixer", 0),
4480 HDSPM_INTERNAL_CLOCK("Internal Clock", 0),
4481 HDSPM_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
4482 HDSPM_PREF_SYNC_REF("Preferred Sync Reference", 0),
4483 HDSPM_AUTOSYNC_REF("AutoSync Reference", 0),
4484 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
4485 HDSPM_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
4486 HDSPM_SYNC_CHECK("WC SyncCheck", 0),
4495 HDSPM_INPUT_SELECT("Input Select", 0),
4496 HDSPM_MADI_SPEEDMODE("MADI Speed Mode", 0)
4501 HDSPM_MIXER("Mixer", 0),
4502 HDSPM_INTERNAL_CLOCK("Internal Clock", 0),
4503 HDSPM_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
4504 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
4505 HDSPM_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
4506 HDSPM_SYNC_CHECK("MADI SyncCheck", 0),
4510 HDSPM_MADI_SPEEDMODE("MADI Speed Mode", 0)
4514 HDSPM_MIXER("Mixer", 0),
4515 HDSPM_INTERNAL_CLOCK("Internal Clock", 0),
4516 HDSPM_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
4517 HDSPM_PREF_SYNC_REF("Preferred Sync Reference", 0),
4518 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
4519 HDSPM_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
4520 HDSPM_SYNC_CHECK("WC SyncCheck", 0),
4526 HDSPM_AUTOSYNC_SAMPLE_RATE("WC Frequency", 0),
4543 HDSPM_INPUT_SELECT("Input Select", 0),
4544 HDSPM_SPDIF_OPTICAL("SPDIF Out Optical", 0),
4545 HDSPM_PROFESSIONAL("SPDIF Out Professional", 0);
4546 HDSPM_SPDIF_IN("SPDIF In", 0);
4547 HDSPM_BREAKOUT_CABLE("Breakout Cable", 0);
4548 HDSPM_INPUT_LEVEL("Input Level", 0);
4549 HDSPM_OUTPUT_LEVEL("Output Level", 0);
4550 HDSPM_PHONES("Phones", 0);
4555 HDSPM_MIXER("Mixer", 0),
4556 HDSPM_INTERNAL_CLOCK("Internal Clock", 0),
4557 HDSPM_SYSTEM_CLOCK_MODE("Clock Mode", 0),
4558 HDSPM_PREF_SYNC_REF("Pref Sync Ref", 0),
4559 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
4560 HDSPM_SYNC_CHECK("WC SyncCheck", 0),
4569 HDSPM_AUTOSYNC_SAMPLE_RATE("WC Frequency", 0),
4583 HDSPM_MIXER("Mixer", 0),
4584 HDSPM_INTERNAL_CLOCK("Internal Clock", 0),
4585 HDSPM_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
4586 HDSPM_PREF_SYNC_REF("Preferred Sync Reference", 0),
4587 HDSPM_AUTOSYNC_REF("AutoSync Reference", 0),
4588 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
4590 HDSPM_SYNC_CHECK("WC Sync Check", 0),
4601 HDSPM_AUTOSYNC_SAMPLE_RATE("WC Frequency", 0),
4617 HDSPM_DS_WIRE("Double Speed Wire Mode", 0),
4618 HDSPM_QS_WIRE("Quad Speed Wire Mode", 0),
4625 HDSPM_TCO_SAMPLE_RATE("TCO Sample Rate", 0),
4626 HDSPM_TCO_PULL("TCO Pull", 0),
4627 HDSPM_TCO_WCK_CONVERSION("TCO WCK Conversion", 0),
4628 HDSPM_TCO_FRAME_RATE("TCO Frame Rate", 0),
4629 HDSPM_TCO_SYNC_SOURCE("TCO Sync Source", 0),
4630 HDSPM_TCO_WORD_TERM("TCO Word Term", 0),
4633 HDSPM_TCO_LTC_FRAMES("TCO Detected Frame Rate", 0),
4634 HDSPM_TCO_VIDEO_INPUT_FORMAT("Video Input Format", 0)
4647 hdspm->playback_mixer_ctls[i]->vd[0].access = in hdspm_update_simple_mixer_controls()
4652 hdspm->playback_mixer_ctls[i]->vd[0].access = in hdspm_update_simple_mixer_controls()
4661 return 0; in hdspm_update_simple_mixer_controls()
4697 for (idx = 0; idx < limit; idx++) { in snd_hdspm_create_controls()
4700 if (err < 0) in snd_hdspm_create_controls()
4715 for (idx = 0; idx < limit; ++idx) { in snd_hdspm_create_controls()
4719 if (err < 0) in snd_hdspm_create_controls()
4729 for (idx = 0; idx < limit; idx++) { in snd_hdspm_create_controls()
4732 if (err < 0) in snd_hdspm_create_controls()
4737 return 0; in snd_hdspm_create_controls()
4752 u64 freq_const = 0; in snd_hdspm_proc_read_tco()
4768 case 0: in snd_hdspm_proc_read_tco()
4832 frames = ltc & 0xF; in snd_hdspm_proc_read_tco()
4834 frames += (ltc & 0x3) * 10; in snd_hdspm_proc_read_tco()
4836 seconds = ltc & 0xF; in snd_hdspm_proc_read_tco()
4838 seconds += (ltc & 0x7) * 10; in snd_hdspm_proc_read_tco()
4840 minutes = ltc & 0xF; in snd_hdspm_proc_read_tco()
4842 minutes += (ltc & 0x7) * 10; in snd_hdspm_proc_read_tco()
4844 hours = ltc & 0xF; in snd_hdspm_proc_read_tco()
4846 hours += (ltc & 0x3) * 10; in snd_hdspm_proc_read_tco()
4878 snd_iprintf(buffer, "HW Serial: 0x%06x%06x\n", in snd_hdspm_proc_read_madi()
4879 (hdspm_read(hdspm, HDSPM_midiStatusIn1)>>8) & 0xFFFFFF, in snd_hdspm_proc_read_madi()
4882 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n", in snd_hdspm_proc_read_madi()
4890 (status & HDSPM_midi0IRQPending) ? 1 : 0, in snd_hdspm_proc_read_madi()
4891 (status & HDSPM_midi1IRQPending) ? 1 : 0, in snd_hdspm_proc_read_madi()
4896 ((status & HDSPM_BufferID) ? 1 : 0), in snd_hdspm_proc_read_madi()
4905 "MIDI FIFO: Out1=0x%x, Out2=0x%x, In1=0x%x, In2=0x%x \n", in snd_hdspm_proc_read_madi()
4906 hdspm_read(hdspm, HDSPM_midiStatusOut0) & 0xFF, in snd_hdspm_proc_read_madi()
4907 hdspm_read(hdspm, HDSPM_midiStatusOut1) & 0xFF, in snd_hdspm_proc_read_madi()
4908 hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xFF, in snd_hdspm_proc_read_madi()
4909 hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xFF); in snd_hdspm_proc_read_madi()
4911 "MIDIoverMADI FIFO: In=0x%x, Out=0x%x \n", in snd_hdspm_proc_read_madi()
4912 hdspm_read(hdspm, HDSPM_midiStatusIn2) & 0xFF, in snd_hdspm_proc_read_madi()
4913 hdspm_read(hdspm, HDSPM_midiStatusOut2) & 0xFF); in snd_hdspm_proc_read_madi()
4915 "Register: ctrl1=0x%x, ctrl2=0x%x, status1=0x%x, " in snd_hdspm_proc_read_madi()
4916 "status2=0x%x\n", in snd_hdspm_proc_read_madi()
5039 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n", in snd_hdspm_proc_read_aes32()
5047 (status & HDSPM_midi0IRQPending) ? 1 : 0, in snd_hdspm_proc_read_aes32()
5048 (status & HDSPM_midi1IRQPending) ? 1 : 0, in snd_hdspm_proc_read_aes32()
5053 ((status & HDSPM_BufferID) ? 1 : 0), in snd_hdspm_proc_read_aes32()
5062 "MIDI FIFO: Out1=0x%x, Out2=0x%x, In1=0x%x, In2=0x%x \n", in snd_hdspm_proc_read_aes32()
5063 hdspm_read(hdspm, HDSPM_midiStatusOut0) & 0xFF, in snd_hdspm_proc_read_aes32()
5064 hdspm_read(hdspm, HDSPM_midiStatusOut1) & 0xFF, in snd_hdspm_proc_read_aes32()
5065 hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xFF, in snd_hdspm_proc_read_aes32()
5066 hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xFF); in snd_hdspm_proc_read_aes32()
5068 "MIDIoverMADI FIFO: In=0x%x, Out=0x%x \n", in snd_hdspm_proc_read_aes32()
5069 hdspm_read(hdspm, HDSPM_midiStatusIn2) & 0xFF, in snd_hdspm_proc_read_aes32()
5070 hdspm_read(hdspm, HDSPM_midiStatusOut2) & 0xFF); in snd_hdspm_proc_read_aes32()
5072 "Register: ctrl1=0x%x, ctrl2=0x%x, status1=0x%x, " in snd_hdspm_proc_read_aes32()
5073 "status2=0x%x\n", in snd_hdspm_proc_read_aes32()
5100 if (pref_syncref == 0) in snd_hdspm_proc_read_aes32()
5125 HDSPM_bit2freq((status >> HDSPM_AES32_wcFreq_bit) & 0xF)); in snd_hdspm_proc_read_aes32()
5127 for (x = 0; x < 8; x++) { in snd_hdspm_proc_read_aes32()
5132 HDSPM_bit2freq((timecode >> (4*x)) & 0xF)); in snd_hdspm_proc_read_aes32()
5183 snd_iprintf(buffer, "STATUS1: 0x%08x\n", status1); in snd_hdspm_proc_read_raydat()
5184 snd_iprintf(buffer, "STATUS2: 0x%08x\n", status2); in snd_hdspm_proc_read_raydat()
5185 snd_iprintf(buffer, "STATUS3: 0x%08x\n", status3); in snd_hdspm_proc_read_raydat()
5191 (hdspm_system_clock_mode(hdspm) == 0) ? "master" : "slave"); in snd_hdspm_proc_read_raydat()
5197 lock = 0x1; in snd_hdspm_proc_read_raydat()
5198 sync = 0x100; in snd_hdspm_proc_read_raydat()
5200 for (i = 0; i < 8; i++) { in snd_hdspm_proc_read_raydat()
5203 (status1 & lock) ? 1 : 0, in snd_hdspm_proc_read_raydat()
5204 (status1 & sync) ? 1 : 0, in snd_hdspm_proc_read_raydat()
5205 texts_freq[(status2 >> (i * 4)) & 0xF]); in snd_hdspm_proc_read_raydat()
5212 (status1 & 0x1000000) ? 1 : 0, in snd_hdspm_proc_read_raydat()
5213 (status1 & 0x2000000) ? 1 : 0, in snd_hdspm_proc_read_raydat()
5214 texts_freq[(status1 >> 16) & 0xF]); in snd_hdspm_proc_read_raydat()
5217 (status1 & 0x4000000) ? 1 : 0, in snd_hdspm_proc_read_raydat()
5218 (status1 & 0x8000000) ? 1 : 0, in snd_hdspm_proc_read_raydat()
5219 texts_freq[(status1 >> 20) & 0xF]); in snd_hdspm_proc_read_raydat()
5222 (status3 & 0x400) ? 1 : 0, in snd_hdspm_proc_read_raydat()
5223 (status3 & 0x800) ? 1 : 0, in snd_hdspm_proc_read_raydat()
5224 texts_freq[(status2 >> 12) & 0xF]); in snd_hdspm_proc_read_raydat()
5237 for (i = 0; i < 256 /* 1024*64 */; i += j) { in snd_hdspm_proc_read_debug()
5238 snd_iprintf(buffer, "0x%08X: ", i); in snd_hdspm_proc_read_debug()
5239 for (j = 0; j < 16; j += 4) in snd_hdspm_proc_read_debug()
5255 for (i = 0; i < hdspm->max_channels_in; i++) { in snd_hdspm_proc_ports_in()
5268 for (i = 0; i < hdspm->max_channels_out; i++) { in snd_hdspm_proc_ports_out()
5320 hdspm->settings_register = 0; in snd_hdspm_set_defaults()
5326 0x2 + 0x8 + 0x10 + 0x80 + 0x400 + 0x4000 + 0x1000000; in snd_hdspm_set_defaults()
5331 hdspm->settings_register = 0x1 + 0x1000; in snd_hdspm_set_defaults()
5335 0x2 + 0x8 + 0x10 + 0x80 + 0x400 + 0x4000 + 0x1000000; in snd_hdspm_set_defaults()
5355 hdspm->control2_register = 0; in snd_hdspm_set_defaults()
5364 all_in_all_mixer(hdspm, 0 * UNITY_GAIN); in snd_hdspm_set_defaults()
5372 return 0; in snd_hdspm_set_defaults()
5384 int i, audio, midi, schedule = 0; in snd_hdspm_interrupt()
5402 * 0 64 ~3998231 ~8191558 in snd_hdspm_interrupt()
5406 now-hdspm->last_interrupt, status & 0xFFC0); in snd_hdspm_interrupt()
5413 hdspm_write(hdspm, HDSPM_interruptConfirmation, 0); in snd_hdspm_interrupt()
5426 i = 0; in snd_hdspm_interrupt()
5429 hdspm->midi[i].statusIn) & 0xff) && in snd_hdspm_interrupt()
5478 runtime->status->hw_ptr = 0; in snd_hdspm_reset()
5490 return 0; in snd_hdspm_reset()
5512 if (other_pid > 0 && this_pid != other_pid) { in snd_hdspm_hw_params()
5540 err = hdspm_set_rate(hdspm, params_rate(params), 0); in snd_hdspm_hw_params()
5541 if (err < 0) { in snd_hdspm_hw_params()
5552 if (err < 0) { in snd_hdspm_hw_params()
5569 if (err < 0) { in snd_hdspm_hw_params()
5577 for (i = 0; i < params_channels(params); ++i) { in snd_hdspm_hw_params()
5580 if (c < 0) in snd_hdspm_hw_params()
5594 for (i = 0; i < params_channels(params); ++i) { in snd_hdspm_hw_params()
5597 if (c < 0) in snd_hdspm_hw_params()
5614 "Allocated sample buffer for %s at 0x%08X\n", in snd_hdspm_hw_params()
5617 snd_pcm_sgbuf_get_addr(substream, 0)); in snd_hdspm_hw_params()
5635 return 0; in snd_hdspm_hw_params()
5655 return 0; in snd_hdspm_hw_params()
5666 for (i = 0; i < HDSPM_MAX_CHANNELS; ++i) in snd_hdspm_hw_free()
5667 snd_hdspm_enable_out(hdspm, i, 0); in snd_hdspm_hw_free()
5671 for (i = 0; i < HDSPM_MAX_CHANNELS; ++i) in snd_hdspm_hw_free()
5672 snd_hdspm_enable_in(hdspm, i, 0); in snd_hdspm_hw_free()
5679 return 0; in snd_hdspm_hw_free()
5698 if (hdspm->channel_map_out[channel] < 0) { in snd_hdspm_channel_info()
5716 if (hdspm->channel_map_in[channel] < 0) { in snd_hdspm_channel_info()
5727 info->first = 0; in snd_hdspm_channel_info()
5729 return 0; in snd_hdspm_channel_info()
5812 return 0; in snd_hdspm_trigger()
5817 return 0; in snd_hdspm_prepare()
5842 .fifo_size = 0
5867 .fifo_size = 0
5902 return 0; in snd_hdspm_hw_rule_in_channels_rate()
5937 return 0; in snd_hdspm_hw_rule_out_channels_rate()
5972 return 0; in snd_hdspm_hw_rule_rate_in_channels()
6006 return 0; in snd_hdspm_hw_rule_rate_out_channels()
6017 list[0] = hdspm->qs_in_channels; in snd_hdspm_hw_rule_in_channels()
6020 return snd_interval_list(c, 3, list, 0); in snd_hdspm_hw_rule_in_channels()
6031 list[0] = hdspm->qs_out_channels; in snd_hdspm_hw_rule_out_channels()
6034 return snd_interval_list(c, 3, list, 0); in snd_hdspm_hw_rule_out_channels()
6046 .mask = 0
6076 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); in snd_hdspm_open()
6077 snd_pcm_hw_constraint_pow2(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); in snd_hdspm_open()
6102 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, in snd_hdspm_open()
6105 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, in snd_hdspm_open()
6112 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, in snd_hdspm_open()
6117 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, in snd_hdspm_open()
6122 return 0; in snd_hdspm_open()
6142 return 0; in snd_hdspm_release()
6148 return 0; in snd_hdspm_hwdep_dummy_op()
6164 int i = 0; in snd_hdspm_hwdep_ioctl()
6170 for (i = 0; i < HDSPM_MAX_CHANNELS; i++) { in snd_hdspm_hwdep_ioctl()
6208 if (0 != s) { in snd_hdspm_hwdep_ioctl()
6222 case 0: in snd_hdspm_hwdep_ioctl()
6253 if (0 != s) { in snd_hdspm_hwdep_ioctl()
6263 memset(&info, 0, sizeof(info)); in snd_hdspm_hwdep_ioctl()
6275 info.passthru = 0; in snd_hdspm_hwdep_ioctl()
6282 memset(&status, 0, sizeof(status)); in snd_hdspm_hwdep_ioctl()
6306 (statusregister & HDSPM_AB_int) ? 1 : 0; in snd_hdspm_hwdep_ioctl()
6308 (statusregister & HDSPM_RX_64ch) ? 1 : 0; in snd_hdspm_hwdep_ioctl()
6310 status.card_specific.madi.frame_format = 0; in snd_hdspm_hwdep_ioctl()
6324 memset(&hdspm_version, 0, sizeof(hdspm_version)); in snd_hdspm_hwdep_ioctl()
6331 hdspm_version.addons = 0; in snd_hdspm_hwdep_ioctl()
6351 return 0; in snd_hdspm_hwdep_ioctl()
6371 err = snd_hwdep_new(card, "HDSPM hwdep", 0, &hw); in snd_hdspm_create_hwdep()
6372 if (err < 0) in snd_hdspm_create_hwdep()
6384 return 0; in snd_hdspm_create_hwdep()
6404 return 0; in snd_hdspm_preallocate_memory()
6428 err = snd_pcm_new(card, hdspm->card_name, 0, 1, 1, &pcm); in snd_hdspm_create_pcm()
6429 if (err < 0) in snd_hdspm_create_pcm()
6444 if (err < 0) in snd_hdspm_create_pcm()
6447 return 0; in snd_hdspm_create_pcm()
6454 for (i = 0; i < hdspm->midiPorts; i++) in snd_hdspm_initialize_midi_flush()
6465 if (err < 0) in snd_hdspm_create_alsa_devices()
6468 i = 0; in snd_hdspm_create_alsa_devices()
6471 if (err < 0) { in snd_hdspm_create_alsa_devices()
6478 if (err < 0) in snd_hdspm_create_alsa_devices()
6482 if (err < 0) in snd_hdspm_create_alsa_devices()
6498 if (err < 0) in snd_hdspm_create_alsa_devices()
6507 if (err < 0) { in snd_hdspm_create_alsa_devices()
6514 return 0; in snd_hdspm_create_alsa_devices()
6554 if ((hdspm->firmware_rev == 0xf0) || in snd_hdspm_create()
6555 ((hdspm->firmware_rev >= 0xe6) && in snd_hdspm_create()
6556 (hdspm->firmware_rev <= 0xea))) { in snd_hdspm_create()
6560 } else if ((hdspm->firmware_rev == 0xd2) || in snd_hdspm_create()
6561 ((hdspm->firmware_rev >= 0xc8) && in snd_hdspm_create()
6562 (hdspm->firmware_rev <= 0xcf))) { in snd_hdspm_create()
6575 if (err < 0) in snd_hdspm_create()
6580 err = pcim_iomap_regions(pci, 1 << 0, "hdspm"); in snd_hdspm_create()
6581 if (err < 0) in snd_hdspm_create()
6584 hdspm->port = pci_resource_start(pci, 0); in snd_hdspm_create()
6585 io_extent = pci_resource_len(pci, 0); in snd_hdspm_create()
6586 hdspm->iobase = pcim_iomap_table(pci)[0]; in snd_hdspm_create()
6587 dev_dbg(card->dev, "remapped region (0x%lx) 0x%lx-0x%lx\n", in snd_hdspm_create()
6671 if (0 == (hdspm_read(hdspm, HDSPM_statusRegister2) & HDSPM_s2_AEBI_D)) { in snd_hdspm_create()
6678 if (0 == (hdspm_read(hdspm, HDSPM_statusRegister2) & HDSPM_s2_AEBO_D)) { in snd_hdspm_create()
6821 HDSPM_midiStatusIn0)>>8) & 0xFFFFFF; in snd_hdspm_create()
6826 * If the serial number is 0xFFFFFF, then we're dealing with in snd_hdspm_create()
6831 if (!id[hdspm->dev] && hdspm->serial != 0xFFFFFF) { in snd_hdspm_create()
6840 if (err < 0) in snd_hdspm_create()
6845 return 0; in snd_hdspm_create()
6884 if (err < 0) in snd_hdspm_probe()
6893 if (err < 0) in snd_hdspm_probe()
6900 "%s S/N 0x%x at 0x%lx, irq %d", in snd_hdspm_probe()
6907 "%s at 0x%lx, irq %d", in snd_hdspm_probe()
6912 if (err < 0) in snd_hdspm_probe()
6918 return 0; in snd_hdspm_probe()