218 	u32 areg;     /* cached additional register value */  member
478 			rme96->areg |= RME96_AR_CDATA;  in snd_rme96_write_SPI()
480 			rme96->areg &= ~RME96_AR_CDATA;  in snd_rme96_write_SPI()
482 		rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CLATCH);  in snd_rme96_write_SPI()
483 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_write_SPI()
485 		rme96->areg |= RME96_AR_CCLK;  in snd_rme96_write_SPI()
486 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_write_SPI()
490 	rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CDATA);  in snd_rme96_write_SPI()
491 	rme96->areg |= RME96_AR_CLATCH;  in snd_rme96_write_SPI()
492 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_write_SPI()
494 	rme96->areg &= ~RME96_AR_CLATCH;  in snd_rme96_write_SPI()
495 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_write_SPI()
585 	if (rme96->areg & RME96_AR_ANALOG) {  in snd_rme96_capture_getrate()
587 		n = ((rme96->areg >> RME96_AR_BITPOS_F0) & 1) +  in snd_rme96_capture_getrate()
588 			(((rme96->areg >> RME96_AR_BITPOS_F1) & 1) << 1);  in snd_rme96_capture_getrate()
602 		return (rme96->areg & RME96_AR_BITPOS_F2) ? rate << 1 : rate;  in snd_rme96_capture_getrate()
732 		rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) &  in snd_rme96_capture_analog_setrate()
736 		rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) |  in snd_rme96_capture_analog_setrate()
740 		rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) |  in snd_rme96_capture_analog_setrate()
747 		rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) &  in snd_rme96_capture_analog_setrate()
754 		rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) |  in snd_rme96_capture_analog_setrate()
758 		rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) |  in snd_rme96_capture_analog_setrate()
764 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_capture_analog_setrate()
776 		rme96->areg &= ~RME96_AR_WSEL;  in snd_rme96_setclockmode()
781 		rme96->areg &= ~RME96_AR_WSEL;  in snd_rme96_setclockmode()
786 		rme96->areg |= RME96_AR_WSEL;  in snd_rme96_setclockmode()
792 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_setclockmode()
799 	if (rme96->areg & RME96_AR_WSEL) {  in snd_rme96_getclockmode()
841 		rme96->areg |= RME96_AR_ANALOG;  in snd_rme96_setinputtype()
842 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_setinputtype()
860 		rme96->areg &= ~RME96_AR_ANALOG;  in snd_rme96_setinputtype()
861 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_setinputtype()
870 	if (rme96->areg & RME96_AR_ANALOG) {  in snd_rme96_getinputtype()
1543 		rme96->areg &= ~RME96_AR_DAC_EN;  in snd_rme96_free()
1544 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_free()
1648 	rme96->areg = RME96_AR_FREQPAD_1; /* set 44.1 kHz analog capture */  in snd_rme96_create()
1651 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_create()
1654 	writel(rme96->areg | RME96_AR_PD2,  in snd_rme96_create()
1656 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);	  in snd_rme96_create()
1660 	rme96->areg |= RME96_AR_DAC_EN;  in snd_rme96_create()
1661 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_create()
1756 	if (rme96->areg & RME96_AR_WSEL) {  in snd_rme96_proc_read()
2354 	rme96->areg &= ~RME96_AR_DAC_EN;  in rme96_suspend()
2355 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in rme96_suspend()
2377 	writel(rme96->areg | RME96_AR_PD2,  in rme96_resume()
2379 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in rme96_resume()
2383 	rme96->areg |= RME96_AR_DAC_EN;  in rme96_resume()
2384 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in rme96_resume()