138 struct ichdev {  struct
176 	struct ichdev ichd[2];  argument
366 static void snd_intel8x0m_setup_periods(struct intel8x0m *chip, struct ichdev *ichdev)  in snd_intel8x0m_setup_periods()  argument
369 	__le32 *bdbar = ichdev->bdbar;  in snd_intel8x0m_setup_periods()
370 	unsigned long port = ichdev->reg_offset;  in snd_intel8x0m_setup_periods()
372 	iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr);  in snd_intel8x0m_setup_periods()
373 	if (ichdev->size == ichdev->fragsize) {  in snd_intel8x0m_setup_periods()
374 		ichdev->ack_reload = ichdev->ack = 2;  in snd_intel8x0m_setup_periods()
375 		ichdev->fragsize1 = ichdev->fragsize >> 1;  in snd_intel8x0m_setup_periods()
377 			bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf);  in snd_intel8x0m_setup_periods()
379 						     ichdev->fragsize1 >> chip->pcm_pos_shift);  in snd_intel8x0m_setup_periods()
380 			bdbar[idx + 2] = cpu_to_le32(ichdev->physbuf + (ichdev->size >> 1));  in snd_intel8x0m_setup_periods()
382 						     ichdev->fragsize1 >> chip->pcm_pos_shift);  in snd_intel8x0m_setup_periods()
384 		ichdev->frags = 2;  in snd_intel8x0m_setup_periods()
386 		ichdev->ack_reload = ichdev->ack = 1;  in snd_intel8x0m_setup_periods()
387 		ichdev->fragsize1 = ichdev->fragsize;  in snd_intel8x0m_setup_periods()
389 			bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf + (((idx >> 1) * ichdev->fragsize) % ichdev->size));  in snd_intel8x0m_setup_periods()
391 						     ichdev->fragsize >> chip->pcm_pos_shift);  in snd_intel8x0m_setup_periods()
397 		ichdev->frags = ichdev->size / ichdev->fragsize;  in snd_intel8x0m_setup_periods()
399 	iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi = ICH_REG_LVI_MASK);  in snd_intel8x0m_setup_periods()
400 	ichdev->civ = 0;  in snd_intel8x0m_setup_periods()
402 	ichdev->lvi_frag = ICH_REG_LVI_MASK % ichdev->frags;  in snd_intel8x0m_setup_periods()
403 	ichdev->position = 0;  in snd_intel8x0m_setup_periods()
407 	       ichdev->lvi_frag, ichdev->frags, ichdev->fragsize,  in snd_intel8x0m_setup_periods()
408 	       ichdev->fragsize1);  in snd_intel8x0m_setup_periods()
411 	iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);  in snd_intel8x0m_setup_periods()
418 static inline void snd_intel8x0m_update(struct intel8x0m *chip, struct ichdev *ichdev)  in snd_intel8x0m_update()  argument
420 	unsigned long port = ichdev->reg_offset;  in snd_intel8x0m_update()
425 	if (civ == ichdev->civ) {  in snd_intel8x0m_update()
428 		ichdev->civ++;  in snd_intel8x0m_update()
429 		ichdev->civ &= ICH_REG_LVI_MASK;  in snd_intel8x0m_update()
431 		step = civ - ichdev->civ;  in snd_intel8x0m_update()
436 		ichdev->civ = civ;  in snd_intel8x0m_update()
439 	ichdev->position += step * ichdev->fragsize1;  in snd_intel8x0m_update()
440 	ichdev->position %= ichdev->size;  in snd_intel8x0m_update()
441 	ichdev->lvi += step;  in snd_intel8x0m_update()
442 	ichdev->lvi &= ICH_REG_LVI_MASK;  in snd_intel8x0m_update()
443 	iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi);  in snd_intel8x0m_update()
445 		ichdev->lvi_frag++;  in snd_intel8x0m_update()
446 		ichdev->lvi_frag %= ichdev->frags;  in snd_intel8x0m_update()
447 		ichdev->bdbar[ichdev->lvi * 2] = cpu_to_le32(ichdev->physbuf +  in snd_intel8x0m_update()
448 							     ichdev->lvi_frag *  in snd_intel8x0m_update()
449 							     ichdev->fragsize1);  in snd_intel8x0m_update()
453 		       ichdev->lvi * 2, ichdev->bdbar[ichdev->lvi * 2],  in snd_intel8x0m_update()
454 		       ichdev->bdbar[ichdev->lvi * 2 + 1], inb(ICH_REG_OFF_PIV + port),  in snd_intel8x0m_update()
457 		if (--ichdev->ack == 0) {  in snd_intel8x0m_update()
458 			ichdev->ack = ichdev->ack_reload;  in snd_intel8x0m_update()
462 	if (ack && ichdev->substream) {  in snd_intel8x0m_update()
464 		snd_pcm_period_elapsed(ichdev->substream);  in snd_intel8x0m_update()
467 	iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);  in snd_intel8x0m_update()
473 	struct ichdev *ichdev;  in snd_intel8x0m_interrupt()  local
491 		ichdev = &chip->ichd[i];  in snd_intel8x0m_interrupt()
492 		if (status & ichdev->int_sta_mask)  in snd_intel8x0m_interrupt()
493 			snd_intel8x0m_update(chip, ichdev);  in snd_intel8x0m_interrupt()
510 	struct ichdev *ichdev = get_ichdev(substream);  in snd_intel8x0m_pcm_trigger()  local
512 	unsigned long port = ichdev->reg_offset;  in snd_intel8x0m_pcm_trigger()
535 		while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) ;  in snd_intel8x0m_pcm_trigger()
545 	struct ichdev *ichdev = get_ichdev(substream);  in snd_intel8x0m_pcm_pointer()  local
548 	ptr1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb) << chip->pcm_pos_shift;  in snd_intel8x0m_pcm_pointer()
550 		ptr = ichdev->fragsize1 - ptr1;  in snd_intel8x0m_pcm_pointer()
553 	ptr += ichdev->position;  in snd_intel8x0m_pcm_pointer()
554 	if (ptr >= ichdev->size)  in snd_intel8x0m_pcm_pointer()
563 	struct ichdev *ichdev = get_ichdev(substream);  in snd_intel8x0m_pcm_prepare()  local
565 	ichdev->physbuf = runtime->dma_addr;  in snd_intel8x0m_pcm_prepare()
566 	ichdev->size = snd_pcm_lib_buffer_bytes(substream);  in snd_intel8x0m_pcm_prepare()
567 	ichdev->fragsize = snd_pcm_lib_period_bytes(substream);  in snd_intel8x0m_pcm_prepare()
568 	snd_ac97_write(ichdev->ac97, AC97_LINE1_RATE, runtime->rate);  in snd_intel8x0m_pcm_prepare()
569 	snd_ac97_write(ichdev->ac97, AC97_LINE1_LEVEL, 0);  in snd_intel8x0m_pcm_prepare()
570 	snd_intel8x0m_setup_periods(chip, ichdev);  in snd_intel8x0m_pcm_prepare()
596 static int snd_intel8x0m_pcm_open(struct snd_pcm_substream *substream, struct ichdev *ichdev)  in snd_intel8x0m_pcm_open()  argument
607 	ichdev->substream = substream;  in snd_intel8x0m_pcm_open()
613 	runtime->private_data = ichdev;  in snd_intel8x0m_pcm_open()
1054 	struct ichdev *ichdev;  in snd_intel8x0m_init()  local
1094 		ichdev = &chip->ichd[i];  in snd_intel8x0m_init()
1095 		ichdev->ichd = i;  in snd_intel8x0m_init()
1096 		ichdev->reg_offset = tbl[i].offset;  in snd_intel8x0m_init()
1097 		ichdev->int_sta_mask = tbl[i].int_sta_mask;  in snd_intel8x0m_init()
1100 			ichdev->roff_sr = ICH_REG_OFF_PICB;  in snd_intel8x0m_init()
1101 			ichdev->roff_picb = ICH_REG_OFF_SR;  in snd_intel8x0m_init()
1103 			ichdev->roff_sr = ICH_REG_OFF_SR;  in snd_intel8x0m_init()
1104 			ichdev->roff_picb = ICH_REG_OFF_PICB;  in snd_intel8x0m_init()
1107 			ichdev->ali_slot = (ichdev->reg_offset - 0x40) / 0x10;  in snd_intel8x0m_init()
1124 		ichdev = &chip->ichd[i];  in snd_intel8x0m_init()
1125 		ichdev->bdbar = ((__le32 *)chip->bdbars->area) + (i * ICH_MAX_FRAGS * 2);  in snd_intel8x0m_init()
1126 		ichdev->bdbar_addr = chip->bdbars->addr + (i * sizeof(u32) * ICH_MAX_FRAGS * 2);  in snd_intel8x0m_init()
1127 		int_sta_masks |= ichdev->int_sta_mask;  in snd_intel8x0m_init()