33 #define XRAM_XRAM_INST_OFFSET(_chan) \  argument
35 	(_chan * XRAM_XRAM_CHAN_INCR))
41 #define YRAM_YRAM_INST_OFFSET(_chan) \  argument
43 	(_chan * YRAM_YRAM_CHAN_INCR))
49 #define UC_UC_INST_OFFSET(_chan) \  argument
51 	(_chan * UC_UC_CHAN_INCR))
57 #define AXRAM_AXRAM_INST_OFFSET(_chan) \  argument
59 	(_chan * AXRAM_AXRAM_CHAN_INCR))
65 #define AYRAM_AYRAM_INST_OFFSET(_chan) \  argument
67 	(_chan * AYRAM_AYRAM_CHAN_INCR))
73 #define DSPDMAC_DMACFG_INST_OFFSET(_chan) \  argument
75 	(_chan * DSPDMAC_DMACFG_CHAN_INCR))
109 #define DSPDMAC_DMACFG_LP_LOOPING                1
112 #define DSPDMAC_DMACFG_AINCR_XORY                1
115 #define DSPDMAC_DMACFG_DWR_DMA_WR                1
118 #define DSPDMAC_DMACFG_AMODE_RSV1                1
125 #define DSPDMAC_DSPADROFS_INST_OFFSET(_chan) \  argument
127 	(_chan * DSPDMAC_DSPADROFS_CHAN_INCR))
141 #define DSPDMAC_DSPADRWOFS_INST_OFFSET(_chan) \  argument
143 	(_chan * DSPDMAC_DSPADRWOFS_CHAN_INCR))
164 #define DSPDMAC_DSPADRGOFS_INST_OFFSET(_chan) \  argument
166 	(_chan * DSPDMAC_DSPADRGOFS_CHAN_INCR))
196 #define DSPDMAC_XFRCNT_INST_OFFSET(_chan) \  argument
198 	(_chan * DSPDMAC_XFRCNT_CHAN_INCR))
211 #define DSPDMAC_IRQCNT_INST_OFFSET(_chan) \  argument
213 	(_chan * DSPDMAC_IRQCNT_CHAN_INCR))
226 #define DSPDMAC_AUDCHSEL_INST_OFFSET(_chan) \  argument
228 	(_chan * DSPDMAC_AUDCHSEL_CHAN_INCR))
351 	(((a)+((s)-1)*XRAM_XRAM_CHAN_INCR <  X_END))
353 	(((a) >= X_END) && ((a)+((s)-1)*XRAM_XRAM_CHAN_INCR < AX_END))
355 	(((a)+((s)-1)*XRAM_XRAM_CHAN_INCR <  X_EXT))
357 	(((a)+((s)-1)*XRAM_XRAM_CHAN_INCR < AX_END))
361 	((a)+((s)-1)*YRAM_YRAM_CHAN_INCR <  Y_END))
364 	((a)+((s)-1)*YRAM_YRAM_CHAN_INCR < AY_END))
367 	((a)+((s)-1)*YRAM_YRAM_CHAN_INCR <  Y_EXT))
370 	((a)+((s)-1)*YRAM_YRAM_CHAN_INCR < AY_END))
374 	((a)+((s)-1)*UC_UC_CHAN_INCR     < UC_END))