Lines Matching +full:0 +full:xfff7
118 static int total_bufsize[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1024 };
119 static int pcm_substreams_p[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 4 };
120 static int pcm_substreams_c[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1 };
122 static int use_pm[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
123 static int enable_mpu[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
127 static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
142 MODULE_PARM_DESC(clock, "Clock on " CARD_NAME " soundcard. (0 = auto-detect)");
144 MODULE_PARM_DESC(use_pm, "Toggle power-management. (0 = off, 1 = on, 2 = auto)");
146 MODULE_PARM_DESC(enable_mpu, "Enable MPU401. (0 = off, 1 = on, 2 = auto)");
160 #define NEC_VERSA_SUBID1 0x80581033
161 #define NEC_VERSA_SUBID2 0x803c1033
164 #define ESS_FMT_STEREO 0x01
165 #define ESS_FMT_16BIT 0x02
172 #define ESS_DISABLE_AUDIO 0x8000
173 #define ESS_ENABLE_SERIAL_IRQ 0x4000
174 #define IO_ADRESS_ALIAS 0x0020
175 #define MPU401_IRQ_ENABLE 0x0010
176 #define MPU401_IO_ENABLE 0x0008
177 #define GAME_IO_ENABLE 0x0004
178 #define FM_IO_ENABLE 0x0002
179 #define SB_IO_ENABLE 0x0001
183 #define PIC_SNOOP1 0x4000
184 #define PIC_SNOOP2 0x2000
185 #define SAFEGUARD 0x0800
186 #define DMA_CLEAR 0x0700
187 #define DMA_DDMA 0x0000
188 #define DMA_TDMA 0x0100
189 #define DMA_PCPCI 0x0200
190 #define POST_WRITE 0x0080
191 #define PCI_TIMING 0x0040
192 #define SWAP_LR 0x0020
193 #define SUBTR_DECODE 0x0002
197 #define SPDIF_CONFB 0x0100
198 #define HWV_CONFB 0x0080
199 #define DEBOUNCE 0x0040
200 #define GPIO_CONFB 0x0020
201 #define CHI_CONFB 0x0010
202 #define IDMA_CONFB 0x0008 /*undoc */
203 #define MIDI_FIX 0x0004 /*undoc */
204 #define IRQ_TO_ISA 0x0001 /*undoc */
207 #define RINGB_2CODEC_ID_MASK 0x0003
208 #define RINGB_DIS_VALIDATION 0x0008
209 #define RINGB_EN_SPDIF 0x0010
210 #define RINGB_EN_2CODEC 0x0020
211 #define RINGB_SING_BIT_DUAL 0x0040
216 #define ESM_INDEX 0x02
217 #define ESM_DATA 0x00
220 #define ESM_AC97_INDEX 0x30
221 #define ESM_AC97_DATA 0x32
222 #define ESM_RING_BUS_DEST 0x34
223 #define ESM_RING_BUS_CONTR_A 0x36
224 #define ESM_RING_BUS_CONTR_B 0x38
225 #define ESM_RING_BUS_SDO 0x3A
228 #define WC_INDEX 0x10
229 #define WC_DATA 0x12
230 #define WC_CONTROL 0x14
233 #define ASSP_INDEX 0x80
234 #define ASSP_MEMORY 0x82
235 #define ASSP_DATA 0x84
236 #define ASSP_CONTROL_A 0xA2
237 #define ASSP_CONTROL_B 0xA4
238 #define ASSP_CONTROL_C 0xA6
239 #define ASSP_HOSTW_INDEX 0xA8
240 #define ASSP_HOSTW_DATA 0xAA
241 #define ASSP_HOSTW_IRQ 0xAC
243 #define ESM_MPU401_PORT 0x98
245 #define ESM_PORT_HOST_IRQ 0x18
247 #define IDR0_DATA_PORT 0x00
248 #define IDR1_CRAM_POINTER 0x01
249 #define IDR2_CRAM_DATA 0x02
250 #define IDR3_WAVE_DATA 0x03
251 #define IDR4_WAVE_PTR_LOW 0x04
252 #define IDR5_WAVE_PTR_HI 0x05
253 #define IDR6_TIMER_CTRL 0x06
254 #define IDR7_WAVE_ROMRAM 0x07
256 #define WRITEABLE_MAP 0xEFFFFF
257 #define READABLE_MAP 0x64003F
261 #define ESM_LEGACY_AUDIO_CONTROL 0x40
262 #define ESM_ACPI_COMMAND 0x54
263 #define ESM_CONFIG_A 0x50
264 #define ESM_CONFIG_B 0x52
265 #define ESM_DDMA 0x60
268 #define ESM_BOB_ENABLE 0x0001
269 #define ESM_BOB_START 0x0001
272 #define ESM_RESET_MAESTRO 0x8000
273 #define ESM_RESET_DIRECTSOUND 0x4000
274 #define ESM_HIRQ_ClkRun 0x0100
275 #define ESM_HIRQ_HW_VOLUME 0x0040
276 #define ESM_HIRQ_HARPO 0x0030 /* What's that? */
277 #define ESM_HIRQ_ASSP 0x0010
278 #define ESM_HIRQ_DSIE 0x0004
279 #define ESM_HIRQ_MPU401 0x0002
280 #define ESM_HIRQ_SB 0x0001
283 #define ESM_MPU401_IRQ 0x02
284 #define ESM_SB_IRQ 0x01
285 #define ESM_SOUND_IRQ 0x04
286 #define ESM_ASSP_IRQ 0x10
287 #define ESM_HWVOL_IRQ 0x40
296 /* APU Modes: reg 0x00, bit 4-7 */
298 #define ESM_APU_MODE_MASK (0xf << 4)
299 #define ESM_APU_OFF 0x00
300 #define ESM_APU_16BITLINEAR 0x01 /* 16-Bit Linear Sample Player */
301 #define ESM_APU_16BITSTEREO 0x02 /* 16-Bit Stereo Sample Player */
302 #define ESM_APU_8BITLINEAR 0x03 /* 8-Bit Linear Sample Player */
303 #define ESM_APU_8BITSTEREO 0x04 /* 8-Bit Stereo Sample Player */
304 #define ESM_APU_8BITDIFF 0x05 /* 8-Bit Differential Sample Playrer */
305 #define ESM_APU_DIGITALDELAY 0x06 /* Digital Delay Line */
306 #define ESM_APU_DUALTAP 0x07 /* Dual Tap Reader */
307 #define ESM_APU_CORRELATOR 0x08 /* Correlator */
308 #define ESM_APU_INPUTMIXER 0x09 /* Input Mixer */
309 #define ESM_APU_WAVETABLE 0x0A /* Wave Table Mode */
310 #define ESM_APU_SRCONVERTOR 0x0B /* Sample Rate Convertor */
311 #define ESM_APU_16BITPINGPONG 0x0C /* 16-Bit Ping-Pong Sample Player */
312 #define ESM_APU_RESERVED1 0x0D /* Reserved 1 */
313 #define ESM_APU_RESERVED2 0x0E /* Reserved 2 */
314 #define ESM_APU_RESERVED3 0x0F /* Reserved 3 */
316 /* reg 0x00 */
317 #define ESM_APU_FILTER_Q_SHIFT 0
318 #define ESM_APU_FILTER_Q_MASK (3 << 0)
320 #define ESM_APU_FILTER_LESSQ 0x00
321 #define ESM_APU_FILTER_MOREQ 0x03
333 /* reg 0x02 */
334 #define ESM_APU_SUBMIX_GROUP_SHIRT 0
335 #define ESM_APU_SUBMIX_GROUP_MASK (7 << 0)
342 /* reg 0x03 */
343 #define ESM_APU_STEP_SIZE_MASK 0x0fff
345 /* reg 0x04 */
346 #define ESM_APU_PHASE_SHIFT 0
347 #define ESM_APU_PHASE_MASK (0xff << 0)
349 #define ESM_APU_WAVE64K_PAGE_MASK (0xff << 8)
351 /* reg 0x05 - wave start offset */
352 /* reg 0x06 - wave end offset */
353 /* reg 0x07 - wave loop length */
355 /* reg 0x08 */
356 #define ESM_APU_EFFECT_GAIN_SHIFT 0
357 #define ESM_APU_EFFECT_GAIN_MASK (0xff << 0)
359 #define ESM_APU_TREMOLO_DEPTH_MASK (0xf << 8)
361 #define ESM_APU_TREMOLO_RATE_MASK (0xf << 12)
363 /* reg 0x09 */
364 /* bit 0-7 amplitude dest? */
366 #define ESM_APU_AMPLITUDE_NOW_MASK (0xff << 8)
368 /* reg 0x0a */
369 #define ESM_APU_POLAR_PAN_SHIFT 0
370 #define ESM_APU_POLAR_PAN_MASK (0x3f << 0)
372 #define ESM_APU_PAN_CENTER_CIRCLE 0x00
373 #define ESM_APU_PAN_MIDDLE_RADIUS 0x01
374 #define ESM_APU_PAN_OUTSIDE_RADIUS 0x02
377 #define ESM_APU_FILTER_TUNING_MASK (0xff << 8)
379 /* reg 0x0b */
380 #define ESM_APU_DATA_SRC_A_SHIFT 0
381 #define ESM_APU_DATA_SRC_A_MASK (0x7f << 0)
384 #define ESM_APU_DATA_SRC_B_MASK (0x7f << 8)
387 #define ESM_APU_VIBRATO_RATE_SHIFT 0
388 #define ESM_APU_VIBRATO_RATE_MASK (0xf << 0)
390 #define ESM_APU_VIBRATO_DEPTH_MASK (0xf << 4)
392 #define ESM_APU_VIBRATO_PHASE_MASK (0xff << 8)
394 /* reg 0x0c */
398 #define ESM_APU_FILTER_2POLE_LOPASS 0x00
399 #define ESM_APU_FILTER_2POLE_BANDPASS 0x01
400 #define ESM_APU_FILTER_2POLE_HIPASS 0x02
401 #define ESM_APU_FILTER_1POLE_LOPASS 0x03
402 #define ESM_APU_FILTER_1POLE_HIPASS 0x04
403 #define ESM_APU_FILTER_OFF 0x05
406 #define ESM_APU_ATFP_AMPLITUDE 0x00
407 #define ESM_APU_ATFP_TREMELO 0x01
408 #define ESM_APU_ATFP_FILTER 0x02
409 #define ESM_APU_ATFP_PAN 0x03
412 #define ESM_APU_ATFP_FLG_OFF 0x00
413 #define ESM_APU_ATFP_FLG_WAIT 0x01
414 #define ESM_APU_ATFP_FLG_DONE 0x02
415 #define ESM_APU_ATFP_FLG_INPROCESS 0x03
419 #define ESM_MEM_ALIGN 0x1000
420 #define ESM_MIXBUF_SIZE 0x400
422 #define ESM_MODE_PLAY 0
557 …{ 0x1285, 0x0100, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO …
559 …{ 0x125d, 0x1968, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO2…
561 …{ 0x125d, 0x1978, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO2…
562 { 0, }
612 while (timeout-- > 0) { in snd_es1968_ac97_wait()
614 return 0; in snd_es1968_ac97_wait()
625 while (timeout-- > 0) { in snd_es1968_ac97_wait_poll()
627 return 0; in snd_es1968_ac97_wait_poll()
648 u16 data = 0; in snd_es1968_ac97_read()
653 outb(reg | 0x80, chip->io_port + ESM_AC97_INDEX); in snd_es1968_ac97_read()
669 for (i = 0; i < 1000; i++) in apu_index_set()
679 for (i = 0; i < 1000; i++) { in apu_data_set()
711 return 0; in __apu_get_register()
727 #if 0 /* ASSP is not supported */
785 reg = __maestro_read(chip, 0x11); in snd_es1968_bob_stop()
787 __maestro_write(chip, 0x11, reg); in snd_es1968_bob_stop()
788 reg = __maestro_read(chip, 0x17); in snd_es1968_bob_stop()
790 __maestro_write(chip, 0x17, reg); in snd_es1968_bob_stop()
817 /* divide = 0 is illegal, but don't let prescale = 4! */ in snd_es1968_bob_start()
818 if (divide == 0) { in snd_es1968_bob_start()
825 __maestro_write(chip, 6, 0x9000 | (prescale << 5) | divide); /* set reg */ in snd_es1968_bob_start()
828 __maestro_write(chip, 0x11, __maestro_read(chip, 0x11) | 1); in snd_es1968_bob_start()
829 __maestro_write(chip, 0x17, __maestro_read(chip, 0x17) | 1); in snd_es1968_bob_start()
850 if (chip->bobclient <= 0) in snd_es1968_bob_dec()
894 #if 0 /* XXX: do we need this? */ in snd_es1968_compute_rate()
895 if (rate > 0x10000) in snd_es1968_compute_rate()
896 rate = 0x10000; in snd_es1968_compute_rate()
907 offset = apu_get_register(chip, es->apu[0], 5); in snd_es1968_get_dma_ptr()
909 offset -= es->base[0]; in snd_es1968_get_dma_ptr()
911 return (offset & 0xFFFE); /* hardware is in words */ in snd_es1968_get_dma_ptr()
917 (apu_get_register(chip, apu, 2) & 0x00FF) | in snd_es1968_apu_set_freq()
918 ((freq & 0xff) << 8) | 0x10); in snd_es1968_apu_set_freq()
926 __apu_set_register(esm, apu, 0, in snd_es1968_trigger_apu()
927 (__apu_get_register(esm, apu, 0) & 0xff0f) | in snd_es1968_trigger_apu()
934 __apu_set_register(chip, es->apu[0], 5, es->base[0]); in snd_es1968_pcm_start()
935 snd_es1968_trigger_apu(chip, es->apu[0], es->apu_mode[0]); in snd_es1968_pcm_start()
954 snd_es1968_trigger_apu(chip, es->apu[0], 0); in snd_es1968_pcm_stop()
955 snd_es1968_trigger_apu(chip, es->apu[1], 0); in snd_es1968_pcm_stop()
957 snd_es1968_trigger_apu(chip, es->apu[2], 0); in snd_es1968_pcm_stop()
958 snd_es1968_trigger_apu(chip, es->apu[3], 0); in snd_es1968_pcm_stop()
967 u32 tmpval = (addr - 0x10) & 0xFFF8; in snd_es1968_program_wavecache()
989 int high_apu = 0; in snd_es1968_playback_setup()
1000 for (channel = 0; channel <= high_apu; channel++) { in snd_es1968_playback_setup()
1003 snd_es1968_program_wavecache(chip, es, channel, es->memory->buf.addr, 0); in snd_es1968_playback_setup()
1010 pa |= 0x00400000; /* System RAM (Bit 22) */ in snd_es1968_playback_setup()
1015 pa |= 0x00800000; /* (Bit 23) */ in snd_es1968_playback_setup()
1022 es->base[channel] = pa & 0xFFFF; in snd_es1968_playback_setup()
1024 for (i = 0; i < 16; i++) in snd_es1968_playback_setup()
1025 apu_set_register(chip, apu, i, 0x0000); in snd_es1968_playback_setup()
1028 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8); in snd_es1968_playback_setup()
1029 apu_set_register(chip, apu, 5, pa & 0xFFFF); in snd_es1968_playback_setup()
1030 apu_set_register(chip, apu, 6, (pa + size) & 0xFFFF); in snd_es1968_playback_setup()
1035 apu_set_register(chip, apu, 8, 0x0000); in snd_es1968_playback_setup()
1036 /* set amp now to 0xd0 (?), low byte is 'amplitude dest'? */ in snd_es1968_playback_setup()
1037 apu_set_register(chip, apu, 9, 0xD000); in snd_es1968_playback_setup()
1040 apu_set_register(chip, apu, 11, 0x0000); in snd_es1968_playback_setup()
1042 apu_set_register(chip, apu, 0, 0x400F); in snd_es1968_playback_setup()
1056 0x8F00 | (channel ? 0 : 0x10)); in snd_es1968_playback_setup()
1059 apu_set_register(chip, apu, 10, 0x8F08); in snd_es1968_playback_setup()
1064 outw(1, chip->io_port + 0x04); in snd_es1968_playback_setup()
1083 snd_es1968_apu_set_freq(chip, es->apu[0], freq); in snd_es1968_playback_setup()
1105 es->base[channel] = pa & 0xFFFF; in init_capture_apu()
1106 pa |= 0x00400000; /* bit 22 -> System RAM */ in init_capture_apu()
1109 for (i = 0; i < 16; i++) in init_capture_apu()
1110 apu_set_register(chip, apu, i, 0x0000); in init_capture_apu()
1114 apu_set_register(chip, apu, 2, 0x8); in init_capture_apu()
1117 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8); in init_capture_apu()
1118 apu_set_register(chip, apu, 5, pa & 0xFFFF); in init_capture_apu()
1119 apu_set_register(chip, apu, 6, (pa + bsize) & 0xFFFF); in init_capture_apu()
1122 apu_set_register(chip, apu, 8, 0x00F0); in init_capture_apu()
1124 apu_set_register(chip, apu, 9, 0x0000); in init_capture_apu()
1126 apu_set_register(chip, apu, 10, 0x8F08); in init_capture_apu()
1130 apu_set_register(chip, apu, 0, 0x400F); in init_capture_apu()
1143 0 = mono/left SRC in snd_es1968_capture_setup()
1153 /* parallel in crap, see maestro reg 0xC [8-11] */ in snd_es1968_capture_setup()
1156 ESM_APU_INPUTMIXER, 0x14); in snd_es1968_capture_setup()
1158 init_capture_apu(chip, es, 0, es->memory->buf.addr, size, in snd_es1968_capture_setup()
1165 ESM_APU_INPUTMIXER, 0x15); in snd_es1968_capture_setup()
1173 /* Sample Rate conversion APUs don't like 0x10000 for their rate */ in snd_es1968_capture_setup()
1182 snd_es1968_apu_set_freq(chip, es->apu[0], freq); in snd_es1968_capture_setup()
1185 /* fix mixer rate at 48khz. and its _must_ be 0x10000. */ in snd_es1968_capture_setup()
1186 freq = 0x10000; in snd_es1968_capture_setup()
1192 outw(1, chip->io_port + 0x04); in snd_es1968_capture_setup()
1212 es->fmt = 0; in snd_es1968_pcm_prepare()
1231 return 0; in snd_es1968_pcm_prepare()
1246 es->count = 0; in snd_es1968_pcm_trigger()
1247 es->hwptr = 0; in snd_es1968_pcm_trigger()
1256 es->running = 0; in snd_es1968_pcm_trigger()
1261 return 0; in snd_es1968_pcm_trigger()
1293 .fifo_size = 0,
1314 .fifo_size = 0,
1326 int max_size = 0; in calc_available_memory_size()
1369 buf->empty = 0; in snd_es1968_new_memory()
1424 if (err < 0 || ! chip->dma.area) { in snd_es1968_init_dmabuf()
1443 memset(chip->dma.area, 0, ESM_MEM_ALIGN); in snd_es1968_init_dmabuf()
1451 return 0; in snd_es1968_init_dmabuf()
1467 return 0; in snd_es1968_hw_params()
1489 return 0; in snd_es1968_hw_free()
1495 return 0; in snd_es1968_hw_free()
1506 for (apu = 0; apu < NR_APUS; apu += 2) { in snd_es1968_alloc_apu_pair()
1538 if (apu1 < 0) in snd_es1968_playback_open()
1547 es->apu[0] = apu1; in snd_es1968_playback_open()
1549 es->apu_mode[0] = 0; in snd_es1968_playback_open()
1550 es->apu_mode[1] = 0; in snd_es1968_playback_open()
1551 es->running = 0; in snd_es1968_playback_open()
1564 return 0; in snd_es1968_playback_open()
1575 if (apu1 < 0) in snd_es1968_capture_open()
1578 if (apu2 < 0) { in snd_es1968_capture_open()
1590 es->apu[0] = apu1; in snd_es1968_capture_open()
1594 es->apu_mode[0] = 0; in snd_es1968_capture_open()
1595 es->apu_mode[1] = 0; in snd_es1968_capture_open()
1596 es->apu_mode[2] = 0; in snd_es1968_capture_open()
1597 es->apu_mode[3] = 0; in snd_es1968_capture_open()
1598 es->running = 0; in snd_es1968_capture_open()
1610 memset(es->mixbuf->buf.area, 0, ESM_MIXBUF_SIZE); in snd_es1968_capture_open()
1616 snd_pcm_hw_constraint_pow2(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES); in snd_es1968_capture_open()
1622 return 0; in snd_es1968_capture_open()
1631 return 0; in snd_es1968_playback_close()
1636 snd_es1968_free_apu_pair(chip, es->apu[0]); in snd_es1968_playback_close()
1639 return 0; in snd_es1968_playback_close()
1648 return 0; in snd_es1968_capture_close()
1654 snd_es1968_free_apu_pair(chip, es->apu[0]); in snd_es1968_capture_close()
1658 return 0; in snd_es1968_capture_close()
1695 if (chip->clock == 0) in es1968_measure_clock()
1700 if (apu < 0) { in es1968_measure_clock()
1713 memset(memory->buf.area, 0, CLOCK_MEASURE_BUFSIZE); in es1968_measure_clock()
1715 wave_set_register(chip, apu << 3, (memory->buf.addr - 0x10) & 0xfff8); in es1968_measure_clock()
1718 pa |= 0x00400000; /* System RAM (Bit 22) */ in es1968_measure_clock()
1721 for (i = 0; i < 16; i++) in es1968_measure_clock()
1722 apu_set_register(chip, apu, i, 0x0000); in es1968_measure_clock()
1724 apu_set_register(chip, apu, 0, 0x400f); in es1968_measure_clock()
1725 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xff) << 8); in es1968_measure_clock()
1726 apu_set_register(chip, apu, 5, pa & 0xffff); in es1968_measure_clock()
1727 apu_set_register(chip, apu, 6, (pa + CLOCK_MEASURE_BUFSIZE/2) & 0xffff); in es1968_measure_clock()
1729 apu_set_register(chip, apu, 8, 0x0000); in es1968_measure_clock()
1730 apu_set_register(chip, apu, 9, 0xD000); in es1968_measure_clock()
1731 apu_set_register(chip, apu, 10, 0x8F08); in es1968_measure_clock()
1732 apu_set_register(chip, apu, 11, 0x0000); in es1968_measure_clock()
1734 outw(1, chip->io_port + 0x04); /* clear WP interrupts */ in es1968_measure_clock()
1744 __apu_set_register(chip, apu, 5, pa & 0xffff); in es1968_measure_clock()
1752 snd_es1968_trigger_apu(chip, apu, 0); /* stop */ in es1968_measure_clock()
1754 chip->in_measurement = 0; in es1968_measure_clock()
1758 offset -= (pa & 0xffff); in es1968_measure_clock()
1759 offset &= 0xfffe; in es1968_measure_clock()
1764 if (t == 0) { in es1968_measure_clock()
1798 if (err < 0) in snd_es1968_pcm()
1802 wave_set_register(chip, 0x01FC, chip->dma.addr >> 12); in snd_es1968_pcm()
1803 wave_set_register(chip, 0x01FD, chip->dma.addr >> 12); in snd_es1968_pcm()
1804 wave_set_register(chip, 0x01FE, chip->dma.addr >> 12); in snd_es1968_pcm()
1805 wave_set_register(chip, 0x01FF, chip->dma.addr >> 12); in snd_es1968_pcm()
1810 if (err < 0) in snd_es1968_pcm()
1819 pcm->info_flags = 0; in snd_es1968_pcm()
1825 return 0; in snd_es1968_pcm()
1836 cp1 = __apu_get_register(chip, 0, 5); in snd_es1968_suppress_jitter()
1875 of a byte wide register. The meaning of bits 0 and 4 is unknown. */
1884 x = inb(chip->io_port + 0x1c) & 0xee; in es1968_update_hw_volume()
1886 outb(0x88, chip->io_port + 0x1c); in es1968_update_hw_volume()
1887 outb(0x88, chip->io_port + 0x1d); in es1968_update_hw_volume()
1888 outb(0x88, chip->io_port + 0x1e); in es1968_update_hw_volume()
1889 outb(0x88, chip->io_port + 0x1f); in es1968_update_hw_volume()
1900 case 0x88: in es1968_update_hw_volume()
1902 val ^= 0x8000; in es1968_update_hw_volume()
1904 case 0xaa: in es1968_update_hw_volume()
1906 if ((val & 0x7f) > 0) in es1968_update_hw_volume()
1908 if ((val & 0x7f00) > 0) in es1968_update_hw_volume()
1909 val -= 0x0100; in es1968_update_hw_volume()
1911 case 0x66: in es1968_update_hw_volume()
1913 if ((val & 0x7f) < 0x1f) in es1968_update_hw_volume()
1915 if ((val & 0x7f00) < 0x1f00) in es1968_update_hw_volume()
1916 val += 0x0100; in es1968_update_hw_volume()
1926 val = 0; in es1968_update_hw_volume()
1928 case 0x88: in es1968_update_hw_volume()
1934 case 0xaa: in es1968_update_hw_volume()
1938 case 0x66: in es1968_update_hw_volume()
1947 input_report_key(chip->input_dev, val, 0); in es1968_update_hw_volume()
1961 event = inb(chip->io_port + 0x1A); in snd_es1968_interrupt()
1971 outb(0xFF, chip->io_port + 0x1A); in snd_es1968_interrupt()
2014 err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus); in snd_es1968_mixer()
2015 if (err < 0) in snd_es1968_mixer()
2019 memset(&ac97, 0, sizeof(ac97)); in snd_es1968_mixer()
2022 if (err < 0) in snd_es1968_mixer()
2033 return 0; in snd_es1968_mixer()
2050 save_ringbus_a = inw(ioaddr + 0x36); in snd_es1968_ac97_reset()
2052 //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); /* clear second codec id? */ in snd_es1968_ac97_reset()
2054 outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a); in snd_es1968_ac97_reset()
2055 outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c); in snd_es1968_ac97_reset()
2058 outw(0x0000, ioaddr + 0x36); in snd_es1968_ac97_reset()
2059 save_68 = inw(ioaddr + 0x68); in snd_es1968_ac97_reset()
2060 pci_read_config_word(chip->pci, 0x58, &w); /* something magical with gpio and bus arb. */ in snd_es1968_ac97_reset()
2063 save_68 |= 0x10; in snd_es1968_ac97_reset()
2064 outw(0xfffe, ioaddr + 0x64); /* unmask gpio 0 */ in snd_es1968_ac97_reset()
2065 outw(0x0001, ioaddr + 0x68); /* gpio write */ in snd_es1968_ac97_reset()
2066 outw(0x0000, ioaddr + 0x60); /* write 0 to gpio 0 */ in snd_es1968_ac97_reset()
2068 outw(0x0001, ioaddr + 0x60); /* write 1 to gpio 1 */ in snd_es1968_ac97_reset()
2071 outw(save_68 | 0x1, ioaddr + 0x68); /* now restore .. */ in snd_es1968_ac97_reset()
2072 outw((inw(ioaddr + 0x38) & 0xfffc) | 0x1, ioaddr + 0x38); in snd_es1968_ac97_reset()
2073 outw((inw(ioaddr + 0x3a) & 0xfffc) | 0x1, ioaddr + 0x3a); in snd_es1968_ac97_reset()
2074 outw((inw(ioaddr + 0x3c) & 0xfffc) | 0x1, ioaddr + 0x3c); in snd_es1968_ac97_reset()
2078 outw(0x0000, ioaddr + 0x36); in snd_es1968_ac97_reset()
2079 outw(0xfff7, ioaddr + 0x64); /* unmask gpio 3 */ in snd_es1968_ac97_reset()
2080 save_68 = inw(ioaddr + 0x68); in snd_es1968_ac97_reset()
2081 outw(0x0009, ioaddr + 0x68); /* gpio write 0 & 3 ?? */ in snd_es1968_ac97_reset()
2082 outw(0x0001, ioaddr + 0x60); /* write 1 to gpio */ in snd_es1968_ac97_reset()
2084 outw(0x0009, ioaddr + 0x60); /* write 9 to gpio */ in snd_es1968_ac97_reset()
2086 //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); in snd_es1968_ac97_reset()
2087 outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a); in snd_es1968_ac97_reset()
2088 outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c); in snd_es1968_ac97_reset()
2090 #if 0 /* the loop here needs to be much better if we want it.. */ in snd_es1968_ac97_reset()
2093 outb(0x80 | 0x7c, ioaddr + 0x30); in snd_es1968_ac97_reset()
2094 for (w = 0;; w++) { in snd_es1968_ac97_reset()
2095 if ((inw(ioaddr + 0x30) & 1) == 0) { in snd_es1968_ac97_reset()
2096 if (inb(ioaddr + 0x32) != 0) in snd_es1968_ac97_reset()
2099 outb(0x80 | 0x7d, ioaddr + 0x30); in snd_es1968_ac97_reset()
2100 if (((inw(ioaddr + 0x30) & 1) == 0) in snd_es1968_ac97_reset()
2101 && (inb(ioaddr + 0x32) != 0)) in snd_es1968_ac97_reset()
2103 outb(0x80 | 0x7f, ioaddr + 0x30); in snd_es1968_ac97_reset()
2104 if (((inw(ioaddr + 0x30) & 1) == 0) in snd_es1968_ac97_reset()
2105 && (inb(ioaddr + 0x32) != 0)) in snd_es1968_ac97_reset()
2110 outb(inb(ioaddr + 0x37) | 0x08, ioaddr + 0x37); /* do a software reset */ in snd_es1968_ac97_reset()
2112 outb(inb(ioaddr + 0x37) & ~0x08, in snd_es1968_ac97_reset()
2113 ioaddr + 0x37); in snd_es1968_ac97_reset()
2115 outw(0x80, ioaddr + 0x30); in snd_es1968_ac97_reset()
2116 for (w = 0; w < 10000; w++) { in snd_es1968_ac97_reset()
2117 if ((inw(ioaddr + 0x30) & 1) == 0) in snd_es1968_ac97_reset()
2125 outw(0xf9ff, ioaddr + 0x64); in snd_es1968_ac97_reset()
2126 outw(inw(ioaddr + 0x68) | 0x600, ioaddr + 0x68); in snd_es1968_ac97_reset()
2127 outw(0x0209, ioaddr + 0x60); in snd_es1968_ac97_reset()
2131 outw(save_ringbus_a, ioaddr + 0x36); in snd_es1968_ac97_reset()
2136 outb(inb(ioaddr+0xc0)|(1<<5), ioaddr+0xc0); in snd_es1968_ac97_reset()
2137 outb(0xff, ioaddr+0xc3); in snd_es1968_ac97_reset()
2138 outb(0xff, ioaddr+0xc4); in snd_es1968_ac97_reset()
2139 outb(0xff, ioaddr+0xc6); in snd_es1968_ac97_reset()
2140 outb(0xff, ioaddr+0xc8); in snd_es1968_ac97_reset()
2141 outb(0x3f, ioaddr+0xcf); in snd_es1968_ac97_reset()
2142 outb(0x3f, ioaddr+0xd0); in snd_es1968_ac97_reset()
2151 outw(0x0000, chip->io_port + ESM_PORT_HOST_IRQ); in snd_es1968_reset()
2208 w &= ~(1 << 1); /* reserved, always write 0 */ in snd_es1968_chip_init()
2216 w &= ~(1 << 0); in snd_es1968_chip_init()
2227 w &= ~(0x1f); /* disable mpu irq/io, game port, fm, SB */ in snd_es1968_chip_init()
2232 pci_read_config_word(pci, 0x58, &w); in snd_es1968_chip_init()
2236 pci_write_config_word(pci, 0x58, w); in snd_es1968_chip_init()
2246 /* setup usual 0x34 stuff.. 0x36 may be chip specific */ in snd_es1968_chip_init()
2247 outw(0xC090, iobase + ESM_RING_BUS_DEST); /* direct sound, stereo */ in snd_es1968_chip_init()
2249 outw(0x3000, iobase + ESM_RING_BUS_CONTR_A); /* enable ringbus/serial */ in snd_es1968_chip_init()
2267 outb(0x88, iobase+0x1c); in snd_es1968_chip_init()
2268 outb(0x88, iobase+0x1d); in snd_es1968_chip_init()
2269 outb(0x88, iobase+0x1e); in snd_es1968_chip_init()
2270 outb(0x88, iobase+0x1f); in snd_es1968_chip_init()
2275 outb(0, iobase + ASSP_CONTROL_B); in snd_es1968_chip_init()
2277 outb(0, iobase + ASSP_CONTROL_C); /* M: Disable ASSP, ASSP IRQ's and FM Port */ in snd_es1968_chip_init()
2282 for (i = 0; i < 16; i++) { in snd_es1968_chip_init()
2283 /* Write 0 into the buffer area 0x1E0->1EF */ in snd_es1968_chip_init()
2284 outw(0x01E0 + i, iobase + WC_INDEX); in snd_es1968_chip_init()
2285 outw(0x0000, iobase + WC_DATA); in snd_es1968_chip_init()
2287 /* The 1.10 test program seem to write 0 into the buffer area in snd_es1968_chip_init()
2288 * 0x1D0-0x1DF too.*/ in snd_es1968_chip_init()
2289 outw(0x01D0 + i, iobase + WC_INDEX); in snd_es1968_chip_init()
2290 outw(0x0000, iobase + WC_DATA); in snd_es1968_chip_init()
2293 (wave_get_register(chip, IDR7_WAVE_ROMRAM) & 0xFF00)); in snd_es1968_chip_init()
2295 wave_get_register(chip, IDR7_WAVE_ROMRAM) | 0x100); in snd_es1968_chip_init()
2297 wave_get_register(chip, IDR7_WAVE_ROMRAM) & ~0x200); in snd_es1968_chip_init()
2299 wave_get_register(chip, IDR7_WAVE_ROMRAM) | ~0x400); in snd_es1968_chip_init()
2302 maestro_write(chip, IDR2_CRAM_DATA, 0x0000); in snd_es1968_chip_init()
2305 maestro_write(chip, 0x08, 0xB004); in snd_es1968_chip_init()
2306 maestro_write(chip, 0x09, 0x001B); in snd_es1968_chip_init()
2307 maestro_write(chip, 0x0A, 0x8000); in snd_es1968_chip_init()
2308 maestro_write(chip, 0x0B, 0x3F37); in snd_es1968_chip_init()
2309 maestro_write(chip, 0x0C, 0x0098); in snd_es1968_chip_init()
2312 maestro_write(chip, 0x0C, in snd_es1968_chip_init()
2313 (maestro_read(chip, 0x0C) & ~0xF000) | 0x8000); in snd_es1968_chip_init()
2315 maestro_write(chip, 0x0C, in snd_es1968_chip_init()
2316 (maestro_read(chip, 0x0C) & ~0x0F00) | 0x0500); in snd_es1968_chip_init()
2318 maestro_write(chip, 0x0D, 0x7632); in snd_es1968_chip_init()
2325 w &= ~0xFA00; /* Seems to be reserved? I don't know */ in snd_es1968_chip_init()
2326 w |= 0xA000; /* reserved... I don't know */ in snd_es1968_chip_init()
2327 w &= ~0x0200; /* Channels 56,57,58,59 as Extra Play,Rec Channel enable in snd_es1968_chip_init()
2329 w |= 0x0100; /* Wave Cache Operation Enabled */ in snd_es1968_chip_init()
2330 w |= 0x0080; /* Channels 60/61 as Placback/Record enabled */ in snd_es1968_chip_init()
2331 w &= ~0x0060; /* Clear Wavtable Size */ in snd_es1968_chip_init()
2332 w |= 0x0020; /* Wavetable Size : 1MB */ in snd_es1968_chip_init()
2334 w &= ~0x000C; /* DMA Stuff? I don't understand what the datasheet means */ in snd_es1968_chip_init()
2336 w &= ~0x0001; /* Test Mode off */ in snd_es1968_chip_init()
2341 for (i = 0; i < NR_APUS; i++) { in snd_es1968_chip_init()
2342 for (w = 0; w < NR_APU_REGS; w++) in snd_es1968_chip_init()
2343 apu_set_register(chip, i, w, 0); in snd_es1968_chip_init()
2355 outb(w, chip->io_port + 0x1A); in snd_es1968_start_irq()
2369 return 0; in es1968_suspend()
2376 return 0; in es1968_suspend()
2386 return 0; in es1968_resume()
2393 wave_set_register(chip, 0x01FC, chip->dma.addr >> 12); in es1968_resume()
2417 chip->in_suspend = 0; in es1968_resume()
2418 return 0; in es1968_resume()
2428 #define JOYSTICK_ADDR 0x200
2451 pci_write_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, val | 0x04); in snd_es1968_create_gameport()
2460 return 0; in snd_es1968_create_gameport()
2505 return 0; in snd_es1968_input_register()
2510 #define GPIO_DATA 0x60
2514 bits 0/1=read/write direction */
2535 u16 val = 0; in snd_es1968_tea575x_set_pins()
2537 val |= (pins & TEA575X_DATA) ? (1 << gpio.data) : 0; in snd_es1968_tea575x_set_pins()
2538 val |= (pins & TEA575X_CLK) ? (1 << gpio.clk) : 0; in snd_es1968_tea575x_set_pins()
2539 val |= (pins & TEA575X_WREN) ? (1 << gpio.wren) : 0; in snd_es1968_tea575x_set_pins()
2549 u8 ret = 0; in snd_es1968_tea575x_get_pins()
2593 outw(1, chip->io_port + 0x04); /* clear WP interrupts */ in snd_es1968_free()
2594 outw(0, chip->io_port + ESM_PORT_HOST_IRQ); /* disable IRQ */ in snd_es1968_free()
2611 { TYPE_MAESTRO2E, 0x0e11 }, /* Compaq Armada */
2612 { TYPE_MAESTRO2E, 0x1028 },
2613 { TYPE_MAESTRO2E, 0x103c },
2614 { TYPE_MAESTRO2E, 0x1179 },
2615 { TYPE_MAESTRO2E, 0x14c0 }, /* HP omnibook 4150 */
2616 { TYPE_MAESTRO2E, 0x1558 },
2617 { TYPE_MAESTRO2E, 0x125d }, /* a PCI card, e.g. Terratec DMX */
2618 { TYPE_MAESTRO2, 0x125d }, /* a PCI card, e.g. SF64-PCE2 */
2622 { TYPE_MAESTRO2, 0x125d },
2639 if (err < 0) in snd_es1968_create()
2664 if (err < 0) in snd_es1968_create()
2666 chip->io_port = pci_resource_start(pci, 0); in snd_es1968_create()
2677 for (i = 0; i < 32; i++) in snd_es1968_create()
2678 chip->maestro_map[i] = 0; in snd_es1968_create()
2681 for (i = 0; i < NR_APUS; i++) in snd_es1968_create()
2691 for (i = 0; i < (int)ARRAY_SIZE(pm_allowlist); i++) { in snd_es1968_create()
2701 do_pm = 0; in snd_es1968_create()
2710 if (chip->pci->subsystem_vendor != 0x125d) in snd_es1968_create()
2711 return 0; in snd_es1968_create()
2713 if (err < 0) in snd_es1968_create()
2720 for (i = 0; i < ARRAY_SIZE(snd_es1968_tea575x_gpios); i++) { in snd_es1968_create()
2731 return 0; in snd_es1968_create()
2755 if (err < 0) in __snd_es1968_probe()
2770 if (err < 0) in __snd_es1968_probe()
2788 err = snd_es1968_pcm(chip, 0); in __snd_es1968_probe()
2789 if (err < 0) in __snd_es1968_probe()
2793 if (err < 0) in __snd_es1968_probe()
2800 for (i = 0; i < ARRAY_SIZE(mpu_denylist); i++) { in __snd_es1968_probe()
2803 enable_mpu[dev] = 0; in __snd_es1968_probe()
2809 err = snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401, in __snd_es1968_probe()
2814 if (err < 0) in __snd_es1968_probe()
2833 sprintf(card->longname, "%s at 0x%lx, irq %i", in __snd_es1968_probe()
2837 if (err < 0) in __snd_es1968_probe()
2841 return 0; in __snd_es1968_probe()