58 #define DST	regs[insn->dst_reg]  macro
1719 		DST = DST OP (SRC & 63);		\  in ___bpf_prog_run()
1722 		DST = (u32) DST OP ((u32) SRC & 31);	\  in ___bpf_prog_run()
1725 		DST = DST OP IMM;			\  in ___bpf_prog_run()
1728 		DST = (u32) DST OP (u32) IMM;		\  in ___bpf_prog_run()
1733 		DST = DST OP SRC;			\  in ___bpf_prog_run()
1736 		DST = (u32) DST OP (u32) SRC;		\  in ___bpf_prog_run()
1739 		DST = DST OP IMM;			\  in ___bpf_prog_run()
1742 		DST = (u32) DST OP (u32) IMM;		\  in ___bpf_prog_run()
1755 		DST = (u32) -DST;  in ___bpf_prog_run()
1758 		DST = -DST;  in ___bpf_prog_run()
1763 			DST = (u32) SRC;  in ___bpf_prog_run()
1766 			DST = (u32)(s8) SRC;  in ___bpf_prog_run()
1769 			DST = (u32)(s16) SRC;  in ___bpf_prog_run()
1774 		DST = (u32) IMM;  in ___bpf_prog_run()
1779 			DST = SRC;  in ___bpf_prog_run()
1782 			DST = (s8) SRC;  in ___bpf_prog_run()
1785 			DST = (s16) SRC;  in ___bpf_prog_run()
1788 			DST = (s32) SRC;  in ___bpf_prog_run()
1793 		DST = IMM;  in ___bpf_prog_run()
1796 		DST = (u64) (u32) insn[0].imm | ((u64) (u32) insn[1].imm) << 32;  in ___bpf_prog_run()
1800 		DST = (u64) (u32) (((s32) DST) >> (SRC & 31));  in ___bpf_prog_run()
1803 		DST = (u64) (u32) (((s32) DST) >> IMM);  in ___bpf_prog_run()
1806 		(*(s64 *) &DST) >>= (SRC & 63);  in ___bpf_prog_run()
1809 		(*(s64 *) &DST) >>= IMM;  in ___bpf_prog_run()
1814 			div64_u64_rem(DST, SRC, &AX);  in ___bpf_prog_run()
1815 			DST = AX;  in ___bpf_prog_run()
1818 			AX = div64_s64(DST, SRC);  in ___bpf_prog_run()
1819 			DST = DST - AX * SRC;  in ___bpf_prog_run()
1826 			AX = (u32) DST;  in ___bpf_prog_run()
1827 			DST = do_div(AX, (u32) SRC);  in ___bpf_prog_run()
1830 			AX = abs((s32)DST);  in ___bpf_prog_run()
1832 			if ((s32)DST < 0)  in ___bpf_prog_run()
1833 				DST = (u32)-AX;  in ___bpf_prog_run()
1835 				DST = (u32)AX;  in ___bpf_prog_run()
1842 			div64_u64_rem(DST, IMM, &AX);  in ___bpf_prog_run()
1843 			DST = AX;  in ___bpf_prog_run()
1846 			AX = div64_s64(DST, IMM);  in ___bpf_prog_run()
1847 			DST = DST - AX * IMM;  in ___bpf_prog_run()
1854 			AX = (u32) DST;  in ___bpf_prog_run()
1855 			DST = do_div(AX, (u32) IMM);  in ___bpf_prog_run()
1858 			AX = abs((s32)DST);  in ___bpf_prog_run()
1860 			if ((s32)DST < 0)  in ___bpf_prog_run()
1861 				DST = (u32)-AX;  in ___bpf_prog_run()
1863 				DST = (u32)AX;  in ___bpf_prog_run()
1870 			DST = div64_u64(DST, SRC);  in ___bpf_prog_run()
1873 			DST = div64_s64(DST, SRC);  in ___bpf_prog_run()
1880 			AX = (u32) DST;  in ___bpf_prog_run()
1882 			DST = (u32) AX;  in ___bpf_prog_run()
1885 			AX = abs((s32)DST);  in ___bpf_prog_run()
1887 			if (((s32)DST < 0) == ((s32)SRC < 0))  in ___bpf_prog_run()
1888 				DST = (u32)AX;  in ___bpf_prog_run()
1890 				DST = (u32)-AX;  in ___bpf_prog_run()
1897 			DST = div64_u64(DST, IMM);  in ___bpf_prog_run()
1900 			DST = div64_s64(DST, IMM);  in ___bpf_prog_run()
1907 			AX = (u32) DST;  in ___bpf_prog_run()
1909 			DST = (u32) AX;  in ___bpf_prog_run()
1912 			AX = abs((s32)DST);  in ___bpf_prog_run()
1914 			if (((s32)DST < 0) == ((s32)IMM < 0))  in ___bpf_prog_run()
1915 				DST = (u32)AX;  in ___bpf_prog_run()
1917 				DST = (u32)-AX;  in ___bpf_prog_run()
1924 			DST = (__force u16) cpu_to_be16(DST);  in ___bpf_prog_run()
1927 			DST = (__force u32) cpu_to_be32(DST);  in ___bpf_prog_run()
1930 			DST = (__force u64) cpu_to_be64(DST);  in ___bpf_prog_run()
1937 			DST = (__force u16) cpu_to_le16(DST);  in ___bpf_prog_run()
1940 			DST = (__force u32) cpu_to_le32(DST);  in ___bpf_prog_run()
1943 			DST = (__force u64) cpu_to_le64(DST);  in ___bpf_prog_run()
1950 			DST = (__force u16) __swab16(DST);  in ___bpf_prog_run()
1953 			DST = (__force u32) __swab32(DST);  in ___bpf_prog_run()
1956 			DST = (__force u64) __swab64(DST);  in ___bpf_prog_run()
2017 		if ((SIGN##64) DST CMP_OP (SIGN##64) SRC) {	\  in ___bpf_prog_run()
2023 		if ((SIGN##32) DST CMP_OP (SIGN##32) SRC) {	\  in ___bpf_prog_run()
2029 		if ((SIGN##64) DST CMP_OP (SIGN##64) IMM) {	\  in ___bpf_prog_run()
2035 		if ((SIGN##32) DST CMP_OP (SIGN##32) IMM) {	\  in ___bpf_prog_run()
2067 		*(SIZE *)(unsigned long) (DST + insn->off) = SRC;	\  in ___bpf_prog_run()
2070 		*(SIZE *)(unsigned long) (DST + insn->off) = IMM;	\  in ___bpf_prog_run()
2073 		DST = *(SIZE *)(unsigned long) (SRC + insn->off);	\  in ___bpf_prog_run()
2076 		bpf_probe_read_kernel_common(&DST, sizeof(SIZE),	\  in ___bpf_prog_run()
2078 		DST = *((SIZE *)&DST);					\  in ___bpf_prog_run()
2089 		DST = *(SIZE *)(unsigned long) (SRC + insn->off);	\  in ___bpf_prog_run()
2092 		bpf_probe_read_kernel_common(&DST, sizeof(SIZE),		\  in ___bpf_prog_run()
2094 		DST = *((SIZE *)&DST);					\  in ___bpf_prog_run()
2106 					     (DST + insn->off));	\  in ___bpf_prog_run()
2109 					       (DST + insn->off));	\  in ___bpf_prog_run()
2115 					(atomic_t *)(unsigned long) (DST + insn->off)); \  in ___bpf_prog_run()
2119 					(atomic64_t *)(unsigned long) (DST + insn->off)); \  in ___bpf_prog_run()
2134 					(atomic_t *)(unsigned long) (DST + insn->off),  in ___bpf_prog_run()
2138 					(atomic64_t *)(unsigned long) (DST + insn->off),  in ___bpf_prog_run()
2144 					(atomic_t *)(unsigned long) (DST + insn->off),  in ___bpf_prog_run()
2148 					(atomic64_t *)(unsigned long) (DST + insn->off),  in ___bpf_prog_run()