include/video/sstfb.h

1 /* SPDX-License-Identifier: GPL-2.0 */
3  * linux/drivers/video/sstfb.h -- voodoo graphics frame buffer
105 #  define LFB_WORD_SWIZZLE_WR	  BIT(11)	/* enable write-wordswap (big-endian) */
106 #  define LFB_BYTE_SWIZZLE_WR	  BIT(12)	/* enable write-byteswap (big-endian) */
108 #  define LFB_WORD_SWIZZLE_RD	  BIT(15)	/* enable read-wordswap (big-endian) */
109 #  define LFB_BYTE_SWIZZLE_RD	  BIT(16)	/* enable read-byteswap (big-endian) */
157 #define DAC_READ		FBIINIT2	/* in remap mode */
164 #  define DAC_READ_CMD		  BIT(11)	/* set read dacreg mode */
166 #  define FBIINIT5_MASK		  0xfa40ffff    /* mask video bits*/
191 #define BLTCOMMAND		0x02f8	/* BitBLT command mode (v2 specific) */
192 # define BLT_SCR2SCR_BITBLT	  0	  /* Screen-to-Screen BitBLT */
193 # define BLT_CPU2SCR_BITBLT	  1	  /* CPU-to-screen BitBLT */
195 # define BLT_16BPP_FMT		  2	  /* 16 BPP (5-6-5 RGB) */
196 #define BLTDATA			0x02fc	/* BitBLT data for CPU-to-Screen BitBLTs */
199 /* Dac Registers */
200 #define DACREG_WMA		0x0	/* pixel write mode address */
202 #define DACREG_RMR		0x02	/* pixel mask */
203 #define DACREG_RMA		0x03	/* pixel read mode address */
204 /*Dac registers in indexed mode (TI, ATT dacs) */
209 #  define DACREG_CR0_EN_INDEXED	  BIT(0)	/* enable indexec mode */
210 #  define DACREG_CR0_8BIT	  BIT(1)	/* set dac to 8 bits/read */
211 #  define DACREG_CR0_PWDOWN	  BIT(3)	/* powerdown dac */
212 #  define DACREG_CR0_16BPP	  0x30		/* mode 3 */
213 #  define DACREG_CR0_24BPP	  0x50		/* mode 5 */
230 /* ics dac specific registers */
231 #define DACREG_ICS_PLLWMA	0x04	/* PLL write mode address */
234 #  define DACREG_ICS_CMD_16BPP	  0x50	/* ics color mode 6 (16bpp bypass)*/
235 #  define DACREG_ICS_CMD_24BPP	  0x70	/* ics color mode 7 (24bpp bypass)*/
236 #  define DACREG_ICS_CMD_PWDOWN BIT(0)	/* powerdown dac */
237 #define DACREG_ICS_PLLRMA	0x07	/* PLL read mode address */
242  * 8 freq registers (0-7) for video clock (CLK0)
243  * 2 freq registers (a-b) for graphic clock (CLK1)
286 /* Careful with this one : writing back the data just read will trash the DAC
311 #define DAC_FREF	14318	/* DAC reference freq (Khz) */
349 	struct dac_switch 	dac_sw;	/* dac specific functions */