Lines Matching defs:hl_info_hw_ip_info
906 struct hl_info_hw_ip_info { struct
907 __u64 sram_base_address;
908 __u64 dram_base_address;
909 __u64 dram_size;
910 __u32 sram_size;
911 __u32 num_of_events;
912 __u32 device_id;
913 __u32 module_id;
914 __u32 decoder_enabled_mask;
915 __u16 first_available_interrupt_id;
916 __u16 server_type;
917 __u32 cpld_version;
918 __u32 psoc_pci_pll_nr;
919 __u32 psoc_pci_pll_nf;
920 __u32 psoc_pci_pll_od;
921 __u32 psoc_pci_pll_div_factor;
922 __u8 tpc_enabled_mask;
923 __u8 dram_enabled;
924 __u8 security_enabled;
925 __u8 mme_master_slave_mode;
926 __u8 cpucp_version[HL_INFO_VERSION_MAX_LEN];
927 __u8 card_name[HL_INFO_CARD_NAME_MAX_LEN];
928 __u64 tpc_enabled_mask_ext;
929 __u64 dram_page_size;
930 __u32 edma_enabled_mask;
931 __u16 number_of_user_interrupts;
932 __u8 reserved1;
933 __u8 reserved2;
934 __u64 reserved3;
935 __u64 device_mem_alloc_default_page_size;
936 __u64 reserved4;
937 __u64 reserved5;
938 __u32 reserved6;
939 __u8 reserved7;
940 __u8 revision_id;
941 __u16 tpc_interrupt_id;
942 __u32 rotator_enabled_mask;
943 __u32 reserved9;
944 __u64 engine_core_interrupt_reg_addr;
945 __u64 reserved_dram_size;