Lines Matching defs:name

281 	const char		*name;  member
300 const char *name; member
380 #define clk_hw_register_fixed_rate(dev, name, parent_name, flags, fixed_rate) \ argument
393 #define devm_clk_hw_register_fixed_rate(dev, name, parent_name, flags, fixed_rate) \ argument
405 #define clk_hw_register_fixed_rate_parent_hw(dev, name, parent_hw, flags, \ argument
418 #define clk_hw_register_fixed_rate_parent_data(dev, name, parent_data, flags, \ argument
433 #define clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name, \ argument
449 #define clk_hw_register_fixed_rate_with_accuracy_parent_hw(dev, name, \ argument
464 #define clk_hw_register_fixed_rate_with_accuracy_parent_data(dev, name, \ argument
478 #define clk_hw_register_fixed_rate_parent_accuracy(dev, name, parent_data, \ argument
556 #define clk_hw_register_gate(dev, name, parent_name, flags, reg, bit_idx, \ argument
573 #define clk_hw_register_gate_parent_hw(dev, name, parent_hw, flags, reg, \ argument
590 #define clk_hw_register_gate_parent_data(dev, name, parent_data, flags, reg, \ argument
606 #define devm_clk_hw_register_gate(dev, name, parent_name, flags, reg, bit_idx,\ argument
623 #define devm_clk_hw_register_gate_parent_data(dev, name, parent_data, flags, \ argument
754 #define clk_register_divider(dev, name, parent_name, flags, reg, shift, width, \ argument
771 #define clk_hw_register_divider(dev, name, parent_name, flags, reg, shift, \ argument
789 #define clk_hw_register_divider_parent_hw(dev, name, parent_hw, flags, reg, \ argument
808 #define clk_hw_register_divider_parent_data(dev, name, parent_data, flags, \ argument
828 #define clk_hw_register_divider_table(dev, name, parent_name, flags, reg, \ argument
848 #define clk_hw_register_divider_table_parent_hw(dev, name, parent_hw, flags, \ argument
869 #define clk_hw_register_divider_table_parent_data(dev, name, parent_data, \ argument
889 #define devm_clk_hw_register_divider(dev, name, parent_name, flags, reg, shift, \ argument
906 #define devm_clk_hw_register_divider_parent_hw(dev, name, parent_hw, flags, \ argument
927 #define devm_clk_hw_register_divider_table(dev, name, parent_name, flags, \ argument
1008 #define clk_register_mux(dev, name, parent_names, num_parents, flags, reg, \ argument
1013 #define clk_hw_register_mux_table(dev, name, parent_names, num_parents, \ argument
1020 #define clk_hw_register_mux_table_parent_data(dev, name, parent_data, \ argument
1027 #define clk_hw_register_mux(dev, name, parent_names, num_parents, flags, reg, \ argument
1033 #define clk_hw_register_mux_hws(dev, name, parent_hws, num_parents, flags, \ argument
1038 #define clk_hw_register_mux_parent_data(dev, name, parent_data, num_parents, \ argument
1044 #define clk_hw_register_mux_parent_data_table(dev, name, parent_data, \ argument
1051 #define devm_clk_hw_register_mux(dev, name, parent_names, num_parents, flags, reg, \ argument
1057 #define devm_clk_hw_register_mux_parent_hws(dev, name, parent_hws, \ argument
1064 #define devm_clk_hw_register_mux_parent_data_table(dev, name, parent_data, \ argument
1386 #define CLK_OF_DECLARE(name, compat, fn) \ argument
1398 #define CLK_OF_DECLARE_DRIVER(name, compat, fn) \ argument