Lines Matching +full:10 +full:g
13 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
16 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
21 * disp 0 ~ 4G larb0/1/2/3
22 * vcodec 4G ~ 8G larb19/20/21/22/23/24
23 * cam/mdp 8G ~ 12G the other larbs.
24 * N/A 12G ~ 16G
29 * iommu-vdo: larb0/2/5/7/9/10/11/13/17/19/21/24/25/28
110 #define M4U_PORT_L9_IMG_IMGBI_T1_B MTK_M4U_ID(9, 10)
122 #define M4U_PORT_L10_IMG_IMGI_D1_A MTK_M4U_ID(10, 0)
123 #define M4U_PORT_L10_IMG_IMGCI_D1_A MTK_M4U_ID(10, 1)
124 #define M4U_PORT_L10_IMG_DEPI_D1_A MTK_M4U_ID(10, 2)
125 #define M4U_PORT_L10_IMG_DMGI_D1_A MTK_M4U_ID(10, 3)
126 #define M4U_PORT_L10_IMG_VIPI_D1_A MTK_M4U_ID(10, 4)
127 #define M4U_PORT_L10_IMG_TNRWI_D1_A MTK_M4U_ID(10, 5)
128 #define M4U_PORT_L10_IMG_RECI_D1_A MTK_M4U_ID(10, 6)
129 #define M4U_PORT_L10_IMG_SMTI_D1_A MTK_M4U_ID(10, 7)
130 #define M4U_PORT_L10_IMG_SMTI_D6_A MTK_M4U_ID(10, 8)
131 #define M4U_PORT_L10_IMG_PIMGI_P1_A MTK_M4U_ID(10, 9)
132 #define M4U_PORT_L10_IMG_PIMGBI_P1_A MTK_M4U_ID(10, 10)
133 #define M4U_PORT_L10_IMG_PIMGCI_P1_A MTK_M4U_ID(10, 11)
134 #define M4U_PORT_L10_IMG_PIMGI_P1_B MTK_M4U_ID(10, 12)
135 #define M4U_PORT_L10_IMG_PIMGBI_P1_B MTK_M4U_ID(10, 13)
136 #define M4U_PORT_L10_IMG_PIMGCI_P1_B MTK_M4U_ID(10, 14)
137 #define M4U_PORT_L10_IMG_IMG3O_D1_A MTK_M4U_ID(10, 15)
138 #define M4U_PORT_L10_IMG_IMG4O_D1_A MTK_M4U_ID(10, 16)
139 #define M4U_PORT_L10_IMG_IMG3CO_D1_A MTK_M4U_ID(10, 17)
140 #define M4U_PORT_L10_IMG_FEO_D1_A MTK_M4U_ID(10, 18)
141 #define M4U_PORT_L10_IMG_IMG2O_D1_A MTK_M4U_ID(10, 19)
142 #define M4U_PORT_L10_IMG_TNRWO_D1_A MTK_M4U_ID(10, 20)
143 #define M4U_PORT_L10_IMG_SMTO_D1_A MTK_M4U_ID(10, 21)
144 #define M4U_PORT_L10_IMG_WROT_P1_A MTK_M4U_ID(10, 22)
145 #define M4U_PORT_L10_IMG_WROT_P1_B MTK_M4U_ID(10, 23)
194 #define M4U_PORT_L14_CAM_IPU3O MTK_M4U_ID(14, 10)
213 #define M4U_PORT_L16_CAM_RAWI_R5 MTK_M4U_ID(16, 10)
246 #define M4U_PORT_L19_VENC_SUB_W_LUMA MTK_M4U_ID(19, 10)
275 #define M4U_PORT_L20_VENC_SUB_W_LUMA MTK_M4U_ID(20, 10)
332 #define M4U_PORT_L24_VDEC_LAT1_TILE_EXT MTK_M4U_ID(24, 10)
346 #define M4U_PORT_L25_CAM_MRAW0_AFO_M1 MTK_M4U_ID(25, 10)
360 #define M4U_PORT_L26_CAM_MRAW1_AFO_M1 MTK_M4U_ID(26, 10)
374 #define M4U_PORT_L27_CAM_RAWI_R5 MTK_M4U_ID(27, 10)