Lines Matching +full:smmu +full:- +full:secure +full:- +full:config +full:- +full:access
1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
6 * Copyright (C) 2000 - 2023, Intel Corp.
51 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */
54 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
59 * All tables must be byte-packed to match the ACPI specification, since
69 * essentially useless for dealing with packed data in on-disk formats or
78 * AEST - Arm Error Source Table
89 /* Common Subtable header - one per Node Structure (Subtable) */
173 /* 2: Smmu Error */
246 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface
266 * APMT - ARM Performance Monitoring Unit Table
314 /* Values for Flags 64-bit atomic field above */
345 * BDAT - BIOS Data ACPI Table
359 * CCEL - CC-Event Log
360 * From: "Guest-Host-Communication Interface (GHCI) for Intel
376 * IORT - IO Remapping Table
461 u64 memory_properties; /* Memory access properties */
472 u64 memory_properties; /* Memory access properties */
487 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */
490 u64 base_address; /* SMMU base address */
506 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
507 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
508 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
570 * Macro to access the Access Attributes in flags field above:
571 * Access Attributes is encoded in bits 9:2
575 /* Values for above Access Attributes */
592 * IVRS - I/O Virtualization Reporting Structure
699 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
707 /* 8-byte device entries */
717 /* Variable-length device entries */
731 /* Types 0-4: 4-byte device entry */
737 /* Types 66-67: 8-byte device entry */
746 /* Types 70-71: 8-byte device entry */
757 /* Type 72: 8-byte device entry */
771 /* Type 240: variable-length device entry */
799 * LPIT - Low Power Idle Table
835 /* 0x00: Native C-state instruction based LPI structure */
848 * MADT - Multiple APIC Description Table
921 u8 reserved; /* reserved - must be zero */
930 u8 bus; /* 0 - ISA */
980 u32 uid; /* Numeric UID - ACPI 3.0 */
981 char uid_string[]; /* String UID - ACPI 3.0 */
1005 u16 reserved; /* reserved - must be zero */
1018 u8 reserved[3]; /* reserved - must be zero */
1021 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */
1025 u16 reserved; /* reserved - must be zero */
1054 u16 reserved; /* reserved - must be zero */
1059 u8 reserved2[3]; /* reserved - must be zero */
1077 u16 reserved; /* reserved - must be zero */
1093 u16 reserved; /* reserved - must be zero */
1102 u16 reserved; /* reserved - must be zero */
1113 u32 reserved; /* reserved - must be zero */
1122 u16 reserved; /* reserved - must be zero */
1259 /* 24: RISC-V INTC */
1272 /* Values for RISC-V INTC Version field above */
1280 /* 25: RISC-V IMSIC */
1294 /* 26: RISC-V APLIC */
1308 /* 27: RISC-V PLIC */
1339 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
1340 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
1356 * MCFG - PCI Memory Mapped Configuration table and subtable
1371 u64 address; /* Base address, processor-relative */
1380 * MCHI - Management Controller Host Interface Table
1406 * MPAM - Memory System Resource Partitioning and Monitoring
1442 /* MPAM SMMU locator descriptor. Table 15 */
1448 /* MPAM Memory-side cache locator descriptor. Table 16 */
1521 * MPST - Memory Power State Table (ACPI 5.0)
1616 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
1629 /* subtable - Maximum Proximity Domain Information. Version 1 */
1642 * MSDM - Microsoft Data Management table
1657 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
1836 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1884 * NHLT - Non HD Audio Link Table
1965 /* Values for Config Type above */
2073 u16 direction_angle; /* -180 - + 180 */
2074 u16 elevation_angle; /* -180 - + 180 */
2075 u16 work_vertical_angle_begin; /* -180 - + 180 with 2 deg step */
2076 u16 work_vertical_angle_end; /* -180 - + 180 with 2 deg step */
2077 u16 work_horizontal_angle_begin; /* -180 - + 180 with 2 deg step */
2078 u16 work_horizontal_angle_end; /* -180 - + 180 with 2 deg step */
2138 * PCCT - Platform Communications Channel Table (ACPI 5.0)
2184 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */
2201 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
2323 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
2353 * PHAT - Platform Health Assessment Table (ACPI 6.4)
2374 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */
2401 u32 device_specific_offset; /* Zero if no Device-specific data */
2413 * PMTT - Platform Memory Topology Table (ACPI 5.0)
2448 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */
2507 * PPTT - Processor Properties Topology Table (ACPI 6.2)
2610 * PRMT - Platform Runtime Mechanism Table
2652 * RASF - RAS Feature Table (ACPI 5.0)
2748 * RGRT - Regulatory Graphics Resource Table
2774 * RHCT - RISC-V Hart Capabilities Table
2845 * SBST - Smart Battery Specification Table
2859 * SDEI - Software Delegated Exception Interface Descriptor Table
2872 * SDEV - Secure Devices Table (ACPI 6.2)
2904 /* 0: Namespace Device Based Secure Device Structure */
2920 * SDEV sub-subtables ("Components") for above
2926 /* Values for sub-subtable type above */
2975 * SVKL - Storage Volume Key Location Table (ACPI 6.4)
2976 * From: "Guest-Host-Communication Interface (GHCI) for Intel
3006 * TDEL - TD-Event Log
3007 * From: "Guest-Host-Communication Interface (GHCI) for Intel