Lines Matching refs:NV_RD32
65 return ((NV_RD32(&chip->Rop->FifoFree, 0) < chip->FifoEmptyCount) || in nv3Busy()
66 NV_RD32(&chip->PGRAPH[0x000006B0/4], 0) & 0x01); in nv3Busy()
73 return ((NV_RD32(&chip->Rop->FifoFree, 0) < chip->FifoEmptyCount) || in nv4Busy()
74 NV_RD32(&chip->PGRAPH[0x00000700/4], 0) & 0x01); in nv4Busy()
81 return ((NV_RD32(&chip->Rop->FifoFree, 0) < chip->FifoEmptyCount) || in nv10Busy()
82 NV_RD32(&chip->PGRAPH[0x00000700/4], 0) & 0x01); in nv10Busy()
620 pll = NV_RD32(&chip->PRAMDAC0[0x00000504/4], 0); in nv3UpdateArbitrationSettings()
627 sim_data.memory_width = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ? in nv3UpdateArbitrationSettings()
804 pll = NV_RD32(&chip->PRAMDAC0[0x00000504/4], 0); in nv4UpdateArbitrationSettings()
807 pll = NV_RD32(&chip->PRAMDAC0[0x00000500/4], 0); in nv4UpdateArbitrationSettings()
810 cfg1 = NV_RD32(&chip->PFB[0x00000204/4], 0); in nv4UpdateArbitrationSettings()
814 sim_data.memory_width = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ? in nv4UpdateArbitrationSettings()
1053 pll = NV_RD32(&chip->PRAMDAC0[0x00000504/4], 0); in nv10UpdateArbitrationSettings()
1056 pll = NV_RD32(&chip->PRAMDAC0[0x00000500/4], 0); in nv10UpdateArbitrationSettings()
1059 cfg1 = NV_RD32(&chip->PFB[0x00000204/4], 0); in nv10UpdateArbitrationSettings()
1063 sim_data.memory_type = (NV_RD32(&chip->PFB[0x00000200/4], 0) & 0x01) ? in nv10UpdateArbitrationSettings()
1065 sim_data.memory_width = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ? in nv10UpdateArbitrationSettings()
1110 pll = NV_RD32(&chip->PRAMDAC0[0x00000500/4], 0); in nForceUpdateArbitrationSettings()
1297 state->config = NV_RD32(&chip->PFB[0x00000200/4], 0); in CalcStateExt()
1524 NV_WR32(chip->PGRAPH, 0x000009A4, NV_RD32(chip->PFB, 0x00000200)); in LoadStateExt()
1525 NV_WR32(chip->PGRAPH, 0x000009A8, NV_RD32(chip->PFB, 0x00000204)); in LoadStateExt()
1531 NV_WR32(chip->PRAMDAC, 0x00000404, NV_RD32(chip->PRAMDAC, 0x00000404) | (1 << 25)); in LoadStateExt()
1550 NV_WR32(chip->PGRAPH, 0x00000B00, NV_RD32(chip->PFB, 0x00000240)); in LoadStateExt()
1551 NV_WR32(chip->PGRAPH, 0x00000B04, NV_RD32(chip->PFB, 0x00000244)); in LoadStateExt()
1552 NV_WR32(chip->PGRAPH, 0x00000B08, NV_RD32(chip->PFB, 0x00000248)); in LoadStateExt()
1553 NV_WR32(chip->PGRAPH, 0x00000B0C, NV_RD32(chip->PFB, 0x0000024C)); in LoadStateExt()
1554 NV_WR32(chip->PGRAPH, 0x00000B10, NV_RD32(chip->PFB, 0x00000250)); in LoadStateExt()
1555 NV_WR32(chip->PGRAPH, 0x00000B14, NV_RD32(chip->PFB, 0x00000254)); in LoadStateExt()
1556 NV_WR32(chip->PGRAPH, 0x00000B18, NV_RD32(chip->PFB, 0x00000258)); in LoadStateExt()
1557 NV_WR32(chip->PGRAPH, 0x00000B1C, NV_RD32(chip->PFB, 0x0000025C)); in LoadStateExt()
1558 NV_WR32(chip->PGRAPH, 0x00000B20, NV_RD32(chip->PFB, 0x00000260)); in LoadStateExt()
1559 NV_WR32(chip->PGRAPH, 0x00000B24, NV_RD32(chip->PFB, 0x00000264)); in LoadStateExt()
1560 NV_WR32(chip->PGRAPH, 0x00000B28, NV_RD32(chip->PFB, 0x00000268)); in LoadStateExt()
1561 NV_WR32(chip->PGRAPH, 0x00000B2C, NV_RD32(chip->PFB, 0x0000026C)); in LoadStateExt()
1562 NV_WR32(chip->PGRAPH, 0x00000B30, NV_RD32(chip->PFB, 0x00000270)); in LoadStateExt()
1563 NV_WR32(chip->PGRAPH, 0x00000B34, NV_RD32(chip->PFB, 0x00000274)); in LoadStateExt()
1564 NV_WR32(chip->PGRAPH, 0x00000B38, NV_RD32(chip->PFB, 0x00000278)); in LoadStateExt()
1565 NV_WR32(chip->PGRAPH, 0x00000B3C, NV_RD32(chip->PFB, 0x0000027C)); in LoadStateExt()
1566 NV_WR32(chip->PGRAPH, 0x00000B40, NV_RD32(chip->PFB, 0x00000280)); in LoadStateExt()
1567 NV_WR32(chip->PGRAPH, 0x00000B44, NV_RD32(chip->PFB, 0x00000284)); in LoadStateExt()
1568 NV_WR32(chip->PGRAPH, 0x00000B48, NV_RD32(chip->PFB, 0x00000288)); in LoadStateExt()
1569 NV_WR32(chip->PGRAPH, 0x00000B4C, NV_RD32(chip->PFB, 0x0000028C)); in LoadStateExt()
1570 NV_WR32(chip->PGRAPH, 0x00000B50, NV_RD32(chip->PFB, 0x00000290)); in LoadStateExt()
1571 NV_WR32(chip->PGRAPH, 0x00000B54, NV_RD32(chip->PFB, 0x00000294)); in LoadStateExt()
1572 NV_WR32(chip->PGRAPH, 0x00000B58, NV_RD32(chip->PFB, 0x00000298)); in LoadStateExt()
1573 NV_WR32(chip->PGRAPH, 0x00000B5C, NV_RD32(chip->PFB, 0x0000029C)); in LoadStateExt()
1574 NV_WR32(chip->PGRAPH, 0x00000B60, NV_RD32(chip->PFB, 0x000002A0)); in LoadStateExt()
1575 NV_WR32(chip->PGRAPH, 0x00000B64, NV_RD32(chip->PFB, 0x000002A4)); in LoadStateExt()
1576 NV_WR32(chip->PGRAPH, 0x00000B68, NV_RD32(chip->PFB, 0x000002A8)); in LoadStateExt()
1577 NV_WR32(chip->PGRAPH, 0x00000B6C, NV_RD32(chip->PFB, 0x000002AC)); in LoadStateExt()
1578 NV_WR32(chip->PGRAPH, 0x00000B70, NV_RD32(chip->PFB, 0x000002B0)); in LoadStateExt()
1579 NV_WR32(chip->PGRAPH, 0x00000B74, NV_RD32(chip->PFB, 0x000002B4)); in LoadStateExt()
1580 NV_WR32(chip->PGRAPH, 0x00000B78, NV_RD32(chip->PFB, 0x000002B8)); in LoadStateExt()
1581 NV_WR32(chip->PGRAPH, 0x00000B7C, NV_RD32(chip->PFB, 0x000002BC)); in LoadStateExt()
1701 chip->FifoEmptyCount = NV_RD32(&chip->Rop->FifoFree, 0); in LoadStateExt()
1734 state->vpll = NV_RD32(chip->PRAMDAC0, 0x00000508); in UnloadStateExt()
1735 state->vpll2 = NV_RD32(chip->PRAMDAC0, 0x00000520); in UnloadStateExt()
1736 state->pllsel = NV_RD32(chip->PRAMDAC0, 0x0000050C); in UnloadStateExt()
1737 state->general = NV_RD32(chip->PRAMDAC, 0x00000600); in UnloadStateExt()
1738 state->scale = NV_RD32(chip->PRAMDAC, 0x00000848); in UnloadStateExt()
1739 state->config = NV_RD32(chip->PFB, 0x00000200); in UnloadStateExt()
1743 state->offset0 = NV_RD32(chip->PGRAPH, 0x00000630); in UnloadStateExt()
1744 state->offset1 = NV_RD32(chip->PGRAPH, 0x00000634); in UnloadStateExt()
1745 state->offset2 = NV_RD32(chip->PGRAPH, 0x00000638); in UnloadStateExt()
1746 state->offset3 = NV_RD32(chip->PGRAPH, 0x0000063C); in UnloadStateExt()
1747 state->pitch0 = NV_RD32(chip->PGRAPH, 0x00000650); in UnloadStateExt()
1748 state->pitch1 = NV_RD32(chip->PGRAPH, 0x00000654); in UnloadStateExt()
1749 state->pitch2 = NV_RD32(chip->PGRAPH, 0x00000658); in UnloadStateExt()
1750 state->pitch3 = NV_RD32(chip->PGRAPH, 0x0000065C); in UnloadStateExt()
1753 state->offset0 = NV_RD32(chip->PGRAPH, 0x00000640); in UnloadStateExt()
1754 state->offset1 = NV_RD32(chip->PGRAPH, 0x00000644); in UnloadStateExt()
1755 state->offset2 = NV_RD32(chip->PGRAPH, 0x00000648); in UnloadStateExt()
1756 state->offset3 = NV_RD32(chip->PGRAPH, 0x0000064C); in UnloadStateExt()
1757 state->pitch0 = NV_RD32(chip->PGRAPH, 0x00000670); in UnloadStateExt()
1758 state->pitch1 = NV_RD32(chip->PGRAPH, 0x00000674); in UnloadStateExt()
1759 state->pitch2 = NV_RD32(chip->PGRAPH, 0x00000678); in UnloadStateExt()
1760 state->pitch3 = NV_RD32(chip->PGRAPH, 0x0000067C); in UnloadStateExt()
1765 state->offset0 = NV_RD32(chip->PGRAPH, 0x00000640); in UnloadStateExt()
1766 state->offset1 = NV_RD32(chip->PGRAPH, 0x00000644); in UnloadStateExt()
1767 state->offset2 = NV_RD32(chip->PGRAPH, 0x00000648); in UnloadStateExt()
1768 state->offset3 = NV_RD32(chip->PGRAPH, 0x0000064C); in UnloadStateExt()
1769 state->pitch0 = NV_RD32(chip->PGRAPH, 0x00000670); in UnloadStateExt()
1770 state->pitch1 = NV_RD32(chip->PGRAPH, 0x00000674); in UnloadStateExt()
1771 state->pitch2 = NV_RD32(chip->PGRAPH, 0x00000678); in UnloadStateExt()
1772 state->pitch3 = NV_RD32(chip->PGRAPH, 0x0000067C); in UnloadStateExt()
1774 state->head = NV_RD32(chip->PCRTC0, 0x00000860); in UnloadStateExt()
1775 state->head2 = NV_RD32(chip->PCRTC0, 0x00002860); in UnloadStateExt()
1781 state->cursorConfig = NV_RD32(chip->PCRTC, 0x00000810); in UnloadStateExt()
1784 state->dither = NV_RD32(chip->PRAMDAC, 0x0528); in UnloadStateExt()
1787 state->dither = NV_RD32(chip->PRAMDAC, 0x083C); in UnloadStateExt()
1946 if (NV_RD32(&chip->PFB[0x00000000/4], 0) & 0x00000020) in nv3GetConfig()
1948 if (((NV_RD32(chip->PMC, 0x00000000) & 0xF0) == 0x20) in nv3GetConfig()
1949 && ((NV_RD32(chip->PMC, 0x00000000) & 0x0F) >= 0x02)) in nv3GetConfig()
1955 switch (NV_RD32(chip->PFB, 0x00000000) & 0x03) in nv3GetConfig()
1980 switch (NV_RD32(chip->PFB, 0x00000000) & 0x00000003) in nv3GetConfig()
1993 chip->CrystalFreqKHz = (NV_RD32(chip->PEXTDEV, 0x00000000) & 0x00000040) ? 14318 : 13500; in nv3GetConfig()
2017 if (NV_RD32(chip->PFB, 0x00000000) & 0x00000100) in nv4GetConfig()
2019 chip->RamAmountKBytes = ((NV_RD32(chip->PFB, 0x00000000) >> 12) & 0x0F) * 1024 * 2 in nv4GetConfig()
2024 switch (NV_RD32(chip->PFB, 0x00000000) & 0x00000003) in nv4GetConfig()
2041 switch ((NV_RD32(chip->PFB, 0x00000000) >> 3) & 0x00000003) in nv4GetConfig()
2050 chip->CrystalFreqKHz = (NV_RD32(chip->PEXTDEV, 0x00000000) & 0x00000040) ? 14318 : 13500; in nv4GetConfig()
2079 if(!(NV_RD32(chip->PMC, 0x00000004) & 0x01000001)) in nv10GetConfig()
2097 switch ((NV_RD32(chip->PFB, 0x0000020C) >> 20) & 0x000000FF) in nv10GetConfig()
2125 switch ((NV_RD32(chip->PFB, 0x00000000) >> 3) & 0x00000003) in nv10GetConfig()
2134 chip->CrystalFreqKHz = (NV_RD32(chip->PEXTDEV, 0x0000) & (1 << 6)) ? in nv10GetConfig()
2148 if(NV_RD32(chip->PEXTDEV, 0x0000) & (1 << 22)) in nv10GetConfig()