386 	nv4_sim_state sim_data;  in nv4UpdateArbitrationSettings()  local
392 	sim_data.pix_bpp = (char)pixelDepth;  in nv4UpdateArbitrationSettings()
393 	sim_data.enable_video = 0;  in nv4UpdateArbitrationSettings()
394 	sim_data.enable_mp = 0;  in nv4UpdateArbitrationSettings()
395 	sim_data.memory_width = (NV_RD32(par->PEXTDEV, 0x0000) & 0x10) ?  in nv4UpdateArbitrationSettings()
397 	sim_data.mem_latency = (char)cfg1 & 0x0F;  in nv4UpdateArbitrationSettings()
398 	sim_data.mem_aligned = 1;  in nv4UpdateArbitrationSettings()
399 	sim_data.mem_page_miss =  in nv4UpdateArbitrationSettings()
401 	sim_data.gr_during_vid = 0;  in nv4UpdateArbitrationSettings()
402 	sim_data.pclk_khz = VClk;  in nv4UpdateArbitrationSettings()
403 	sim_data.mclk_khz = MClk;  in nv4UpdateArbitrationSettings()
404 	sim_data.nvclk_khz = NVClk;  in nv4UpdateArbitrationSettings()
405 	nv4CalcArbitration(&fifo_data, &sim_data);  in nv4UpdateArbitrationSettings()
625 	nv10_sim_state sim_data;  in nv10UpdateArbitrationSettings()  local
631 	sim_data.pix_bpp = (char)pixelDepth;  in nv10UpdateArbitrationSettings()
632 	sim_data.enable_video = 1;  in nv10UpdateArbitrationSettings()
633 	sim_data.enable_mp = 0;  in nv10UpdateArbitrationSettings()
634 	sim_data.memory_type = (NV_RD32(par->PFB, 0x0200) & 0x01) ? 1 : 0;  in nv10UpdateArbitrationSettings()
635 	sim_data.memory_width = (NV_RD32(par->PEXTDEV, 0x0000) & 0x10) ?  in nv10UpdateArbitrationSettings()
637 	sim_data.mem_latency = (char)cfg1 & 0x0F;  in nv10UpdateArbitrationSettings()
638 	sim_data.mem_aligned = 1;  in nv10UpdateArbitrationSettings()
639 	sim_data.mem_page_miss =  in nv10UpdateArbitrationSettings()
641 	sim_data.gr_during_vid = 0;  in nv10UpdateArbitrationSettings()
642 	sim_data.pclk_khz = VClk;  in nv10UpdateArbitrationSettings()
643 	sim_data.mclk_khz = MClk;  in nv10UpdateArbitrationSettings()
644 	sim_data.nvclk_khz = NVClk;  in nv10UpdateArbitrationSettings()
645 	nv10CalcArbitration(&fifo_data, &sim_data);  in nv10UpdateArbitrationSettings()
683 	nv10_sim_state sim_data;  in nForceUpdateArbitrationSettings()  local
708 	sim_data.pix_bpp = (char)pixelDepth;  in nForceUpdateArbitrationSettings()
709 	sim_data.enable_video = 0;  in nForceUpdateArbitrationSettings()
710 	sim_data.enable_mp = 0;  in nForceUpdateArbitrationSettings()
712 	pci_read_config_dword(dev, 0x7C, &sim_data.memory_type);  in nForceUpdateArbitrationSettings()
714 	sim_data.memory_type = (sim_data.memory_type >> 12) & 1;  in nForceUpdateArbitrationSettings()
715 	sim_data.memory_width = 64;  in nForceUpdateArbitrationSettings()
740 	sim_data.mem_latency = 3;  in nForceUpdateArbitrationSettings()
741 	sim_data.mem_aligned = 1;  in nForceUpdateArbitrationSettings()
742 	sim_data.mem_page_miss = 10;  in nForceUpdateArbitrationSettings()
743 	sim_data.gr_during_vid = 0;  in nForceUpdateArbitrationSettings()
744 	sim_data.pclk_khz = VClk;  in nForceUpdateArbitrationSettings()
745 	sim_data.mclk_khz = MClk;  in nForceUpdateArbitrationSettings()
746 	sim_data.nvclk_khz = NVClk;  in nForceUpdateArbitrationSettings()
747 	nv10CalcArbitration(&fifo_data, &sim_data);  in nForceUpdateArbitrationSettings()