1 // SPDX-License-Identifier: GPL-2.0
3  * MUSB OTG driver - support for Mentor's DMA controller
6  * Copyright (C) 2005-2007 by Texas Instruments
35 /* control register (16-bit): */
37 #define MUSB_HSDMA_TRANSMIT_SHIFT	1
45 #define MUSB_HSDMA_BURSTMODE_INCR4	1
54 	struct dma_channel		channel;  member
66 	struct musb_dma_channel		channel[MUSB_HSDMA_CHANNELS];  member
74 static void dma_channel_release(struct dma_channel *channel);
78 	struct musb *musb = controller->private_data;  in dma_controller_stop()
79 	struct dma_channel *channel;  in dma_controller_stop()  local
82 	if (controller->used_channels != 0) {  in dma_controller_stop()
83 		dev_err(musb->controller,  in dma_controller_stop()
84 			"Stopping DMA controller while channel active\n");  in dma_controller_stop()
87 			if (controller->used_channels & (1 << bit)) {  in dma_controller_stop()
88 				channel = &controller->channel[bit].channel;  in dma_controller_stop()
89 				dma_channel_release(channel);  in dma_controller_stop()
91 				if (!controller->used_channels)  in dma_controller_stop()
104 	struct dma_channel *channel = NULL;  in dma_channel_allocate()  local
108 		if (!(controller->used_channels & (1 << bit))) {  in dma_channel_allocate()
109 			controller->used_channels |= (1 << bit);  in dma_channel_allocate()
110 			musb_channel = &(controller->channel[bit]);  in dma_channel_allocate()
111 			musb_channel->controller = controller;  in dma_channel_allocate()
112 			musb_channel->idx = bit;  in dma_channel_allocate()
113 			musb_channel->epnum = hw_ep->epnum;  in dma_channel_allocate()
114 			musb_channel->transmit = transmit;  in dma_channel_allocate()
115 			channel = &(musb_channel->channel);  in dma_channel_allocate()
116 			channel->private_data = musb_channel;  in dma_channel_allocate()
117 			channel->status = MUSB_DMA_STATUS_FREE;  in dma_channel_allocate()
118 			channel->max_len = 0x100000;  in dma_channel_allocate()
119 			/* Tx => mode 1; Rx => mode 0 */  in dma_channel_allocate()
120 			channel->desired_mode = transmit;  in dma_channel_allocate()
121 			channel->actual_len = 0;  in dma_channel_allocate()
126 	return channel;  in dma_channel_allocate()
129 static void dma_channel_release(struct dma_channel *channel)  in dma_channel_release()  argument
131 	struct musb_dma_channel *musb_channel = channel->private_data;  in dma_channel_release()
133 	channel->actual_len = 0;  in dma_channel_release()
134 	musb_channel->start_addr = 0;  in dma_channel_release()
135 	musb_channel->len = 0;  in dma_channel_release()
137 	musb_channel->controller->used_channels &=  in dma_channel_release()
138 		~(1 << musb_channel->idx);  in dma_channel_release()
140 	channel->status = MUSB_DMA_STATUS_UNKNOWN;  in dma_channel_release()
143 static void configure_channel(struct dma_channel *channel,  in configure_channel()  argument
147 	struct musb_dma_channel *musb_channel = channel->private_data;  in configure_channel()
148 	struct musb_dma_controller *controller = musb_channel->controller;  in configure_channel()
149 	struct musb *musb = controller->private_data;  in configure_channel()
150 	void __iomem *mbase = controller->base;  in configure_channel()
151 	u8 bchannel = musb_channel->idx;  in configure_channel()
155 			channel, packet_sz, &dma_addr, len, mode);  in configure_channel()
158 		csr |= 1 << MUSB_HSDMA_MODE1_SHIFT;  in configure_channel()
164 	csr |= (musb_channel->epnum << MUSB_HSDMA_ENDPOINT_SHIFT)  in configure_channel()
165 		| (1 << MUSB_HSDMA_ENABLE_SHIFT)  in configure_channel()
166 		| (1 << MUSB_HSDMA_IRQENABLE_SHIFT)  in configure_channel()
167 		| (musb_channel->transmit  in configure_channel()
168 				? (1 << MUSB_HSDMA_TRANSMIT_SHIFT)  in configure_channel()
181 static int dma_channel_program(struct dma_channel *channel,  in dma_channel_program()  argument
185 	struct musb_dma_channel *musb_channel = channel->private_data;  in dma_channel_program()
186 	struct musb_dma_controller *controller = musb_channel->controller;  in dma_channel_program()
187 	struct musb *musb = controller->private_data;  in dma_channel_program()
189 	musb_dbg(musb, "ep%d-%s pkt_sz %d, dma_addr %pad length %d, mode %d",  in dma_channel_program()
190 		musb_channel->epnum,  in dma_channel_program()
191 		musb_channel->transmit ? "Tx" : "Rx",  in dma_channel_program()
194 	BUG_ON(channel->status == MUSB_DMA_STATUS_UNKNOWN ||  in dma_channel_program()
195 		channel->status == MUSB_DMA_STATUS_BUSY);  in dma_channel_program()
206 	if ((musb->hwvers >= MUSB_HWVERS_1800) && (dma_addr % 4))  in dma_channel_program()
209 	channel->actual_len = 0;  in dma_channel_program()
210 	musb_channel->start_addr = dma_addr;  in dma_channel_program()
211 	musb_channel->len = len;  in dma_channel_program()
212 	musb_channel->max_packet_sz = packet_sz;  in dma_channel_program()
213 	channel->status = MUSB_DMA_STATUS_BUSY;  in dma_channel_program()
215 	configure_channel(channel, packet_sz, mode, dma_addr, len);  in dma_channel_program()
220 static int dma_channel_abort(struct dma_channel *channel)  in dma_channel_abort()  argument
222 	struct musb_dma_channel *musb_channel = channel->private_data;  in dma_channel_abort()
223 	void __iomem *mbase = musb_channel->controller->base;  in dma_channel_abort()
224 	struct musb *musb = musb_channel->controller->private_data;  in dma_channel_abort()
226 	u8 bchannel = musb_channel->idx;  in dma_channel_abort()
230 	if (channel->status == MUSB_DMA_STATUS_BUSY) {  in dma_channel_abort()
231 		if (musb_channel->transmit) {  in dma_channel_abort()
232 			offset = musb->io.ep_offset(musb_channel->epnum,  in dma_channel_abort()
245 			offset = musb->io.ep_offset(musb_channel->epnum,  in dma_channel_abort()
260 		channel->status = MUSB_DMA_STATUS_FREE;  in dma_channel_abort()
269 	struct musb *musb = controller->private_data;  in dma_controller_irq()
271 	struct dma_channel *channel;  in dma_controller_irq()  local
273 	void __iomem *mbase = controller->base;  in dma_controller_irq()
285 	spin_lock_irqsave(&musb->lock, flags);  in dma_controller_irq()
294 					&(controller->channel[bchannel]);  in dma_controller_irq()
295 			channel = &musb_channel->channel;  in dma_controller_irq()
296 			if (channel->status == MUSB_DMA_STATUS_BUSY) {  in dma_controller_irq()
300 					int_hsdma |= (1 << bchannel);  in dma_controller_irq()
311 		if (int_hsdma & (1 << bchannel)) {  in dma_controller_irq()
313 					&(controller->channel[bchannel]);  in dma_controller_irq()
314 			channel = &musb_channel->channel;  in dma_controller_irq()
320 			if (csr & (1 << MUSB_HSDMA_BUSERROR_SHIFT)) {  in dma_controller_irq()
321 				musb_channel->channel.status =  in dma_controller_irq()
326 				channel->actual_len = addr  in dma_controller_irq()
327 					- musb_channel->start_addr;  in dma_controller_irq()
329 				musb_dbg(musb, "ch %p, 0x%x -> 0x%x (%zu / %d) %s",  in dma_controller_irq()
330 					channel, musb_channel->start_addr,  in dma_controller_irq()
331 					addr, channel->actual_len,  in dma_controller_irq()
332 					musb_channel->len,  in dma_controller_irq()
333 					(channel->actual_len  in dma_controller_irq()
334 						< musb_channel->len) ?  in dma_controller_irq()
337 				channel->status = MUSB_DMA_STATUS_FREE;  in dma_controller_irq()
340 				if (musb_channel->transmit &&  in dma_controller_irq()
341 					(!channel->desired_mode ||  in dma_controller_irq()
342 					(channel->actual_len %  in dma_controller_irq()
343 					    musb_channel->max_packet_sz))) {  in dma_controller_irq()
344 					u8  epnum  = musb_channel->epnum;  in dma_controller_irq()
345 					int offset = musb->io.ep_offset(epnum,  in dma_controller_irq()
355 					if (channel->desired_mode == 1) {  in dma_controller_irq()
366 				musb_dma_completion(musb, musb_channel->epnum,  in dma_controller_irq()
367 						    musb_channel->transmit);  in dma_controller_irq()
374 	spin_unlock_irqrestore(&musb->lock, flags);  in dma_controller_irq()
386 	if (controller->irq)  in musbhs_dma_controller_destroy()
387 		free_irq(controller->irq, c);  in musbhs_dma_controller_destroy()
402 	controller->channel_count = MUSB_HSDMA_CHANNELS;  in dma_controller_alloc()
403 	controller->private_data = musb;  in dma_controller_alloc()
404 	controller->base = base;  in dma_controller_alloc()
406 	controller->controller.channel_alloc = dma_channel_allocate;  in dma_controller_alloc()
407 	controller->controller.channel_release = dma_channel_release;  in dma_controller_alloc()
408 	controller->controller.channel_program = dma_channel_program;  in dma_controller_alloc()
409 	controller->controller.channel_abort = dma_channel_abort;  in dma_controller_alloc()
417 	struct device *dev = musb->controller;  in musbhs_dma_controller_create()
431 			dev_name(musb->controller), controller)) {  in musbhs_dma_controller_create()
433 		musb_dma_controller_destroy(&controller->controller);  in musbhs_dma_controller_create()
438 	controller->irq = irq;  in musbhs_dma_controller_create()
440 	return &controller->controller;  in musbhs_dma_controller_create()
453 	return &controller->controller;  in musbhs_dma_controller_create_noirq()