Lines Matching refs:hw_ep
203 struct musb_hw_ep *hw_ep = qh->hw_ep; in musb_start_urb() local
204 int epnum = hw_ep->epnum; in musb_start_urb()
234 musb_ep_set_qh(hw_ep, is_in, qh); in musb_start_urb()
267 hw_ep->tx_channel ? "dma" : "pio"); in musb_start_urb()
269 if (!hw_ep->tx_channel) in musb_start_urb()
270 musb_h_tx_start(hw_ep); in musb_start_urb()
272 musb_h_tx_dma_start(hw_ep); in musb_start_urb()
297 struct musb_hw_ep *hw_ep, int is_in) in musb_advance_schedule() argument
299 struct musb_qh *qh = musb_ep_get_qh(hw_ep, is_in); in musb_advance_schedule()
300 struct musb_hw_ep *ep = qh->hw_ep; in musb_advance_schedule()
328 qh = musb_ep_get_qh(hw_ep, is_in); in musb_advance_schedule()
385 hw_ep->epnum, is_in ? 'R' : 'T', next_urb(qh)); in musb_advance_schedule()
390 static u16 musb_h_flush_rxfifo(struct musb_hw_ep *hw_ep, u16 csr) in musb_h_flush_rxfifo() argument
402 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_h_flush_rxfifo()
403 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_h_flush_rxfifo()
406 return musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_h_flush_rxfifo()
421 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_packet_rx() local
422 void __iomem *epio = hw_ep->regs; in musb_host_packet_rx()
423 struct musb_qh *qh = hw_ep->in_qh; in musb_host_packet_rx()
488 musb_read_fifo(hw_ep, length, buf); in musb_host_packet_rx()
493 musb_h_flush_rxfifo(hw_ep, csr); in musb_host_packet_rx()
572 static void musb_tx_dma_set_mode_mentor(struct musb_hw_ep *hw_ep, in musb_tx_dma_set_mode_mentor() argument
576 struct dma_channel *channel = hw_ep->tx_channel; in musb_tx_dma_set_mode_mentor()
577 void __iomem *epio = hw_ep->regs; in musb_tx_dma_set_mode_mentor()
599 can_bulk_split(hw_ep->musb, qh->type))) in musb_tx_dma_set_mode_mentor()
610 static void musb_tx_dma_set_mode_cppi_tusb(struct musb_hw_ep *hw_ep, in musb_tx_dma_set_mode_cppi_tusb() argument
614 struct dma_channel *channel = hw_ep->tx_channel; in musb_tx_dma_set_mode_cppi_tusb()
626 struct musb_hw_ep *hw_ep, struct musb_qh *qh, in musb_tx_dma_program() argument
629 struct dma_channel *channel = hw_ep->tx_channel; in musb_tx_dma_program()
633 if (musb_dma_inventra(hw_ep->musb) || musb_dma_ux500(hw_ep->musb)) in musb_tx_dma_program()
634 musb_tx_dma_set_mode_mentor(hw_ep, qh, in musb_tx_dma_program()
636 else if (is_cppi_enabled(hw_ep->musb) || tusb_dma_omap(hw_ep->musb)) in musb_tx_dma_program()
637 musb_tx_dma_set_mode_cppi_tusb(hw_ep, urb, &mode); in musb_tx_dma_program()
651 void __iomem *epio = hw_ep->regs; in musb_tx_dma_program()
655 hw_ep->tx_channel = NULL; in musb_tx_dma_program()
677 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_ep_program() local
678 void __iomem *epio = hw_ep->regs; in musb_ep_program()
679 struct musb_qh *qh = musb_ep_get_qh(hw_ep, !is_out); in musb_ep_program()
699 hw_ep->tx_channel = NULL; in musb_ep_program()
705 dma_channel = is_out ? hw_ep->tx_channel : hw_ep->rx_channel; in musb_ep_program()
708 dma_controller, hw_ep, is_out); in musb_ep_program()
710 hw_ep->tx_channel = dma_channel; in musb_ep_program()
712 hw_ep->rx_channel = dma_channel; in musb_ep_program()
739 if (!hw_ep->tx_double_buffered) in musb_ep_program()
740 musb_h_tx_flush_fifo(hw_ep); in musb_ep_program()
757 if (!hw_ep->tx_double_buffered) in musb_ep_program()
767 musb_h_ep0_flush_fifo(hw_ep); in musb_ep_program()
783 qh->hb_mult = hw_ep->max_packet_sz_tx in musb_ep_program()
801 load_count = min((u32) hw_ep->max_packet_sz_tx, in musb_ep_program()
807 hw_ep, qh, urb, offset, len)) in musb_ep_program()
828 musb_write_fifo(hw_ep, load_count, buf); in musb_ep_program()
832 musb_write_fifo(hw_ep, load_count, buf); in musb_ep_program()
842 if (hw_ep->rx_reinit) { in musb_ep_program()
850 csr = musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_ep_program()
856 hw_ep->epnum, csr); in musb_ep_program()
870 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_ep_program()
871 csr = musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_ep_program()
884 hw_ep->rx_channel = dma_channel = NULL; in musb_ep_program()
891 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_ep_program()
892 csr = musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_ep_program()
983 struct musb_hw_ep *hw_ep = musb->control_ep; in musb_h_ep0_continue() local
984 struct musb_qh *qh = hw_ep->in_qh; in musb_h_ep0_continue()
995 musb_read_fifo(hw_ep, fifo_count, fifo_dest); in musb_h_ep0_continue()
1034 musb_write_fifo(hw_ep, fifo_count, fifo_dest); in musb_h_ep0_continue()
1060 struct musb_hw_ep *hw_ep = musb->control_ep; in musb_h_ep0_irq() local
1061 void __iomem *epio = hw_ep->regs; in musb_h_ep0_irq()
1062 struct musb_qh *qh = hw_ep->in_qh; in musb_h_ep0_irq()
1122 musb_h_ep0_flush_fifo(hw_ep); in musb_h_ep0_irq()
1136 musb_h_ep0_flush_fifo(hw_ep); in musb_h_ep0_irq()
1172 musb_advance_schedule(musb, urb, hw_ep, 1); in musb_h_ep0_irq()
1202 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_tx() local
1203 void __iomem *epio = hw_ep->regs; in musb_host_tx()
1204 struct musb_qh *qh = hw_ep->out_qh; in musb_host_tx()
1221 dma = is_dma_capable() ? hw_ep->tx_channel : NULL; in musb_host_tx()
1244 musb_bulk_nak_timeout(musb, hw_ep, 0); in musb_host_tx()
1273 musb_h_tx_flush_fifo(hw_ep); in musb_host_tx()
1409 musb_advance_schedule(musb, urb, hw_ep, USB_DIR_OUT); in musb_host_tx()
1412 if (musb_tx_dma_program(musb->dma_controller, hw_ep, qh, urb, in musb_host_tx()
1415 musb_h_tx_dma_start(hw_ep); in musb_host_tx()
1448 musb_write_fifo(hw_ep, length, qh->sg_miter.addr); in musb_host_tx()
1452 musb_write_fifo(hw_ep, length, urb->transfer_buffer + offset); in musb_host_tx()
1465 struct musb_hw_ep *hw_ep, in musb_rx_dma_iso_cppi41() argument
1470 struct dma_channel *channel = hw_ep->rx_channel; in musb_rx_dma_iso_cppi41()
1471 void __iomem *epio = hw_ep->regs; in musb_rx_dma_iso_cppi41()
1483 musb_writew(hw_ep->regs, MUSB_RXCSR, val); in musb_rx_dma_iso_cppi41()
1490 struct musb_hw_ep *hw_ep, in musb_rx_dma_iso_cppi41() argument
1536 struct musb_hw_ep *hw_ep, in musb_rx_dma_inventra_cppi41() argument
1541 struct dma_channel *channel = hw_ep->rx_channel; in musb_rx_dma_inventra_cppi41()
1542 void __iomem *epio = hw_ep->regs; in musb_rx_dma_inventra_cppi41()
1565 if (musb_dma_cppi41(hw_ep->musb)) in musb_rx_dma_inventra_cppi41()
1566 done = musb_rx_dma_iso_cppi41(dma, hw_ep, qh, in musb_rx_dma_inventra_cppi41()
1606 struct musb_hw_ep *hw_ep, in musb_rx_dma_in_inventra_cppi41() argument
1612 struct musb *musb = hw_ep->musb; in musb_rx_dma_in_inventra_cppi41()
1613 void __iomem *epio = hw_ep->regs; in musb_rx_dma_in_inventra_cppi41()
1614 struct dma_channel *channel = hw_ep->rx_channel; in musb_rx_dma_in_inventra_cppi41()
1659 if (rx_count < hw_ep->max_packet_sz_rx) { in musb_rx_dma_in_inventra_cppi41()
1693 hw_ep->rx_channel = NULL; in musb_rx_dma_in_inventra_cppi41()
1706 struct musb_hw_ep *hw_ep, in musb_rx_dma_inventra_cppi41() argument
1715 struct musb_hw_ep *hw_ep, in musb_rx_dma_in_inventra_cppi41() argument
1732 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_rx() local
1734 void __iomem *epio = hw_ep->regs; in musb_host_rx()
1735 struct musb_qh *qh = hw_ep->in_qh; in musb_host_rx()
1748 dma = is_dma_capable() ? hw_ep->rx_channel : NULL; in musb_host_rx()
1762 musb_h_flush_rxfifo(hw_ep, MUSB_RXCSR_CLRDATATOG); in musb_host_rx()
1807 musb_bulk_nak_timeout(musb, hw_ep, 1); in musb_host_rx()
1835 musb_h_flush_rxfifo(hw_ep, MUSB_RXCSR_CLRDATATOG); in musb_host_rx()
1883 musb_writew(hw_ep->regs, MUSB_RXCSR, val); in musb_host_rx()
1887 done = musb_rx_dma_inventra_cppi41(c, hw_ep, qh, urb, xfer_len); in musb_host_rx()
1888 musb_dbg(hw_ep->musb, in musb_host_rx()
1916 musb_dbg(hw_ep->musb, in musb_host_rx()
1924 if (musb_rx_dma_in_inventra_cppi41(c, hw_ep, qh, urb, in musb_host_rx()
1984 musb_advance_schedule(musb, urb, hw_ep, USB_DIR_IN); in musb_host_rx()
2001 struct musb_hw_ep *hw_ep = NULL; in musb_schedule() local
2010 hw_ep = musb->control_ep; in musb_schedule()
2026 for (epnum = 1, hw_ep = musb->endpoints + 1; in musb_schedule()
2028 epnum++, hw_ep++) { in musb_schedule()
2031 if (musb_ep_get_qh(hw_ep, is_in) != NULL) in musb_schedule()
2034 if (hw_ep == musb->bulk_ep) in musb_schedule()
2038 diff = hw_ep->max_packet_sz_rx; in musb_schedule()
2040 diff = hw_ep->max_packet_sz_tx; in musb_schedule()
2057 hw_ep = musb->endpoints + epnum; in musb_schedule()
2059 txtype = (musb_readb(hw_ep->regs, MUSB_TXTYPE) in musb_schedule()
2071 hw_ep = musb->bulk_ep; in musb_schedule()
2098 hw_ep = musb->endpoints + best_end; in musb_schedule()
2106 qh->hw_ep = hw_ep; in musb_schedule()
2310 struct musb_hw_ep *ep = qh->hw_ep; in musb_cleanup_urb()
2396 || musb_ep_get_qh(qh->hw_ep, is_in) != qh) { in musb_urb_dequeue()
2407 musb_ep_set_qh(qh->hw_ep, is_in, NULL); in musb_urb_dequeue()
2439 if (musb_ep_get_qh(qh->hw_ep, is_in) == qh) { in musb_h_disable()
2455 musb_advance_schedule(musb, urb, qh->hw_ep, is_in); in musb_h_disable()