Lines Matching +full:ports +full:- +full:lane +full:- +full:control
1 // SPDX-License-Identifier: GPL-2.0
17 #include "xhci-trace.h"
23 /* Default sublink speed attribute of each lane */
53 bos->bLength = USB_DT_BOS_SIZE; in xhci_create_usb3x_bos_desc()
54 bos->bDescriptorType = USB_DT_BOS; in xhci_create_usb3x_bos_desc()
55 bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE + in xhci_create_usb3x_bos_desc()
57 bos->bNumDeviceCaps = 1; in xhci_create_usb3x_bos_desc()
60 for (i = 0; i < xhci->num_port_caps; i++) { in xhci_create_usb3x_bos_desc()
61 u8 major = xhci->port_caps[i].maj_rev; in xhci_create_usb3x_bos_desc()
62 u8 minor = xhci->port_caps[i].min_rev; in xhci_create_usb3x_bos_desc()
67 port_cap = &xhci->port_caps[i]; in xhci_create_usb3x_bos_desc()
72 if (port_cap->psi_count) { in xhci_create_usb3x_bos_desc()
75 for (i = 0; i < port_cap->psi_count; i++) { in xhci_create_usb3x_bos_desc()
76 if ((port_cap->psi[i] & PLT_MASK) == PLT_SYM) in xhci_create_usb3x_bos_desc()
80 ssac = port_cap->psi_count + num_sym_ssa - 1; in xhci_create_usb3x_bos_desc()
81 ssic = port_cap->psi_uid_count - 1; in xhci_create_usb3x_bos_desc()
88 ssic = (ssac + 1) / 2 - 1; in xhci_create_usb3x_bos_desc()
91 bos->bNumDeviceCaps++; in xhci_create_usb3x_bos_desc()
92 bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE + in xhci_create_usb3x_bos_desc()
102 ss_cap->bLength = USB_DT_USB_SS_CAP_SIZE; in xhci_create_usb3x_bos_desc()
103 ss_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY; in xhci_create_usb3x_bos_desc()
104 ss_cap->bDevCapabilityType = USB_SS_CAP_TYPE; in xhci_create_usb3x_bos_desc()
105 ss_cap->bmAttributes = 0; /* set later */ in xhci_create_usb3x_bos_desc()
106 ss_cap->wSpeedSupported = cpu_to_le16(USB_5GBPS_OPERATION); in xhci_create_usb3x_bos_desc()
107 ss_cap->bFunctionalitySupport = USB_LOW_SPEED_OPERATION; in xhci_create_usb3x_bos_desc()
108 ss_cap->bU1devExitLat = 0; /* set later */ in xhci_create_usb3x_bos_desc()
109 ss_cap->bU2DevExitLat = 0; /* set later */ in xhci_create_usb3x_bos_desc()
111 reg = readl(&xhci->cap_regs->hcc_params); in xhci_create_usb3x_bos_desc()
113 ss_cap->bmAttributes |= USB_LTM_SUPPORT; in xhci_create_usb3x_bos_desc()
115 if ((xhci->quirks & XHCI_LPM_SUPPORT)) { in xhci_create_usb3x_bos_desc()
116 reg = readl(&xhci->cap_regs->hcs_params3); in xhci_create_usb3x_bos_desc()
117 ss_cap->bU1devExitLat = HCS_U1_LATENCY(reg); in xhci_create_usb3x_bos_desc()
118 ss_cap->bU2DevExitLat = cpu_to_le16(HCS_U2_LATENCY(reg)); in xhci_create_usb3x_bos_desc()
121 if (wLength < le16_to_cpu(bos->wTotalLength)) in xhci_create_usb3x_bos_desc()
125 return le16_to_cpu(bos->wTotalLength); in xhci_create_usb3x_bos_desc()
129 ssp_cap->bLength = USB_DT_USB_SSP_CAP_SIZE(ssac); in xhci_create_usb3x_bos_desc()
130 ssp_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY; in xhci_create_usb3x_bos_desc()
131 ssp_cap->bDevCapabilityType = USB_SSP_CAP_TYPE; in xhci_create_usb3x_bos_desc()
132 ssp_cap->bReserved = 0; in xhci_create_usb3x_bos_desc()
133 ssp_cap->wReserved = 0; in xhci_create_usb3x_bos_desc()
134 ssp_cap->bmAttributes = in xhci_create_usb3x_bos_desc()
138 if (!port_cap->psi_count) { in xhci_create_usb3x_bos_desc()
140 ssp_cap->bmSublinkSpeedAttr[i] = in xhci_create_usb3x_bos_desc()
148 for (i = 0; i < port_cap->psi_count; i++) { in xhci_create_usb3x_bos_desc()
159 psi = port_cap->psi[i]; in xhci_create_usb3x_bos_desc()
184 * descriptor SSP sublink speed attribute lane mantissa in xhci_create_usb3x_bos_desc()
185 * describes the lane speed. E.g. PSIM and PSIE for gen2x2 in xhci_create_usb3x_bos_desc()
186 * is 20Gbps, but the BOS descriptor lane speed mantissa is in xhci_create_usb3x_bos_desc()
188 * lane speed. in xhci_create_usb3x_bos_desc()
193 * values. But the lane speed for gen1x2 is 5Gbps while in xhci_create_usb3x_bos_desc()
200 u32 prev = port_cap->psi[i - 1]; in xhci_create_usb3x_bos_desc()
226 ssp_cap->bmSublinkSpeedAttr[offset++] = cpu_to_le32(attr); in xhci_create_usb3x_bos_desc()
231 ssp_cap->bmSublinkSpeedAttr[offset++] = cpu_to_le32(attr); in xhci_create_usb3x_bos_desc()
236 ssp_cap->bmSublinkSpeedAttr[offset++] = cpu_to_le32(attr); in xhci_create_usb3x_bos_desc()
241 ssp_cap->bmSublinkSpeedAttr[offset++] = cpu_to_le32(attr); in xhci_create_usb3x_bos_desc()
246 ssp_cap->wFunctionalitySupport = in xhci_create_usb3x_bos_desc()
252 return le16_to_cpu(bos->wTotalLength); in xhci_create_usb3x_bos_desc()
256 struct usb_hub_descriptor *desc, int ports) in xhci_common_hub_descriptor() argument
260 desc->bHubContrCurrent = 0; in xhci_common_hub_descriptor()
262 desc->bNbrPorts = ports; in xhci_common_hub_descriptor()
264 /* Bits 1:0 - support per-port power switching, or power always on */ in xhci_common_hub_descriptor()
265 if (HCC_PPC(xhci->hcc_params)) in xhci_common_hub_descriptor()
269 /* Bit 2 - root hubs are not part of a compound device */ in xhci_common_hub_descriptor()
270 /* Bits 4:3 - individual port over current protection */ in xhci_common_hub_descriptor()
272 /* Bits 6:5 - no TTs in root ports */ in xhci_common_hub_descriptor()
273 /* Bit 7 - no port indicators */ in xhci_common_hub_descriptor()
274 desc->wHubCharacteristics = cpu_to_le16(temp); in xhci_common_hub_descriptor()
281 int ports; in xhci_usb2_hub_descriptor() local
288 rhub = &xhci->usb2_rhub; in xhci_usb2_hub_descriptor()
289 ports = rhub->num_ports; in xhci_usb2_hub_descriptor()
290 xhci_common_hub_descriptor(xhci, desc, ports); in xhci_usb2_hub_descriptor()
291 desc->bDescriptorType = USB_DT_HUB; in xhci_usb2_hub_descriptor()
292 temp = 1 + (ports / 8); in xhci_usb2_hub_descriptor()
293 desc->bDescLength = USB_DT_HUB_NONVAR_SIZE + 2 * temp; in xhci_usb2_hub_descriptor()
294 desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.8 says 20ms */ in xhci_usb2_hub_descriptor()
300 for (i = 0; i < ports; i++) { in xhci_usb2_hub_descriptor()
301 portsc = readl(rhub->ports[i]->addr); in xhci_usb2_hub_descriptor()
313 * ports on it. The USB 2.0 specification says that there are two in xhci_usb2_hub_descriptor()
316 * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array in xhci_usb2_hub_descriptor()
320 * set of ports that actually exist. in xhci_usb2_hub_descriptor()
322 memset(desc->u.hs.DeviceRemovable, 0xff, in xhci_usb2_hub_descriptor()
323 sizeof(desc->u.hs.DeviceRemovable)); in xhci_usb2_hub_descriptor()
324 memset(desc->u.hs.PortPwrCtrlMask, 0xff, in xhci_usb2_hub_descriptor()
325 sizeof(desc->u.hs.PortPwrCtrlMask)); in xhci_usb2_hub_descriptor()
327 for (i = 0; i < (ports + 1 + 7) / 8; i++) in xhci_usb2_hub_descriptor()
328 memset(&desc->u.hs.DeviceRemovable[i], port_removable[i], in xhci_usb2_hub_descriptor()
336 int ports; in xhci_usb3_hub_descriptor() local
342 rhub = &xhci->usb3_rhub; in xhci_usb3_hub_descriptor()
343 ports = rhub->num_ports; in xhci_usb3_hub_descriptor()
344 xhci_common_hub_descriptor(xhci, desc, ports); in xhci_usb3_hub_descriptor()
345 desc->bDescriptorType = USB_DT_SS_HUB; in xhci_usb3_hub_descriptor()
346 desc->bDescLength = USB_DT_SS_HUB_SIZE; in xhci_usb3_hub_descriptor()
347 desc->bPwrOn2PwrGood = 50; /* usb 3.1 may fail if less than 100ms */ in xhci_usb3_hub_descriptor()
352 desc->u.ss.bHubHdrDecLat = 0; in xhci_usb3_hub_descriptor()
353 desc->u.ss.wHubDelay = 0; in xhci_usb3_hub_descriptor()
357 for (i = 0; i < ports; i++) { in xhci_usb3_hub_descriptor()
358 portsc = readl(rhub->ports[i]->addr); in xhci_usb3_hub_descriptor()
363 desc->u.ss.DeviceRemovable = cpu_to_le16(port_removable); in xhci_usb3_hub_descriptor()
370 if (hcd->speed >= HCD_USB3) in xhci_hub_descriptor()
394 * connect status, over-current status, port speed, and device removable.
395 * connect status and port speed are also sticky - meaning they're in
414 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
415 * over-current, reset, link state, and L1 change
419 * Bit 16 is RW, and writing a '1' to it causes the link state control to be
430 * xhci_port_state_to_neutral() - Clean up read portsc value back into writeable
435 * control register.
446 /* Save read-only status and port state */ in xhci_port_state_to_neutral()
452 * xhci_find_slot_id_by_port() - Find slot id of a usb device on a roothub port
455 * @port: one-based port number of the port in this roothub.
469 if (!xhci->devs[i] || !xhci->devs[i]->udev) in xhci_find_slot_id_by_port()
471 speed = xhci->devs[i]->udev->speed; in xhci_find_slot_id_by_port()
472 if (((speed >= USB_SPEED_SUPER) == (hcd->speed >= HCD_USB3)) in xhci_find_slot_id_by_port()
473 && xhci->devs[i]->fake_port == port) { in xhci_find_slot_id_by_port()
498 virt_dev = xhci->devs[slot_id]; in xhci_stop_device()
500 return -ENODEV; in xhci_stop_device()
506 return -ENOMEM; in xhci_stop_device()
508 spin_lock_irqsave(&xhci->lock, flags); in xhci_stop_device()
509 for (i = LAST_EP_INDEX; i > 0; i--) { in xhci_stop_device()
510 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue) { in xhci_stop_device()
514 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->out_ctx, i); in xhci_stop_device()
522 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
523 ret = -ENOMEM; in xhci_stop_device()
530 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
538 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
543 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
546 wait_for_completion(cmd->completion); in xhci_stop_device()
548 if (cmd->status == COMP_COMMAND_ABORTED || in xhci_stop_device()
549 cmd->status == COMP_COMMAND_RING_STOPPED) { in xhci_stop_device()
551 ret = -ETIME; in xhci_stop_device()
568 ep = &xhci->devs[slot_id]->eps[i]; in xhci_ring_device()
570 if (ep->ep_state & EP_HAS_STREAMS) { in xhci_ring_device()
571 for (s = 1; s < ep->stream_info->num_streams; s++) in xhci_ring_device()
573 } else if (ep->ring && ep->ring->dequeue) { in xhci_ring_device()
586 hcd = port->rhub->hcd; in xhci_disable_port()
588 /* Don't allow the USB core to disable SuperSpeed ports. */ in xhci_disable_port()
589 if (hcd->speed >= HCD_USB3) { in xhci_disable_port()
594 if (xhci->quirks & XHCI_BROKEN_PORT_PED) { in xhci_disable_port()
600 portsc = readl(port->addr); in xhci_disable_port()
604 writel(portsc | PORT_PE, port->addr); in xhci_disable_port()
606 portsc = readl(port->addr); in xhci_disable_port()
607 xhci_dbg(xhci, "disable port %d-%d, portsc: 0x%x\n", in xhci_disable_port()
608 hcd->self.busnum, port->hcd_portnum + 1, portsc); in xhci_disable_port()
632 port_change_bit = "over-current"; in xhci_clear_port_change_bit()
666 if (hcd->speed >= HCD_USB3) in xhci_get_rhub()
667 return &xhci->usb3_rhub; in xhci_get_rhub()
668 return &xhci->usb2_rhub; in xhci_get_rhub()
672 * xhci_set_port_power() must be called with xhci->lock held.
673 * It will release and re-aquire the lock while calling ACPI
678 __must_hold(&xhci->lock) in xhci_set_port_power()
683 hcd = port->rhub->hcd; in xhci_set_port_power()
684 temp = readl(port->addr); in xhci_set_port_power()
686 xhci_dbg(xhci, "set port power %d-%d %s, portsc: 0x%x\n", in xhci_set_port_power()
687 hcd->self.busnum, port->hcd_portnum + 1, on ? "ON" : "OFF", temp); in xhci_set_port_power()
693 writel(temp | PORT_POWER, port->addr); in xhci_set_port_power()
694 readl(port->addr); in xhci_set_port_power()
697 writel(temp & ~PORT_POWER, port->addr); in xhci_set_port_power()
700 spin_unlock_irqrestore(&xhci->lock, *flags); in xhci_set_port_power()
701 temp = usb_acpi_power_manageable(hcd->self.root_hub, in xhci_set_port_power()
702 port->hcd_portnum); in xhci_set_port_power()
704 usb_acpi_set_power_state(hcd->self.root_hub, in xhci_set_port_power()
705 port->hcd_portnum, on); in xhci_set_port_power()
706 spin_lock_irqsave(&xhci->lock, *flags); in xhci_set_port_power()
715 /* xhci only supports test mode for usb2 ports */ in xhci_port_set_test_mode()
716 port = xhci->usb2_rhub.ports[wIndex]; in xhci_port_set_test_mode()
717 temp = readl(port->addr + PORTPMSC); in xhci_port_set_test_mode()
719 writel(temp, port->addr + PORTPMSC); in xhci_port_set_test_mode()
720 xhci->test_mode = test_mode; in xhci_port_set_test_mode()
727 __must_hold(&xhci->lock) in xhci_enter_test_mode()
733 spin_unlock_irqrestore(&xhci->lock, *flags); in xhci_enter_test_mode()
734 for (i = 1; i <= HCS_MAX_SLOTS(xhci->hcs_params1); i++) { in xhci_enter_test_mode()
735 if (!xhci->devs[i]) in xhci_enter_test_mode()
744 spin_lock_irqsave(&xhci->lock, *flags); in xhci_enter_test_mode()
745 /* Put all ports to the Disable state by clear PP */ in xhci_enter_test_mode()
747 /* Power off USB3 ports*/ in xhci_enter_test_mode()
748 for (i = 0; i < xhci->usb3_rhub.num_ports; i++) in xhci_enter_test_mode()
749 xhci_set_port_power(xhci, xhci->usb3_rhub.ports[i], false, flags); in xhci_enter_test_mode()
750 /* Power off USB2 ports*/ in xhci_enter_test_mode()
751 for (i = 0; i < xhci->usb2_rhub.num_ports; i++) in xhci_enter_test_mode()
752 xhci_set_port_power(xhci, xhci->usb2_rhub.ports[i], false, flags); in xhci_enter_test_mode()
759 pm_runtime_forbid(xhci_to_hcd(xhci)->self.controller); in xhci_enter_test_mode()
772 if (!xhci->test_mode) { in xhci_exit_test_mode()
776 if (xhci->test_mode == USB_TEST_FORCE_ENABLE && in xhci_exit_test_mode()
777 !(xhci->xhc_state & XHCI_STATE_HALTED)) { in xhci_exit_test_mode()
782 pm_runtime_allow(xhci_to_hcd(xhci)->self.controller); in xhci_exit_test_mode()
783 xhci->test_mode = 0; in xhci_exit_test_mode()
793 portsc = readl(port->addr); in xhci_set_link_state()
797 writel(temp, port->addr); in xhci_set_link_state()
799 xhci_dbg(xhci, "Set port %d-%d link state, portsc: 0x%x, write 0x%x", in xhci_set_link_state()
800 port->rhub->hcd->self.busnum, port->hcd_portnum + 1, in xhci_set_link_state()
809 temp = readl(port->addr); in xhci_set_remote_wake_mask()
827 writel(temp, port->addr); in xhci_set_remote_wake_mask()
836 temp = readl(port->addr); in xhci_test_and_clear_bit()
840 writel(temp, port->addr); in xhci_test_and_clear_bit()
865 /* Return also connection bit - in xhci_hub_report_usb3_link_state()
887 * caused by a delay on the host-device negotiation. in xhci_hub_report_usb3_link_state()
889 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_hub_report_usb3_link_state()
901 * This Function verifies if all xhc USB3 ports have entered U0, if so,
908 u32 all_ports_seen_u0 = ((1 << xhci->usb3_rhub.num_ports) - 1); in xhci_del_comp_mod_timer()
911 if (!(xhci->quirks & XHCI_COMP_MODE_QUIRK)) in xhci_del_comp_mod_timer()
914 if ((xhci->port_status_u0 != all_ports_seen_u0) && port_in_u0) { in xhci_del_comp_mod_timer()
915 xhci->port_status_u0 |= 1 << wIndex; in xhci_del_comp_mod_timer()
916 if (xhci->port_status_u0 == all_ports_seen_u0) { in xhci_del_comp_mod_timer()
917 del_timer_sync(&xhci->comp_mode_recovery_timer); in xhci_del_comp_mod_timer()
919 "All USB3 ports have entered U0 already!"); in xhci_del_comp_mod_timer()
936 hcd = port->rhub->hcd; in xhci_handle_usb2_port_link_resume()
937 bus_state = &port->rhub->bus_state; in xhci_handle_usb2_port_link_resume()
939 wIndex = port->hcd_portnum; in xhci_handle_usb2_port_link_resume()
942 return -EINVAL; in xhci_handle_usb2_port_link_resume()
945 if (!port->resume_timestamp) { in xhci_handle_usb2_port_link_resume()
947 if (test_bit(wIndex, &bus_state->resuming_ports)) { in xhci_handle_usb2_port_link_resume()
961 set_bit(wIndex, &bus_state->resuming_ports); in xhci_handle_usb2_port_link_resume()
962 port->resume_timestamp = timeout; in xhci_handle_usb2_port_link_resume()
963 mod_timer(&hcd->rh_timer, timeout); in xhci_handle_usb2_port_link_resume()
964 usb_hcd_start_port_resume(&hcd->self, wIndex); in xhci_handle_usb2_port_link_resume()
967 } else if (time_after_eq(jiffies, port->resume_timestamp)) { in xhci_handle_usb2_port_link_resume()
970 xhci_dbg(xhci, "resume USB2 port %d-%d\n", in xhci_handle_usb2_port_link_resume()
971 hcd->self.busnum, wIndex + 1); in xhci_handle_usb2_port_link_resume()
973 port->resume_timestamp = 0; in xhci_handle_usb2_port_link_resume()
974 clear_bit(wIndex, &bus_state->resuming_ports); in xhci_handle_usb2_port_link_resume()
976 reinit_completion(&port->rexit_done); in xhci_handle_usb2_port_link_resume()
977 port->rexit_active = true; in xhci_handle_usb2_port_link_resume()
982 spin_unlock_irqrestore(&xhci->lock, *flags); in xhci_handle_usb2_port_link_resume()
984 &port->rexit_done, in xhci_handle_usb2_port_link_resume()
986 spin_lock_irqsave(&xhci->lock, *flags); in xhci_handle_usb2_port_link_resume()
993 return -ENODEV; in xhci_handle_usb2_port_link_resume()
997 int port_status = readl(port->addr); in xhci_handle_usb2_port_link_resume()
999 xhci_warn(xhci, "Port resume timed out, port %d-%d: 0x%x\n", in xhci_handle_usb2_port_link_resume()
1000 hcd->self.busnum, wIndex + 1, port_status); in xhci_handle_usb2_port_link_resume()
1009 usb_hcd_end_port_resume(&hcd->self, wIndex); in xhci_handle_usb2_port_link_resume()
1010 bus_state->port_c_suspend |= 1 << wIndex; in xhci_handle_usb2_port_link_resume()
1011 bus_state->suspended_ports &= ~(1 << wIndex); in xhci_handle_usb2_port_link_resume()
1022 /* only support rx and tx lane counts of 1 in usb3.1 spec */ in xhci_get_ext_port_status()
1027 ext_stat |= PORT_RX_LANES(port_li) << 8; /* bits 11:8 Rx lane count */ in xhci_get_ext_port_status()
1028 ext_stat |= PORT_TX_LANES(port_li) << 12; /* bits 15:12 Tx lane count */ in xhci_get_ext_port_status()
1042 bus_state = &port->rhub->bus_state; in xhci_get_usb3_port_status()
1043 xhci = hcd_to_xhci(port->rhub->hcd); in xhci_get_usb3_port_status()
1044 hcd = port->rhub->hcd; in xhci_get_usb3_port_status()
1046 portnum = port->hcd_portnum; in xhci_get_usb3_port_status()
1073 if (bus_state->port_remote_wakeup & (1 << portnum)) { in xhci_get_usb3_port_status()
1074 bus_state->port_remote_wakeup &= ~(1 << portnum); in xhci_get_usb3_port_status()
1075 usb_hcd_end_port_resume(&hcd->self, portnum); in xhci_get_usb3_port_status()
1077 bus_state->suspended_ports &= ~(1 << portnum); in xhci_get_usb3_port_status()
1092 bus_state = &port->rhub->bus_state; in xhci_get_usb2_port_status()
1094 portnum = port->hcd_portnum; in xhci_get_usb2_port_status()
1106 if (bus_state->suspended_ports & (1 << portnum)) { in xhci_get_usb2_port_status()
1107 bus_state->suspended_ports &= ~(1 << portnum); in xhci_get_usb2_port_status()
1108 bus_state->port_c_suspend |= 1 << portnum; in xhci_get_usb2_port_status()
1116 else if (port->resume_timestamp || port->rexit_active) in xhci_get_usb2_port_status()
1127 if (port->resume_timestamp || in xhci_get_usb2_port_status()
1128 test_bit(portnum, &bus_state->resuming_ports)) { in xhci_get_usb2_port_status()
1129 port->resume_timestamp = 0; in xhci_get_usb2_port_status()
1130 clear_bit(portnum, &bus_state->resuming_ports); in xhci_get_usb2_port_status()
1131 usb_hcd_end_port_resume(&port->rhub->hcd->self, portnum); in xhci_get_usb2_port_status()
1133 port->rexit_active = 0; in xhci_get_usb2_port_status()
1134 bus_state->suspended_ports &= ~(1 << portnum); in xhci_get_usb2_port_status()
1143 * - Mark a port as being done with device resume,
1145 * - Stop the Synopsys redriver Compliance Mode polling.
1146 * - Drop and reacquire the xHCI lock, in order to wait for port resume.
1152 __releases(&xhci->lock) in xhci_get_port_status()
1153 __acquires(&xhci->lock) in xhci_get_port_status()
1160 port = rhub->ports[wIndex]; in xhci_get_port_status()
1185 if (hcd->speed >= HCD_USB3) in xhci_get_port_status()
1191 if (bus_state->port_c_suspend & (1 << wIndex)) in xhci_get_port_status()
1212 struct xhci_port **ports; in xhci_hub_control() local
1217 ports = rhub->ports; in xhci_hub_control()
1218 max_ports = rhub->num_ports; in xhci_hub_control()
1219 bus_state = &rhub->bus_state; in xhci_hub_control()
1222 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1225 /* No power source, over-current reported per port */ in xhci_hub_control()
1233 if (hcd->speed >= HCD_USB3 && in xhci_hub_control()
1247 if (hcd->speed < HCD_USB3) in xhci_hub_control()
1251 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1257 wIndex--; in xhci_hub_control()
1258 port = ports[portnum1 - 1]; in xhci_hub_control()
1259 temp = readl(port->addr); in xhci_hub_control()
1262 retval = -ENODEV; in xhci_hub_control()
1271 xhci_dbg(xhci, "Get port status %d-%d read: 0x%x, return 0x%x", in xhci_hub_control()
1272 hcd->self.busnum, portnum1, temp, status); in xhci_hub_control()
1279 if (hcd->speed < HCD_USB31 || wLength != 8) { in xhci_hub_control()
1281 retval = -EINVAL; in xhci_hub_control()
1284 port_li = readl(port->addr + PORTLI); in xhci_hub_control()
1303 port = ports[portnum1 - 1]; in xhci_hub_control()
1304 wIndex--; in xhci_hub_control()
1305 temp = readl(port->addr); in xhci_hub_control()
1308 retval = -ENODEV; in xhci_hub_control()
1315 temp = readl(port->addr); in xhci_hub_control()
1319 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1321 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1327 temp = readl(port->addr); in xhci_hub_control()
1330 xhci_warn(xhci, "USB core suspending port %d-%d not in U0/U1/U2\n", in xhci_hub_control()
1331 hcd->self.busnum, portnum1); in xhci_hub_control()
1342 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1344 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1348 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1350 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1352 temp = readl(port->addr); in xhci_hub_control()
1353 bus_state->suspended_ports |= 1 << wIndex; in xhci_hub_control()
1356 temp = readl(port->addr); in xhci_hub_control()
1359 xhci_dbg(xhci, "Disable port %d-%d\n", in xhci_hub_control()
1360 hcd->self.busnum, portnum1); in xhci_hub_control()
1369 writel(temp | PORT_PE, port->addr); in xhci_hub_control()
1370 temp = readl(port->addr); in xhci_hub_control()
1376 xhci_dbg(xhci, "Enable port %d-%d\n", in xhci_hub_control()
1377 hcd->self.busnum, portnum1); in xhci_hub_control()
1379 temp = readl(port->addr); in xhci_hub_control()
1398 if (!HCC2_CTC(xhci->hcc_params2)) { in xhci_hub_control()
1408 xhci_dbg(xhci, "Enable compliance mode transition for port %d-%d\n", in xhci_hub_control()
1409 hcd->self.busnum, portnum1); in xhci_hub_control()
1412 temp = readl(port->addr); in xhci_hub_control()
1417 retval = -ENODEV; in xhci_hub_control()
1422 xhci_warn(xhci, "Cannot set port %d-%d link state %d\n", in xhci_hub_control()
1423 hcd->self.busnum, portnum1, link_state); in xhci_hub_control()
1445 reinit_completion(&port->u3exit_done); in xhci_hub_control()
1454 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1455 if (!wait_for_completion_timeout(&port->u3exit_done, in xhci_hub_control()
1457 xhci_dbg(xhci, "missing U0 port change event for port %d-%d\n", in xhci_hub_control()
1458 hcd->self.busnum, portnum1); in xhci_hub_control()
1459 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1460 temp = readl(port->addr); in xhci_hub_control()
1471 spin_unlock_irqrestore(&xhci->lock, in xhci_hub_control()
1474 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1477 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1478 while (retries--) { in xhci_hub_control()
1480 temp = readl(port->addr); in xhci_hub_control()
1484 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1485 temp = readl(port->addr); in xhci_hub_control()
1486 bus_state->suspended_ports |= 1 << wIndex; in xhci_hub_control()
1491 * Turn on ports, even if there isn't per-port switching. in xhci_hub_control()
1500 writel(temp, port->addr); in xhci_hub_control()
1502 temp = readl(port->addr); in xhci_hub_control()
1503 xhci_dbg(xhci, "set port reset, actual port %d-%d status = 0x%x\n", in xhci_hub_control()
1504 hcd->self.busnum, portnum1, temp); in xhci_hub_control()
1508 temp = readl(port->addr); in xhci_hub_control()
1509 xhci_dbg(xhci, "set port remote wake mask, actual port %d-%d status = 0x%x\n", in xhci_hub_control()
1510 hcd->self.busnum, portnum1, temp); in xhci_hub_control()
1514 writel(temp, port->addr); in xhci_hub_control()
1515 temp = readl(port->addr); in xhci_hub_control()
1518 if (hcd->speed < HCD_USB3) in xhci_hub_control()
1520 temp = readl(port->addr + PORTPMSC); in xhci_hub_control()
1523 writel(temp, port->addr + PORTPMSC); in xhci_hub_control()
1526 if (hcd->speed < HCD_USB3) in xhci_hub_control()
1528 temp = readl(port->addr + PORTPMSC); in xhci_hub_control()
1531 writel(temp, port->addr + PORTPMSC); in xhci_hub_control()
1535 if (hcd->speed != HCD_USB2) in xhci_hub_control()
1547 temp = readl(port->addr); in xhci_hub_control()
1553 port = ports[portnum1 - 1]; in xhci_hub_control()
1555 wIndex--; in xhci_hub_control()
1556 temp = readl(port->addr); in xhci_hub_control()
1559 retval = -ENODEV; in xhci_hub_control()
1566 temp = readl(port->addr); in xhci_hub_control()
1575 set_bit(wIndex, &bus_state->resuming_ports); in xhci_hub_control()
1576 usb_hcd_start_port_resume(&hcd->self, wIndex); in xhci_hub_control()
1578 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1580 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1582 clear_bit(wIndex, &bus_state->resuming_ports); in xhci_hub_control()
1583 usb_hcd_end_port_resume(&hcd->self, wIndex); in xhci_hub_control()
1585 bus_state->port_c_suspend |= 1 << wIndex; in xhci_hub_control()
1596 bus_state->port_c_suspend &= ~(1 << wIndex); in xhci_hub_control()
1606 port->addr, temp); in xhci_hub_control()
1624 retval = -EPIPE; in xhci_hub_control()
1626 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1633 * Ports are 0-indexed from the HCD point of view,
1634 * and 1-indexed from the USB core pointer of view.
1650 struct xhci_port **ports; in xhci_hub_status_data() local
1653 ports = rhub->ports; in xhci_hub_status_data()
1654 max_ports = rhub->num_ports; in xhci_hub_status_data()
1655 bus_state = &rhub->bus_state; in xhci_hub_status_data()
1662 * Inform the usbcore about resume-in-progress by returning in xhci_hub_status_data()
1663 * a non-zero value even if there are no status changes. in xhci_hub_status_data()
1665 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_status_data()
1667 status = bus_state->resuming_ports; in xhci_hub_status_data()
1673 if (xhci->run_graceperiod) { in xhci_hub_status_data()
1674 if (time_before(jiffies, xhci->run_graceperiod)) in xhci_hub_status_data()
1677 xhci->run_graceperiod = 0; in xhci_hub_status_data()
1684 temp = readl(ports[i]->addr); in xhci_hub_status_data()
1687 retval = -ENODEV; in xhci_hub_status_data()
1693 (bus_state->port_c_suspend & 1 << i) || in xhci_hub_status_data()
1694 (ports[i]->resume_timestamp && time_after_eq( in xhci_hub_status_data()
1695 jiffies, ports[i]->resume_timestamp))) { in xhci_hub_status_data()
1706 __func__, hcd->self.busnum); in xhci_hub_status_data()
1707 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_hub_status_data()
1709 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_status_data()
1722 struct xhci_port **ports; in xhci_bus_suspend() local
1727 ports = rhub->ports; in xhci_bus_suspend()
1728 max_ports = rhub->num_ports; in xhci_bus_suspend()
1729 bus_state = &rhub->bus_state; in xhci_bus_suspend()
1730 wake_enabled = hcd->self.root_hub->do_remote_wakeup; in xhci_bus_suspend()
1732 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_suspend()
1735 if (bus_state->resuming_ports || /* USB2 */ in xhci_bus_suspend()
1736 bus_state->port_remote_wakeup) { /* USB3 */ in xhci_bus_suspend()
1737 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1739 hcd->self.busnum); in xhci_bus_suspend()
1740 return -EBUSY; in xhci_bus_suspend()
1744 * Prepare ports for suspend, but don't write anything before all ports in xhci_bus_suspend()
1747 bus_state->bus_suspended = 0; in xhci_bus_suspend()
1749 while (port_index--) { in xhci_bus_suspend()
1753 t1 = readl(ports[port_index]->addr); in xhci_bus_suspend()
1761 if ((hcd->speed >= HCD_USB3) && retries-- && in xhci_bus_suspend()
1763 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1765 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_suspend()
1766 xhci_dbg(xhci, "port %d-%d polling in bus suspend, waiting\n", in xhci_bus_suspend()
1767 hcd->self.busnum, port_index + 1); in xhci_bus_suspend()
1770 /* bail out if port detected a over-current condition */ in xhci_bus_suspend()
1772 bus_state->bus_suspended = 0; in xhci_bus_suspend()
1773 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1774 xhci_dbg(xhci, "Bus suspend bailout, port over-current detected\n"); in xhci_bus_suspend()
1775 return -EBUSY; in xhci_bus_suspend()
1777 /* suspend ports in U0, or bail out for new connect changes */ in xhci_bus_suspend()
1780 bus_state->bus_suspended = 0; in xhci_bus_suspend()
1781 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1783 return -EBUSY; in xhci_bus_suspend()
1785 xhci_dbg(xhci, "port %d-%d not suspended\n", in xhci_bus_suspend()
1786 hcd->self.busnum, port_index + 1); in xhci_bus_suspend()
1789 set_bit(port_index, &bus_state->bus_suspended); in xhci_bus_suspend()
1804 if ((xhci->quirks & XHCI_U2_DISABLE_WAKE) && in xhci_bus_suspend()
1805 (hcd->speed < HCD_USB3)) { in xhci_bus_suspend()
1806 if (usb_amd_pt_check_port(hcd->self.controller, in xhci_bus_suspend()
1818 /* write port settings, stopping and suspending ports if needed */ in xhci_bus_suspend()
1820 while (port_index--) { in xhci_bus_suspend()
1823 if (test_bit(port_index, &bus_state->bus_suspended)) { in xhci_bus_suspend()
1829 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1831 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_suspend()
1834 writel(portsc_buf[port_index], ports[port_index]->addr); in xhci_bus_suspend()
1836 hcd->state = HC_STATE_SUSPENDED; in xhci_bus_suspend()
1837 bus_state->next_statechange = jiffies + msecs_to_jiffies(10); in xhci_bus_suspend()
1838 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1840 if (bus_state->bus_suspended) in xhci_bus_suspend()
1847 * Workaround for missing Cold Attach Status (CAS) if device re-plugged in S3.
1849 * See Intel 100/c230 series PCH specification update Doc #332692-006 Errata #8
1855 portsc = readl(port->addr); in xhci_port_missing_cas_quirk()
1868 writel(portsc, port->addr); in xhci_port_missing_cas_quirk()
1870 readl(port->addr); in xhci_port_missing_cas_quirk()
1885 struct xhci_port **ports; in xhci_bus_resume() local
1888 ports = rhub->ports; in xhci_bus_resume()
1889 max_ports = rhub->num_ports; in xhci_bus_resume()
1890 bus_state = &rhub->bus_state; in xhci_bus_resume()
1892 if (time_before(jiffies, bus_state->next_statechange)) in xhci_bus_resume()
1895 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_resume()
1897 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_resume()
1898 return -ESHUTDOWN; in xhci_bus_resume()
1902 temp = readl(&xhci->op_regs->command); in xhci_bus_resume()
1904 writel(temp, &xhci->op_regs->command); in xhci_bus_resume()
1906 /* bus specific resume for ports we suspended at bus_suspend */ in xhci_bus_resume()
1907 if (hcd->speed >= HCD_USB3) in xhci_bus_resume()
1913 while (port_index--) { in xhci_bus_resume()
1914 portsc = readl(ports[port_index]->addr); in xhci_bus_resume()
1916 /* warm reset CAS limited ports stuck in polling/compliance */ in xhci_bus_resume()
1917 if ((xhci->quirks & XHCI_MISSING_CAS) && in xhci_bus_resume()
1918 (hcd->speed >= HCD_USB3) && in xhci_bus_resume()
1919 xhci_port_missing_cas_quirk(ports[port_index])) { in xhci_bus_resume()
1920 xhci_dbg(xhci, "reset stuck port %d-%d\n", in xhci_bus_resume()
1921 hcd->self.busnum, port_index + 1); in xhci_bus_resume()
1922 clear_bit(port_index, &bus_state->bus_suspended); in xhci_bus_resume()
1926 if (test_bit(port_index, &bus_state->bus_suspended)) in xhci_bus_resume()
1939 &bus_state->bus_suspended); in xhci_bus_resume()
1942 /* disable wake for all ports, write new link state if needed */ in xhci_bus_resume()
1944 writel(portsc, ports[port_index]->addr); in xhci_bus_resume()
1948 if (hcd->speed < HCD_USB3) { in xhci_bus_resume()
1949 if (bus_state->bus_suspended) { in xhci_bus_resume()
1950 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_resume()
1952 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_resume()
1954 for_each_set_bit(port_index, &bus_state->bus_suspended, in xhci_bus_resume()
1957 xhci_test_and_clear_bit(xhci, ports[port_index], in xhci_bus_resume()
1959 xhci_set_link_state(xhci, ports[port_index], XDEV_U0); in xhci_bus_resume()
1964 for_each_set_bit(port_index, &bus_state->bus_suspended, BITS_PER_LONG) { in xhci_bus_resume()
1965 sret = xhci_handshake(ports[port_index]->addr, PORT_PLC, in xhci_bus_resume()
1968 xhci_warn(xhci, "port %d-%d resume PLC timeout\n", in xhci_bus_resume()
1969 hcd->self.busnum, port_index + 1); in xhci_bus_resume()
1972 xhci_test_and_clear_bit(xhci, ports[port_index], PORT_PLC); in xhci_bus_resume()
1977 (void) readl(&xhci->op_regs->command); in xhci_bus_resume()
1979 bus_state->next_statechange = jiffies + msecs_to_jiffies(5); in xhci_bus_resume()
1980 /* re-enable irqs */ in xhci_bus_resume()
1981 temp = readl(&xhci->op_regs->command); in xhci_bus_resume()
1983 writel(temp, &xhci->op_regs->command); in xhci_bus_resume()
1984 temp = readl(&xhci->op_regs->command); in xhci_bus_resume()
1986 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_resume()
1995 return rhub->bus_state.resuming_ports; /* USB2 ports only */ in xhci_get_resuming_ports()