Lines Matching refs:hsotg
37 int dwc2_backup_global_registers(struct dwc2_hsotg *hsotg) in dwc2_backup_global_registers() argument
41 dev_dbg(hsotg->dev, "%s\n", __func__); in dwc2_backup_global_registers()
44 gr = &hsotg->gr_backup; in dwc2_backup_global_registers()
46 gr->gotgctl = dwc2_readl(hsotg, GOTGCTL); in dwc2_backup_global_registers()
47 gr->gintmsk = dwc2_readl(hsotg, GINTMSK); in dwc2_backup_global_registers()
48 gr->gahbcfg = dwc2_readl(hsotg, GAHBCFG); in dwc2_backup_global_registers()
49 gr->gusbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_backup_global_registers()
50 gr->grxfsiz = dwc2_readl(hsotg, GRXFSIZ); in dwc2_backup_global_registers()
51 gr->gnptxfsiz = dwc2_readl(hsotg, GNPTXFSIZ); in dwc2_backup_global_registers()
52 gr->gdfifocfg = dwc2_readl(hsotg, GDFIFOCFG); in dwc2_backup_global_registers()
53 gr->pcgcctl1 = dwc2_readl(hsotg, PCGCCTL1); in dwc2_backup_global_registers()
54 gr->glpmcfg = dwc2_readl(hsotg, GLPMCFG); in dwc2_backup_global_registers()
55 gr->gi2cctl = dwc2_readl(hsotg, GI2CCTL); in dwc2_backup_global_registers()
56 gr->pcgcctl = dwc2_readl(hsotg, PCGCTL); in dwc2_backup_global_registers()
69 int dwc2_restore_global_registers(struct dwc2_hsotg *hsotg) in dwc2_restore_global_registers() argument
73 dev_dbg(hsotg->dev, "%s\n", __func__); in dwc2_restore_global_registers()
76 gr = &hsotg->gr_backup; in dwc2_restore_global_registers()
78 dev_err(hsotg->dev, "%s: no global registers to restore\n", in dwc2_restore_global_registers()
84 dwc2_writel(hsotg, 0xffffffff, GINTSTS); in dwc2_restore_global_registers()
85 dwc2_writel(hsotg, gr->gotgctl, GOTGCTL); in dwc2_restore_global_registers()
86 dwc2_writel(hsotg, gr->gintmsk, GINTMSK); in dwc2_restore_global_registers()
87 dwc2_writel(hsotg, gr->gusbcfg, GUSBCFG); in dwc2_restore_global_registers()
88 dwc2_writel(hsotg, gr->gahbcfg, GAHBCFG); in dwc2_restore_global_registers()
89 dwc2_writel(hsotg, gr->grxfsiz, GRXFSIZ); in dwc2_restore_global_registers()
90 dwc2_writel(hsotg, gr->gnptxfsiz, GNPTXFSIZ); in dwc2_restore_global_registers()
91 dwc2_writel(hsotg, gr->gdfifocfg, GDFIFOCFG); in dwc2_restore_global_registers()
92 dwc2_writel(hsotg, gr->pcgcctl1, PCGCCTL1); in dwc2_restore_global_registers()
93 dwc2_writel(hsotg, gr->glpmcfg, GLPMCFG); in dwc2_restore_global_registers()
94 dwc2_writel(hsotg, gr->pcgcctl, PCGCTL); in dwc2_restore_global_registers()
95 dwc2_writel(hsotg, gr->gi2cctl, GI2CCTL); in dwc2_restore_global_registers()
107 int dwc2_exit_partial_power_down(struct dwc2_hsotg *hsotg, int rem_wakeup, in dwc2_exit_partial_power_down() argument
112 gr = &hsotg->gr_backup; in dwc2_exit_partial_power_down()
120 return dwc2_host_exit_partial_power_down(hsotg, rem_wakeup, in dwc2_exit_partial_power_down()
123 return dwc2_gadget_exit_partial_power_down(hsotg, restore); in dwc2_exit_partial_power_down()
131 int dwc2_enter_partial_power_down(struct dwc2_hsotg *hsotg) in dwc2_enter_partial_power_down() argument
133 if (dwc2_is_host_mode(hsotg)) in dwc2_enter_partial_power_down()
134 return dwc2_host_enter_partial_power_down(hsotg); in dwc2_enter_partial_power_down()
136 return dwc2_gadget_enter_partial_power_down(hsotg); in dwc2_enter_partial_power_down()
146 static void dwc2_restore_essential_regs(struct dwc2_hsotg *hsotg, int rmode, in dwc2_restore_essential_regs() argument
154 gr = &hsotg->gr_backup; in dwc2_restore_essential_regs()
155 dr = &hsotg->dr_backup; in dwc2_restore_essential_regs()
156 hr = &hsotg->hr_backup; in dwc2_restore_essential_regs()
158 dev_dbg(hsotg->dev, "%s: restoring essential regs\n", __func__); in dwc2_restore_essential_regs()
170 dwc2_writel(hsotg, pcgcctl, PCGCTL); in dwc2_restore_essential_regs()
173 dwc2_writel(hsotg, gr->gahbcfg | GAHBCFG_GLBL_INTR_EN, GAHBCFG); in dwc2_restore_essential_regs()
176 dwc2_writel(hsotg, 0xffffffff, GINTSTS); in dwc2_restore_essential_regs()
179 dwc2_writel(hsotg, GINTSTS_RESTOREDONE, GINTMSK); in dwc2_restore_essential_regs()
182 dwc2_writel(hsotg, gr->gusbcfg, GUSBCFG); in dwc2_restore_essential_regs()
185 dwc2_writel(hsotg, hr->hcfg, HCFG); in dwc2_restore_essential_regs()
188 dwc2_writel(hsotg, pcgcctl, PCGCTL); in dwc2_restore_essential_regs()
192 dwc2_writel(hsotg, pcgcctl, PCGCTL); in dwc2_restore_essential_regs()
195 dwc2_writel(hsotg, dr->dcfg, DCFG); in dwc2_restore_essential_regs()
198 dwc2_writel(hsotg, pcgcctl, PCGCTL); in dwc2_restore_essential_regs()
202 dwc2_writel(hsotg, pcgcctl, PCGCTL); in dwc2_restore_essential_regs()
214 void dwc2_hib_restore_common(struct dwc2_hsotg *hsotg, int rem_wakeup, in dwc2_hib_restore_common() argument
220 gpwrdn = dwc2_readl(hsotg, GPWRDN); in dwc2_hib_restore_common()
222 dwc2_writel(hsotg, gpwrdn, GPWRDN); in dwc2_hib_restore_common()
226 gpwrdn = dwc2_readl(hsotg, GPWRDN); in dwc2_hib_restore_common()
228 dwc2_writel(hsotg, gpwrdn, GPWRDN); in dwc2_hib_restore_common()
232 gpwrdn = dwc2_readl(hsotg, GPWRDN); in dwc2_hib_restore_common()
234 dwc2_writel(hsotg, gpwrdn, GPWRDN); in dwc2_hib_restore_common()
238 gpwrdn = dwc2_readl(hsotg, GPWRDN); in dwc2_hib_restore_common()
240 dwc2_writel(hsotg, gpwrdn, GPWRDN); in dwc2_hib_restore_common()
247 gpwrdn = dwc2_readl(hsotg, GPWRDN); in dwc2_hib_restore_common()
249 dwc2_writel(hsotg, gpwrdn, GPWRDN); in dwc2_hib_restore_common()
253 gpwrdn = dwc2_readl(hsotg, GPWRDN); in dwc2_hib_restore_common()
255 dwc2_writel(hsotg, gpwrdn, GPWRDN); in dwc2_hib_restore_common()
259 dwc2_restore_essential_regs(hsotg, rem_wakeup, is_host); in dwc2_hib_restore_common()
265 if (dwc2_hsotg_wait_bit_set(hsotg, GINTSTS, GINTSTS_RESTOREDONE, in dwc2_hib_restore_common()
267 dev_dbg(hsotg->dev, in dwc2_hib_restore_common()
271 dev_dbg(hsotg->dev, "restore done generated here\n"); in dwc2_hib_restore_common()
277 dwc2_writel(hsotg, GINTSTS_RESTOREDONE, GINTSTS); in dwc2_hib_restore_common()
286 static void dwc2_wait_for_mode(struct dwc2_hsotg *hsotg, in dwc2_wait_for_mode() argument
293 dev_vdbg(hsotg->dev, "Waiting for %s mode\n", in dwc2_wait_for_mode()
301 if (dwc2_is_host_mode(hsotg) == host_mode) { in dwc2_wait_for_mode()
302 dev_vdbg(hsotg->dev, "%s mode set\n", in dwc2_wait_for_mode()
311 dev_warn(hsotg->dev, "%s: Couldn't set %s mode\n", in dwc2_wait_for_mode()
326 static bool dwc2_iddig_filter_enabled(struct dwc2_hsotg *hsotg) in dwc2_iddig_filter_enabled() argument
331 if (!dwc2_hw_is_otg(hsotg)) in dwc2_iddig_filter_enabled()
335 ghwcfg4 = dwc2_readl(hsotg, GHWCFG4); in dwc2_iddig_filter_enabled()
343 gsnpsid = dwc2_readl(hsotg, GSNPSID); in dwc2_iddig_filter_enabled()
345 u32 gotgctl = dwc2_readl(hsotg, GOTGCTL); in dwc2_iddig_filter_enabled()
362 int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg, int is_host) in dwc2_enter_hibernation() argument
365 return dwc2_host_enter_hibernation(hsotg); in dwc2_enter_hibernation()
367 return dwc2_gadget_enter_hibernation(hsotg); in dwc2_enter_hibernation()
380 int dwc2_exit_hibernation(struct dwc2_hsotg *hsotg, int rem_wakeup, in dwc2_exit_hibernation() argument
384 return dwc2_host_exit_hibernation(hsotg, rem_wakeup, reset); in dwc2_exit_hibernation()
386 return dwc2_gadget_exit_hibernation(hsotg, rem_wakeup, reset); in dwc2_exit_hibernation()
393 int dwc2_core_reset(struct dwc2_hsotg *hsotg, bool skip_wait) in dwc2_core_reset() argument
398 dev_vdbg(hsotg->dev, "%s()\n", __func__); in dwc2_core_reset()
410 if (dwc2_iddig_filter_enabled(hsotg)) { in dwc2_core_reset()
411 u32 gotgctl = dwc2_readl(hsotg, GOTGCTL); in dwc2_core_reset()
412 u32 gusbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_core_reset()
421 greset = dwc2_readl(hsotg, GRSTCTL); in dwc2_core_reset()
423 dwc2_writel(hsotg, greset, GRSTCTL); in dwc2_core_reset()
425 if ((hsotg->hw_params.snpsid & DWC2_CORE_REV_MASK) < in dwc2_core_reset()
427 if (dwc2_hsotg_wait_bit_clear(hsotg, GRSTCTL, in dwc2_core_reset()
429 dev_warn(hsotg->dev, "%s: HANG! Soft Reset timeout GRSTCTL_CSFTRST\n", in dwc2_core_reset()
434 if (dwc2_hsotg_wait_bit_set(hsotg, GRSTCTL, in dwc2_core_reset()
436 dev_warn(hsotg->dev, "%s: HANG! Soft Reset timeout GRSTCTL_CSFTRST_DONE\n", in dwc2_core_reset()
440 greset = dwc2_readl(hsotg, GRSTCTL); in dwc2_core_reset()
443 dwc2_writel(hsotg, greset, GRSTCTL); in dwc2_core_reset()
460 dwc2_clear_fifo_map(hsotg); in dwc2_core_reset()
463 if (dwc2_hsotg_wait_bit_set(hsotg, GRSTCTL, GRSTCTL_AHBIDLE, 10000)) { in dwc2_core_reset()
464 dev_warn(hsotg->dev, "%s: HANG! AHB Idle timeout GRSTCTL GRSTCTL_AHBIDLE\n", in dwc2_core_reset()
470 dwc2_wait_for_mode(hsotg, true); in dwc2_core_reset()
502 void dwc2_force_mode(struct dwc2_hsotg *hsotg, bool host) in dwc2_force_mode() argument
508 dev_dbg(hsotg->dev, "Forcing mode to %s\n", host ? "host" : "device"); in dwc2_force_mode()
513 if (!dwc2_hw_is_otg(hsotg)) in dwc2_force_mode()
520 if (WARN_ON(host && hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)) in dwc2_force_mode()
523 if (WARN_ON(!host && hsotg->dr_mode == USB_DR_MODE_HOST)) in dwc2_force_mode()
526 gusbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_force_mode()
533 dwc2_writel(hsotg, gusbcfg, GUSBCFG); in dwc2_force_mode()
535 dwc2_wait_for_mode(hsotg, host); in dwc2_force_mode()
550 static void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg) in dwc2_clear_force_mode() argument
554 if (!dwc2_hw_is_otg(hsotg)) in dwc2_clear_force_mode()
557 dev_dbg(hsotg->dev, "Clearing force mode bits\n"); in dwc2_clear_force_mode()
559 gusbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_clear_force_mode()
562 dwc2_writel(hsotg, gusbcfg, GUSBCFG); in dwc2_clear_force_mode()
564 if (dwc2_iddig_filter_enabled(hsotg)) in dwc2_clear_force_mode()
571 void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg) in dwc2_force_dr_mode() argument
573 switch (hsotg->dr_mode) { in dwc2_force_dr_mode()
579 if (!dwc2_hw_is_otg(hsotg)) in dwc2_force_dr_mode()
584 dwc2_force_mode(hsotg, false); in dwc2_force_dr_mode()
587 dwc2_clear_force_mode(hsotg); in dwc2_force_dr_mode()
590 dev_warn(hsotg->dev, "%s() Invalid dr_mode=%d\n", in dwc2_force_dr_mode()
591 __func__, hsotg->dr_mode); in dwc2_force_dr_mode()
599 void dwc2_enable_acg(struct dwc2_hsotg *hsotg) in dwc2_enable_acg() argument
601 if (hsotg->params.acg_enable) { in dwc2_enable_acg()
602 u32 pcgcctl1 = dwc2_readl(hsotg, PCGCCTL1); in dwc2_enable_acg()
604 dev_dbg(hsotg->dev, "Enabling Active Clock Gating\n"); in dwc2_enable_acg()
606 dwc2_writel(hsotg, pcgcctl1, PCGCCTL1); in dwc2_enable_acg()
618 void dwc2_dump_host_registers(struct dwc2_hsotg *hsotg) in dwc2_dump_host_registers() argument
624 dev_dbg(hsotg->dev, "Host Global Registers\n"); in dwc2_dump_host_registers()
625 addr = hsotg->regs + HCFG; in dwc2_dump_host_registers()
626 dev_dbg(hsotg->dev, "HCFG @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
627 (unsigned long)addr, dwc2_readl(hsotg, HCFG)); in dwc2_dump_host_registers()
628 addr = hsotg->regs + HFIR; in dwc2_dump_host_registers()
629 dev_dbg(hsotg->dev, "HFIR @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
630 (unsigned long)addr, dwc2_readl(hsotg, HFIR)); in dwc2_dump_host_registers()
631 addr = hsotg->regs + HFNUM; in dwc2_dump_host_registers()
632 dev_dbg(hsotg->dev, "HFNUM @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
633 (unsigned long)addr, dwc2_readl(hsotg, HFNUM)); in dwc2_dump_host_registers()
634 addr = hsotg->regs + HPTXSTS; in dwc2_dump_host_registers()
635 dev_dbg(hsotg->dev, "HPTXSTS @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
636 (unsigned long)addr, dwc2_readl(hsotg, HPTXSTS)); in dwc2_dump_host_registers()
637 addr = hsotg->regs + HAINT; in dwc2_dump_host_registers()
638 dev_dbg(hsotg->dev, "HAINT @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
639 (unsigned long)addr, dwc2_readl(hsotg, HAINT)); in dwc2_dump_host_registers()
640 addr = hsotg->regs + HAINTMSK; in dwc2_dump_host_registers()
641 dev_dbg(hsotg->dev, "HAINTMSK @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
642 (unsigned long)addr, dwc2_readl(hsotg, HAINTMSK)); in dwc2_dump_host_registers()
643 if (hsotg->params.dma_desc_enable) { in dwc2_dump_host_registers()
644 addr = hsotg->regs + HFLBADDR; in dwc2_dump_host_registers()
645 dev_dbg(hsotg->dev, "HFLBADDR @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
646 (unsigned long)addr, dwc2_readl(hsotg, HFLBADDR)); in dwc2_dump_host_registers()
649 addr = hsotg->regs + HPRT0; in dwc2_dump_host_registers()
650 dev_dbg(hsotg->dev, "HPRT0 @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
651 (unsigned long)addr, dwc2_readl(hsotg, HPRT0)); in dwc2_dump_host_registers()
653 for (i = 0; i < hsotg->params.host_channels; i++) { in dwc2_dump_host_registers()
654 dev_dbg(hsotg->dev, "Host Channel %d Specific Registers\n", i); in dwc2_dump_host_registers()
655 addr = hsotg->regs + HCCHAR(i); in dwc2_dump_host_registers()
656 dev_dbg(hsotg->dev, "HCCHAR @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
657 (unsigned long)addr, dwc2_readl(hsotg, HCCHAR(i))); in dwc2_dump_host_registers()
658 addr = hsotg->regs + HCSPLT(i); in dwc2_dump_host_registers()
659 dev_dbg(hsotg->dev, "HCSPLT @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
660 (unsigned long)addr, dwc2_readl(hsotg, HCSPLT(i))); in dwc2_dump_host_registers()
661 addr = hsotg->regs + HCINT(i); in dwc2_dump_host_registers()
662 dev_dbg(hsotg->dev, "HCINT @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
663 (unsigned long)addr, dwc2_readl(hsotg, HCINT(i))); in dwc2_dump_host_registers()
664 addr = hsotg->regs + HCINTMSK(i); in dwc2_dump_host_registers()
665 dev_dbg(hsotg->dev, "HCINTMSK @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
666 (unsigned long)addr, dwc2_readl(hsotg, HCINTMSK(i))); in dwc2_dump_host_registers()
667 addr = hsotg->regs + HCTSIZ(i); in dwc2_dump_host_registers()
668 dev_dbg(hsotg->dev, "HCTSIZ @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
669 (unsigned long)addr, dwc2_readl(hsotg, HCTSIZ(i))); in dwc2_dump_host_registers()
670 addr = hsotg->regs + HCDMA(i); in dwc2_dump_host_registers()
671 dev_dbg(hsotg->dev, "HCDMA @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
672 (unsigned long)addr, dwc2_readl(hsotg, HCDMA(i))); in dwc2_dump_host_registers()
673 if (hsotg->params.dma_desc_enable) { in dwc2_dump_host_registers()
674 addr = hsotg->regs + HCDMAB(i); in dwc2_dump_host_registers()
675 dev_dbg(hsotg->dev, "HCDMAB @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
676 (unsigned long)addr, dwc2_readl(hsotg, in dwc2_dump_host_registers()
691 void dwc2_dump_global_registers(struct dwc2_hsotg *hsotg) in dwc2_dump_global_registers() argument
696 dev_dbg(hsotg->dev, "Core Global Registers\n"); in dwc2_dump_global_registers()
697 addr = hsotg->regs + GOTGCTL; in dwc2_dump_global_registers()
698 dev_dbg(hsotg->dev, "GOTGCTL @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
699 (unsigned long)addr, dwc2_readl(hsotg, GOTGCTL)); in dwc2_dump_global_registers()
700 addr = hsotg->regs + GOTGINT; in dwc2_dump_global_registers()
701 dev_dbg(hsotg->dev, "GOTGINT @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
702 (unsigned long)addr, dwc2_readl(hsotg, GOTGINT)); in dwc2_dump_global_registers()
703 addr = hsotg->regs + GAHBCFG; in dwc2_dump_global_registers()
704 dev_dbg(hsotg->dev, "GAHBCFG @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
705 (unsigned long)addr, dwc2_readl(hsotg, GAHBCFG)); in dwc2_dump_global_registers()
706 addr = hsotg->regs + GUSBCFG; in dwc2_dump_global_registers()
707 dev_dbg(hsotg->dev, "GUSBCFG @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
708 (unsigned long)addr, dwc2_readl(hsotg, GUSBCFG)); in dwc2_dump_global_registers()
709 addr = hsotg->regs + GRSTCTL; in dwc2_dump_global_registers()
710 dev_dbg(hsotg->dev, "GRSTCTL @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
711 (unsigned long)addr, dwc2_readl(hsotg, GRSTCTL)); in dwc2_dump_global_registers()
712 addr = hsotg->regs + GINTSTS; in dwc2_dump_global_registers()
713 dev_dbg(hsotg->dev, "GINTSTS @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
714 (unsigned long)addr, dwc2_readl(hsotg, GINTSTS)); in dwc2_dump_global_registers()
715 addr = hsotg->regs + GINTMSK; in dwc2_dump_global_registers()
716 dev_dbg(hsotg->dev, "GINTMSK @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
717 (unsigned long)addr, dwc2_readl(hsotg, GINTMSK)); in dwc2_dump_global_registers()
718 addr = hsotg->regs + GRXSTSR; in dwc2_dump_global_registers()
719 dev_dbg(hsotg->dev, "GRXSTSR @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
720 (unsigned long)addr, dwc2_readl(hsotg, GRXSTSR)); in dwc2_dump_global_registers()
721 addr = hsotg->regs + GRXFSIZ; in dwc2_dump_global_registers()
722 dev_dbg(hsotg->dev, "GRXFSIZ @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
723 (unsigned long)addr, dwc2_readl(hsotg, GRXFSIZ)); in dwc2_dump_global_registers()
724 addr = hsotg->regs + GNPTXFSIZ; in dwc2_dump_global_registers()
725 dev_dbg(hsotg->dev, "GNPTXFSIZ @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
726 (unsigned long)addr, dwc2_readl(hsotg, GNPTXFSIZ)); in dwc2_dump_global_registers()
727 addr = hsotg->regs + GNPTXSTS; in dwc2_dump_global_registers()
728 dev_dbg(hsotg->dev, "GNPTXSTS @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
729 (unsigned long)addr, dwc2_readl(hsotg, GNPTXSTS)); in dwc2_dump_global_registers()
730 addr = hsotg->regs + GI2CCTL; in dwc2_dump_global_registers()
731 dev_dbg(hsotg->dev, "GI2CCTL @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
732 (unsigned long)addr, dwc2_readl(hsotg, GI2CCTL)); in dwc2_dump_global_registers()
733 addr = hsotg->regs + GPVNDCTL; in dwc2_dump_global_registers()
734 dev_dbg(hsotg->dev, "GPVNDCTL @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
735 (unsigned long)addr, dwc2_readl(hsotg, GPVNDCTL)); in dwc2_dump_global_registers()
736 addr = hsotg->regs + GGPIO; in dwc2_dump_global_registers()
737 dev_dbg(hsotg->dev, "GGPIO @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
738 (unsigned long)addr, dwc2_readl(hsotg, GGPIO)); in dwc2_dump_global_registers()
739 addr = hsotg->regs + GUID; in dwc2_dump_global_registers()
740 dev_dbg(hsotg->dev, "GUID @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
741 (unsigned long)addr, dwc2_readl(hsotg, GUID)); in dwc2_dump_global_registers()
742 addr = hsotg->regs + GSNPSID; in dwc2_dump_global_registers()
743 dev_dbg(hsotg->dev, "GSNPSID @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
744 (unsigned long)addr, dwc2_readl(hsotg, GSNPSID)); in dwc2_dump_global_registers()
745 addr = hsotg->regs + GHWCFG1; in dwc2_dump_global_registers()
746 dev_dbg(hsotg->dev, "GHWCFG1 @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
747 (unsigned long)addr, dwc2_readl(hsotg, GHWCFG1)); in dwc2_dump_global_registers()
748 addr = hsotg->regs + GHWCFG2; in dwc2_dump_global_registers()
749 dev_dbg(hsotg->dev, "GHWCFG2 @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
750 (unsigned long)addr, dwc2_readl(hsotg, GHWCFG2)); in dwc2_dump_global_registers()
751 addr = hsotg->regs + GHWCFG3; in dwc2_dump_global_registers()
752 dev_dbg(hsotg->dev, "GHWCFG3 @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
753 (unsigned long)addr, dwc2_readl(hsotg, GHWCFG3)); in dwc2_dump_global_registers()
754 addr = hsotg->regs + GHWCFG4; in dwc2_dump_global_registers()
755 dev_dbg(hsotg->dev, "GHWCFG4 @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
756 (unsigned long)addr, dwc2_readl(hsotg, GHWCFG4)); in dwc2_dump_global_registers()
757 addr = hsotg->regs + GLPMCFG; in dwc2_dump_global_registers()
758 dev_dbg(hsotg->dev, "GLPMCFG @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
759 (unsigned long)addr, dwc2_readl(hsotg, GLPMCFG)); in dwc2_dump_global_registers()
760 addr = hsotg->regs + GPWRDN; in dwc2_dump_global_registers()
761 dev_dbg(hsotg->dev, "GPWRDN @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
762 (unsigned long)addr, dwc2_readl(hsotg, GPWRDN)); in dwc2_dump_global_registers()
763 addr = hsotg->regs + GDFIFOCFG; in dwc2_dump_global_registers()
764 dev_dbg(hsotg->dev, "GDFIFOCFG @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
765 (unsigned long)addr, dwc2_readl(hsotg, GDFIFOCFG)); in dwc2_dump_global_registers()
766 addr = hsotg->regs + HPTXFSIZ; in dwc2_dump_global_registers()
767 dev_dbg(hsotg->dev, "HPTXFSIZ @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
768 (unsigned long)addr, dwc2_readl(hsotg, HPTXFSIZ)); in dwc2_dump_global_registers()
770 addr = hsotg->regs + PCGCTL; in dwc2_dump_global_registers()
771 dev_dbg(hsotg->dev, "PCGCTL @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
772 (unsigned long)addr, dwc2_readl(hsotg, PCGCTL)); in dwc2_dump_global_registers()
782 void dwc2_flush_tx_fifo(struct dwc2_hsotg *hsotg, const int num) in dwc2_flush_tx_fifo() argument
786 dev_vdbg(hsotg->dev, "Flush Tx FIFO %d\n", num); in dwc2_flush_tx_fifo()
789 if (dwc2_hsotg_wait_bit_set(hsotg, GRSTCTL, GRSTCTL_AHBIDLE, 10000)) in dwc2_flush_tx_fifo()
790 dev_warn(hsotg->dev, "%s: HANG! AHB Idle GRSCTL\n", in dwc2_flush_tx_fifo()
795 dwc2_writel(hsotg, greset, GRSTCTL); in dwc2_flush_tx_fifo()
797 if (dwc2_hsotg_wait_bit_clear(hsotg, GRSTCTL, GRSTCTL_TXFFLSH, 10000)) in dwc2_flush_tx_fifo()
798 dev_warn(hsotg->dev, "%s: HANG! timeout GRSTCTL GRSTCTL_TXFFLSH\n", in dwc2_flush_tx_fifo()
810 void dwc2_flush_rx_fifo(struct dwc2_hsotg *hsotg) in dwc2_flush_rx_fifo() argument
814 dev_vdbg(hsotg->dev, "%s()\n", __func__); in dwc2_flush_rx_fifo()
817 if (dwc2_hsotg_wait_bit_set(hsotg, GRSTCTL, GRSTCTL_AHBIDLE, 10000)) in dwc2_flush_rx_fifo()
818 dev_warn(hsotg->dev, "%s: HANG! AHB Idle GRSCTL\n", in dwc2_flush_rx_fifo()
822 dwc2_writel(hsotg, greset, GRSTCTL); in dwc2_flush_rx_fifo()
825 if (dwc2_hsotg_wait_bit_clear(hsotg, GRSTCTL, GRSTCTL_RXFFLSH, 10000)) in dwc2_flush_rx_fifo()
826 dev_warn(hsotg->dev, "%s: HANG! timeout GRSTCTL GRSTCTL_RXFFLSH\n", in dwc2_flush_rx_fifo()
833 bool dwc2_is_controller_alive(struct dwc2_hsotg *hsotg) in dwc2_is_controller_alive() argument
835 if (dwc2_readl(hsotg, GSNPSID) == 0xffffffff) in dwc2_is_controller_alive()
847 void dwc2_enable_global_interrupts(struct dwc2_hsotg *hsotg) in dwc2_enable_global_interrupts() argument
849 u32 ahbcfg = dwc2_readl(hsotg, GAHBCFG); in dwc2_enable_global_interrupts()
852 dwc2_writel(hsotg, ahbcfg, GAHBCFG); in dwc2_enable_global_interrupts()
861 void dwc2_disable_global_interrupts(struct dwc2_hsotg *hsotg) in dwc2_disable_global_interrupts() argument
863 u32 ahbcfg = dwc2_readl(hsotg, GAHBCFG); in dwc2_disable_global_interrupts()
866 dwc2_writel(hsotg, ahbcfg, GAHBCFG); in dwc2_disable_global_interrupts()
870 unsigned int dwc2_op_mode(struct dwc2_hsotg *hsotg) in dwc2_op_mode() argument
872 u32 ghwcfg2 = dwc2_readl(hsotg, GHWCFG2); in dwc2_op_mode()
879 bool dwc2_hw_is_otg(struct dwc2_hsotg *hsotg) in dwc2_hw_is_otg() argument
881 unsigned int op_mode = dwc2_op_mode(hsotg); in dwc2_hw_is_otg()
889 bool dwc2_hw_is_host(struct dwc2_hsotg *hsotg) in dwc2_hw_is_host() argument
891 unsigned int op_mode = dwc2_op_mode(hsotg); in dwc2_hw_is_host()
898 bool dwc2_hw_is_device(struct dwc2_hsotg *hsotg) in dwc2_hw_is_device() argument
900 unsigned int op_mode = dwc2_op_mode(hsotg); in dwc2_hw_is_device()
915 int dwc2_hsotg_wait_bit_set(struct dwc2_hsotg *hsotg, u32 offset, u32 mask, in dwc2_hsotg_wait_bit_set() argument
921 if (dwc2_readl(hsotg, offset) & mask) in dwc2_hsotg_wait_bit_set()
938 int dwc2_hsotg_wait_bit_clear(struct dwc2_hsotg *hsotg, u32 offset, u32 mask, in dwc2_hsotg_wait_bit_clear() argument
944 if (!(dwc2_readl(hsotg, offset) & mask)) in dwc2_hsotg_wait_bit_clear()
956 void dwc2_init_fs_ls_pclk_sel(struct dwc2_hsotg *hsotg) in dwc2_init_fs_ls_pclk_sel() argument
960 if ((hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI && in dwc2_init_fs_ls_pclk_sel()
961 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED && in dwc2_init_fs_ls_pclk_sel()
962 hsotg->params.ulpi_fs_ls) || in dwc2_init_fs_ls_pclk_sel()
963 hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS) { in dwc2_init_fs_ls_pclk_sel()
971 dev_dbg(hsotg->dev, "Initializing HCFG.FSLSPClkSel to %08x\n", val); in dwc2_init_fs_ls_pclk_sel()
972 hcfg = dwc2_readl(hsotg, HCFG); in dwc2_init_fs_ls_pclk_sel()
975 dwc2_writel(hsotg, hcfg, HCFG); in dwc2_init_fs_ls_pclk_sel()
978 static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy) in dwc2_fs_phy_init() argument
988 dev_dbg(hsotg->dev, "FS PHY selected\n"); in dwc2_fs_phy_init()
990 usbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_fs_phy_init()
993 dwc2_writel(hsotg, usbcfg, GUSBCFG); in dwc2_fs_phy_init()
996 retval = dwc2_core_reset(hsotg, false); in dwc2_fs_phy_init()
999 dev_err(hsotg->dev, in dwc2_fs_phy_init()
1005 if (hsotg->params.activate_stm_fs_transceiver) { in dwc2_fs_phy_init()
1006 ggpio = dwc2_readl(hsotg, GGPIO); in dwc2_fs_phy_init()
1008 dev_dbg(hsotg->dev, "Activating transceiver\n"); in dwc2_fs_phy_init()
1014 dwc2_writel(hsotg, ggpio, GGPIO); in dwc2_fs_phy_init()
1024 if (dwc2_is_host_mode(hsotg)) in dwc2_fs_phy_init()
1025 dwc2_init_fs_ls_pclk_sel(hsotg); in dwc2_fs_phy_init()
1027 if (hsotg->params.i2c_enable) { in dwc2_fs_phy_init()
1028 dev_dbg(hsotg->dev, "FS PHY enabling I2C\n"); in dwc2_fs_phy_init()
1031 usbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_fs_phy_init()
1033 dwc2_writel(hsotg, usbcfg, GUSBCFG); in dwc2_fs_phy_init()
1036 i2cctl = dwc2_readl(hsotg, GI2CCTL); in dwc2_fs_phy_init()
1040 dwc2_writel(hsotg, i2cctl, GI2CCTL); in dwc2_fs_phy_init()
1042 dwc2_writel(hsotg, i2cctl, GI2CCTL); in dwc2_fs_phy_init()
1048 static int dwc2_hs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy) in dwc2_hs_phy_init() argument
1056 usbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_hs_phy_init()
1064 switch (hsotg->params.phy_type) { in dwc2_hs_phy_init()
1067 dev_dbg(hsotg->dev, "HS ULPI PHY selected\n"); in dwc2_hs_phy_init()
1070 if (hsotg->params.phy_ulpi_ddr) in dwc2_hs_phy_init()
1074 if (hsotg->params.oc_disable) in dwc2_hs_phy_init()
1080 dev_dbg(hsotg->dev, "HS UTMI+ PHY selected\n"); in dwc2_hs_phy_init()
1082 if (hsotg->params.phy_utmi_width == 16) in dwc2_hs_phy_init()
1086 dev_err(hsotg->dev, "FS PHY selected at HS!\n"); in dwc2_hs_phy_init()
1091 dwc2_writel(hsotg, usbcfg, GUSBCFG); in dwc2_hs_phy_init()
1094 retval = dwc2_core_reset(hsotg, false); in dwc2_hs_phy_init()
1096 dev_err(hsotg->dev, in dwc2_hs_phy_init()
1105 static void dwc2_set_turnaround_time(struct dwc2_hsotg *hsotg) in dwc2_set_turnaround_time() argument
1109 if (hsotg->params.phy_type != DWC2_PHY_TYPE_PARAM_UTMI) in dwc2_set_turnaround_time()
1112 usbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_set_turnaround_time()
1115 if (hsotg->params.phy_utmi_width == 16) in dwc2_set_turnaround_time()
1120 dwc2_writel(hsotg, usbcfg, GUSBCFG); in dwc2_set_turnaround_time()
1123 int dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy) in dwc2_phy_init() argument
1129 if ((hsotg->params.speed == DWC2_SPEED_PARAM_FULL || in dwc2_phy_init()
1130 hsotg->params.speed == DWC2_SPEED_PARAM_LOW) && in dwc2_phy_init()
1131 hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS) { in dwc2_phy_init()
1133 retval = dwc2_fs_phy_init(hsotg, select_phy); in dwc2_phy_init()
1138 retval = dwc2_hs_phy_init(hsotg, select_phy); in dwc2_phy_init()
1142 if (dwc2_is_device_mode(hsotg)) in dwc2_phy_init()
1143 dwc2_set_turnaround_time(hsotg); in dwc2_phy_init()
1146 if (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI && in dwc2_phy_init()
1147 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED && in dwc2_phy_init()
1148 hsotg->params.ulpi_fs_ls) { in dwc2_phy_init()
1149 dev_dbg(hsotg->dev, "Setting ULPI FSLS\n"); in dwc2_phy_init()
1150 usbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_phy_init()
1153 dwc2_writel(hsotg, usbcfg, GUSBCFG); in dwc2_phy_init()
1155 usbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_phy_init()
1158 dwc2_writel(hsotg, usbcfg, GUSBCFG); in dwc2_phy_init()
1161 if (!hsotg->params.activate_ingenic_overcurrent_detection) { in dwc2_phy_init()
1162 if (dwc2_is_host_mode(hsotg)) { in dwc2_phy_init()
1163 otgctl = readl(hsotg->regs + GOTGCTL); in dwc2_phy_init()
1165 writel(otgctl, hsotg->regs + GOTGCTL); in dwc2_phy_init()