Lines Matching refs:hba

23 static struct ufs_sprd_priv *ufs_sprd_get_priv_data(struct ufs_hba *hba)  in ufs_sprd_get_priv_data()  argument
25 struct ufs_sprd_host *host = ufshcd_get_variant(hba); in ufs_sprd_get_priv_data()
43 static void ufs_sprd_get_unipro_ver(struct ufs_hba *hba) in ufs_sprd_get_unipro_ver() argument
45 struct ufs_sprd_host *host = ufshcd_get_variant(hba); in ufs_sprd_get_unipro_ver()
47 if (ufshcd_dme_get(hba, UIC_ARG_MIB(PA_LOCALVERINFO), &host->unipro_ver)) in ufs_sprd_get_unipro_ver()
51 static void ufs_sprd_ctrl_uic_compl(struct ufs_hba *hba, bool enable) in ufs_sprd_ctrl_uic_compl() argument
53 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE); in ufs_sprd_ctrl_uic_compl()
59 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE); in ufs_sprd_ctrl_uic_compl()
95 static int ufs_sprd_parse_dt(struct device *dev, struct ufs_hba *hba, struct ufs_sprd_host *host) in ufs_sprd_parse_dt() argument
132 static int ufs_sprd_common_init(struct ufs_hba *hba) in ufs_sprd_common_init() argument
134 struct device *dev = hba->dev; in ufs_sprd_common_init()
149 host->hba = hba; in ufs_sprd_common_init()
150 ufshcd_set_variant(hba, host); in ufs_sprd_common_init()
152 hba->caps |= UFSHCD_CAP_CLK_GATING | in ufs_sprd_common_init()
155 hba->quirks |= UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS; in ufs_sprd_common_init()
157 ret = ufs_sprd_parse_dt(dev, hba, host); in ufs_sprd_common_init()
162 static int sprd_ufs_pwr_change_notify(struct ufs_hba *hba, in sprd_ufs_pwr_change_notify() argument
167 struct ufs_sprd_host *host = ufshcd_get_variant(hba); in sprd_ufs_pwr_change_notify()
173 ufshcd_dme_configure_adapt(hba, dev_req_params->gear_tx, in sprd_ufs_pwr_change_notify()
180 static int ufs_sprd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op, in ufs_sprd_suspend() argument
186 if (ufshcd_is_auto_hibern8_supported(hba)) { in ufs_sprd_suspend()
187 spin_lock_irqsave(hba->host->host_lock, flags); in ufs_sprd_suspend()
188 ufshcd_writel(hba, 0, REG_AUTO_HIBERNATE_IDLE_TIMER); in ufs_sprd_suspend()
189 spin_unlock_irqrestore(hba->host->host_lock, flags); in ufs_sprd_suspend()
196 static void ufs_sprd_n6_host_reset(struct ufs_hba *hba) in ufs_sprd_n6_host_reset() argument
198 struct ufs_sprd_priv *priv = ufs_sprd_get_priv_data(hba); in ufs_sprd_n6_host_reset()
200 dev_info(hba->dev, "ufs host reset!\n"); in ufs_sprd_n6_host_reset()
207 static int ufs_sprd_n6_device_reset(struct ufs_hba *hba) in ufs_sprd_n6_device_reset() argument
209 struct ufs_sprd_priv *priv = ufs_sprd_get_priv_data(hba); in ufs_sprd_n6_device_reset()
211 dev_info(hba->dev, "ufs device reset!\n"); in ufs_sprd_n6_device_reset()
220 static void ufs_sprd_n6_key_acc_enable(struct ufs_hba *hba) in ufs_sprd_n6_key_acc_enable() argument
228 val = ufshcd_readl(hba, REG_CONTROLLER_ENABLE); in ufs_sprd_n6_key_acc_enable()
230 ufs_sprd_n6_host_reset(hba); in ufs_sprd_n6_key_acc_enable()
232 ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE); in ufs_sprd_n6_key_acc_enable()
247 dev_err(hba->dev, "key reg access enable fail, disable crypto\n"); in ufs_sprd_n6_key_acc_enable()
248 hba->caps &= ~UFSHCD_CAP_CRYPTO; in ufs_sprd_n6_key_acc_enable()
251 static int ufs_sprd_n6_init(struct ufs_hba *hba) in ufs_sprd_n6_init() argument
256 ret = ufs_sprd_common_init(hba); in ufs_sprd_n6_init()
260 priv = ufs_sprd_get_priv_data(hba); in ufs_sprd_n6_init()
266 if (hba->caps & UFSHCD_CAP_CRYPTO) in ufs_sprd_n6_init()
267 ufs_sprd_n6_key_acc_enable(hba); in ufs_sprd_n6_init()
272 static int ufs_sprd_n6_phy_init(struct ufs_hba *hba) in ufs_sprd_n6_phy_init() argument
278 struct ufs_sprd_priv *priv = ufs_sprd_get_priv_data(hba); in ufs_sprd_n6_phy_init()
280 ufshcd_dme_set(hba, UIC_ARG_MIB(CBREFCLKCTRL2), 0x90); in ufs_sprd_n6_phy_init()
281 ufshcd_dme_set(hba, UIC_ARG_MIB(CBCRCTRL), 0x01); in ufs_sprd_n6_phy_init()
282 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(RXSQCONTROL, in ufs_sprd_n6_phy_init()
284 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(RXSQCONTROL, in ufs_sprd_n6_phy_init()
286 ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYCFGUPDT), 0x01); in ufs_sprd_n6_phy_init()
287 ufshcd_dme_set(hba, UIC_ARG_MIB(CBRATESEL), 0x01); in ufs_sprd_n6_phy_init()
295 ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGADDRLSB), 0x1c); in ufs_sprd_n6_phy_init()
296 ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGADDRMSB), offset); in ufs_sprd_n6_phy_init()
297 ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGWRLSB), 0x04); in ufs_sprd_n6_phy_init()
298 ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGWRMSB), 0x00); in ufs_sprd_n6_phy_init()
299 ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGRDWRSEL), 0x01); in ufs_sprd_n6_phy_init()
300 ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYCFGUPDT), 0x01); in ufs_sprd_n6_phy_init()
315 ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYCFGUPDT), 0x01); in ufs_sprd_n6_phy_init()
316 ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYDISABLE), 0x0); in ufs_sprd_n6_phy_init()
322 static int sprd_ufs_n6_hce_enable_notify(struct ufs_hba *hba, in sprd_ufs_n6_hce_enable_notify() argument
326 struct ufs_sprd_priv *priv = ufs_sprd_get_priv_data(hba); in sprd_ufs_n6_hce_enable_notify()
334 ufs_sprd_n6_host_reset(hba); in sprd_ufs_n6_hce_enable_notify()
336 if (hba->caps & UFSHCD_CAP_CRYPTO) in sprd_ufs_n6_hce_enable_notify()
337 ufs_sprd_n6_key_acc_enable(hba); in sprd_ufs_n6_hce_enable_notify()
341 err = ufs_sprd_n6_phy_init(hba); in sprd_ufs_n6_hce_enable_notify()
343 dev_err(hba->dev, "Phy setup failed (%d)\n", err); in sprd_ufs_n6_hce_enable_notify()
347 ufs_sprd_get_unipro_ver(hba); in sprd_ufs_n6_hce_enable_notify()
353 static void sprd_ufs_n6_h8_notify(struct ufs_hba *hba, in sprd_ufs_n6_h8_notify() argument
357 struct ufs_sprd_priv *priv = ufs_sprd_get_priv_data(hba); in sprd_ufs_n6_h8_notify()
365 ufs_sprd_ctrl_uic_compl(hba, false); in sprd_ufs_n6_h8_notify()
377 ufs_sprd_ctrl_uic_compl(hba, true); in sprd_ufs_n6_h8_notify()
430 struct ufs_hba *hba = platform_get_drvdata(pdev); in ufs_sprd_remove() local
433 ufshcd_remove(hba); in ufs_sprd_remove()