434 		 * negotiating maximum supported gear as G3.  in ufs_qcom_get_hs_gear()
435 		 * Hence downgrade the maximum supported gear to HS-G2.  in ufs_qcom_get_hs_gear()
537 static int ufs_qcom_cfg_timers(struct ufs_hba *hba, u32 gear,  in ufs_qcom_cfg_timers()  argument
576 	if (gear == 0) {  in ufs_qcom_cfg_timers()
577 		dev_err(hba->dev, "%s: invalid gear = %d\n", __func__, gear);  in ufs_qcom_cfg_timers()
611 			if (gear > ARRAY_SIZE(hs_fr_table_rA)) {  in ufs_qcom_cfg_timers()
614 					__func__, gear,  in ufs_qcom_cfg_timers()
618 			tx_clk_cycles_per_us = hs_fr_table_rA[gear-1][1];  in ufs_qcom_cfg_timers()
620 			if (gear > ARRAY_SIZE(hs_fr_table_rB)) {  in ufs_qcom_cfg_timers()
623 					__func__, gear,  in ufs_qcom_cfg_timers()
627 			tx_clk_cycles_per_us = hs_fr_table_rB[gear-1][1];  in ufs_qcom_cfg_timers()
636 		if (gear > ARRAY_SIZE(pwm_fr_table)) {  in ufs_qcom_cfg_timers()
639 					__func__, gear,  in ufs_qcom_cfg_timers()
643 		tx_clk_cycles_per_us = pwm_fr_table[gear-1][1];  in ufs_qcom_cfg_timers()
862 	int gear = max_t(u32, p->gear_rx, p->gear_tx);  in ufs_qcom_get_bw_table()  local
867 			return ufs_qcom_bw_table[MODE_HS_RB][gear][lane];  in ufs_qcom_get_bw_table()
869 			return ufs_qcom_bw_table[MODE_HS_RA][gear][lane];  in ufs_qcom_get_bw_table()
871 		return ufs_qcom_bw_table[MODE_PWM][gear][lane];  in ufs_qcom_get_bw_table()
903 		/* This driver only supports symmetic gear setting i.e., hs_tx_gear == hs_rx_gear */  in ufs_qcom_pwr_change_notify()
917 		 * the PHY gear settings are backwards compatible and we only need to change the PHY  in ufs_qcom_pwr_change_notify()
1285 	 * Power up the PHY using the minimum supported gear (UFS_HS_G2).  in ufs_qcom_init()
1286 	 * Switching to max gear will be performed during reinit if supported.  in ufs_qcom_init()