Lines Matching +full:ld +full:- +full:pulse +full:- +full:delay +full:- +full:us
1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/arm-smccc.h>
12 #include <linux/delay.h>
26 #include "ufshcd-pltfrm.h"
29 #include "ufs-mediatek.h"
34 #include "ufs-mediatek-trace.h"
52 { .compatible = "mediatek,mt8183-ufshci" },
98 return !!(host->caps & UFS_MTK_CAP_BOOST_CRYPT_ENGINE); in ufs_mtk_is_boost_crypt_enabled()
105 return !!(host->caps & UFS_MTK_CAP_VA09_PWR_CTRL); in ufs_mtk_is_va09_supported()
112 return !!(host->caps & UFS_MTK_CAP_BROKEN_VCC); in ufs_mtk_is_broken_vcc()
119 return !!(host->caps & UFS_MTK_CAP_PMC_VIA_FASTAUTO); in ufs_mtk_is_pmc_via_fastauto()
164 dev_info(hba->dev, "%s: crypto enable failed, err: %lu\n", in ufs_mtk_crypto_enable()
166 hba->caps &= ~UFSHCD_CAP_CRYPTO; in ufs_mtk_crypto_enable()
174 reset_control_assert(host->hci_reset); in ufs_mtk_host_reset()
175 reset_control_assert(host->crypto_reset); in ufs_mtk_host_reset()
176 reset_control_assert(host->unipro_reset); in ufs_mtk_host_reset()
180 reset_control_deassert(host->unipro_reset); in ufs_mtk_host_reset()
181 reset_control_deassert(host->crypto_reset); in ufs_mtk_host_reset()
182 reset_control_deassert(host->hci_reset); in ufs_mtk_host_reset()
189 *rc = devm_reset_control_get(hba->dev, str); in ufs_mtk_init_reset_control()
191 dev_info(hba->dev, "Failed to get reset control %s: %ld\n", in ufs_mtk_init_reset_control()
201 ufs_mtk_init_reset_control(hba, &host->hci_reset, in ufs_mtk_init_reset()
203 ufs_mtk_init_reset_control(hba, &host->unipro_reset, in ufs_mtk_init_reset()
205 ufs_mtk_init_reset_control(hba, &host->crypto_reset, in ufs_mtk_init_reset()
215 if (host->unipro_lpm) { in ufs_mtk_hce_enable_notify()
216 hba->vps->hba_enable_delay_us = 0; in ufs_mtk_hce_enable_notify()
218 hba->vps->hba_enable_delay_us = 600; in ufs_mtk_hce_enable_notify()
222 if (hba->caps & UFSHCD_CAP_CRYPTO) in ufs_mtk_hce_enable_notify()
225 if (host->caps & UFS_MTK_CAP_DISABLE_AH8) { in ufs_mtk_hce_enable_notify()
228 hba->capabilities &= ~MASK_AUTO_HIBERN8_SUPPORT; in ufs_mtk_hce_enable_notify()
229 hba->ahit = 0; in ufs_mtk_hce_enable_notify()
247 struct device *dev = hba->dev; in ufs_mtk_bind_mphy()
248 struct device_node *np = dev->of_node; in ufs_mtk_bind_mphy()
251 host->mphy = devm_of_phy_get_by_index(dev, np, 0); in ufs_mtk_bind_mphy()
253 if (host->mphy == ERR_PTR(-EPROBE_DEFER)) { in ufs_mtk_bind_mphy()
258 err = -EPROBE_DEFER; in ufs_mtk_bind_mphy()
262 } else if (IS_ERR(host->mphy)) { in ufs_mtk_bind_mphy()
263 err = PTR_ERR(host->mphy); in ufs_mtk_bind_mphy()
264 if (err != -ENODEV) { in ufs_mtk_bind_mphy()
271 host->mphy = NULL; in ufs_mtk_bind_mphy()
276 if (err == -ENODEV) in ufs_mtk_bind_mphy()
289 if (host->ref_clk_enabled == on) in ufs_mtk_setup_ref_clk()
297 ufshcd_delay_us(host->ref_clk_gating_wait_us, 10); in ufs_mtk_setup_ref_clk()
314 dev_err(hba->dev, "missing ack of refclk req, reg: 0x%x\n", value); in ufs_mtk_setup_ref_clk()
316 ufs_mtk_ref_clk_notify(host->ref_clk_enabled, POST_CHANGE, res); in ufs_mtk_setup_ref_clk()
318 return -ETIMEDOUT; in ufs_mtk_setup_ref_clk()
321 host->ref_clk_enabled = on; in ufs_mtk_setup_ref_clk()
323 ufshcd_delay_us(host->ref_clk_ungating_wait_us, 10); in ufs_mtk_setup_ref_clk()
335 if (hba->dev_info.clk_gating_wait_us) { in ufs_mtk_setup_ref_clk_wait_us()
336 host->ref_clk_gating_wait_us = in ufs_mtk_setup_ref_clk_wait_us()
337 hba->dev_info.clk_gating_wait_us; in ufs_mtk_setup_ref_clk_wait_us()
339 host->ref_clk_gating_wait_us = gating_us; in ufs_mtk_setup_ref_clk_wait_us()
342 host->ref_clk_ungating_wait_us = REFCLK_DEFAULT_WAIT_US; in ufs_mtk_setup_ref_clk_wait_us()
349 if (((host->ip_ver >> 16) & 0xFF) >= 0x36) { in ufs_mtk_dbg_sel()
397 dev_info(hba->dev, "wait idle tmo: 0x%x\n", val); in ufs_mtk_wait_idle_state()
416 /* Sleep for max. 200us */ in ufs_mtk_wait_link_state()
420 return -ETIMEDOUT; in ufs_mtk_wait_link_state()
426 struct phy *mphy = host->mphy; in ufs_mtk_mphy_power_on()
430 if (!mphy || !(on ^ host->mphy_powered_on)) in ufs_mtk_mphy_power_on()
435 ret = regulator_enable(host->reg_va09); in ufs_mtk_mphy_power_on()
438 /* wait 200 us to stablize VA09 */ in ufs_mtk_mphy_power_on()
447 ret = regulator_disable(host->reg_va09); in ufs_mtk_mphy_power_on()
452 dev_info(hba->dev, in ufs_mtk_mphy_power_on()
457 host->mphy_powered_on = on; in ufs_mtk_mphy_power_on()
488 cfg = host->crypt; in ufs_mtk_boost_crypt()
489 volt = cfg->vcore_volt; in ufs_mtk_boost_crypt()
490 reg = cfg->reg_vcore; in ufs_mtk_boost_crypt()
492 ret = clk_prepare_enable(cfg->clk_crypt_mux); in ufs_mtk_boost_crypt()
494 dev_info(hba->dev, "clk_prepare_enable(): %d\n", in ufs_mtk_boost_crypt()
502 dev_info(hba->dev, in ufs_mtk_boost_crypt()
507 ret = clk_set_parent(cfg->clk_crypt_mux, in ufs_mtk_boost_crypt()
508 cfg->clk_crypt_perf); in ufs_mtk_boost_crypt()
510 dev_info(hba->dev, in ufs_mtk_boost_crypt()
516 ret = clk_set_parent(cfg->clk_crypt_mux, in ufs_mtk_boost_crypt()
517 cfg->clk_crypt_lp); in ufs_mtk_boost_crypt()
519 dev_info(hba->dev, in ufs_mtk_boost_crypt()
526 dev_info(hba->dev, in ufs_mtk_boost_crypt()
531 clk_disable_unprepare(cfg->clk_crypt_mux); in ufs_mtk_boost_crypt()
539 ret = ufs_mtk_get_host_clk(hba->dev, name, clk); in ufs_mtk_init_host_clk()
541 dev_info(hba->dev, "%s: failed to get %s: %d", __func__, in ufs_mtk_init_host_clk()
552 struct device *dev = hba->dev; in ufs_mtk_init_boost_crypt()
556 host->crypt = devm_kzalloc(dev, sizeof(*(host->crypt)), in ufs_mtk_init_boost_crypt()
558 if (!host->crypt) in ufs_mtk_init_boost_crypt()
561 reg = devm_regulator_get_optional(dev, "dvfsrc-vcore"); in ufs_mtk_init_boost_crypt()
563 dev_info(dev, "failed to get dvfsrc-vcore: %ld", in ufs_mtk_init_boost_crypt()
568 if (of_property_read_u32(dev->of_node, "boost-crypt-vcore-min", in ufs_mtk_init_boost_crypt()
570 dev_info(dev, "failed to get boost-crypt-vcore-min"); in ufs_mtk_init_boost_crypt()
574 cfg = host->crypt; in ufs_mtk_init_boost_crypt()
576 &cfg->clk_crypt_mux)) in ufs_mtk_init_boost_crypt()
580 &cfg->clk_crypt_lp)) in ufs_mtk_init_boost_crypt()
584 &cfg->clk_crypt_perf)) in ufs_mtk_init_boost_crypt()
587 cfg->reg_vcore = reg; in ufs_mtk_init_boost_crypt()
588 cfg->vcore_volt = volt; in ufs_mtk_init_boost_crypt()
589 host->caps |= UFS_MTK_CAP_BOOST_CRYPT_ENGINE; in ufs_mtk_init_boost_crypt()
599 host->reg_va09 = regulator_get(hba->dev, "va09"); in ufs_mtk_init_va09_pwr_ctrl()
600 if (IS_ERR(host->reg_va09)) in ufs_mtk_init_va09_pwr_ctrl()
601 dev_info(hba->dev, "failed to get va09"); in ufs_mtk_init_va09_pwr_ctrl()
603 host->caps |= UFS_MTK_CAP_VA09_PWR_CTRL; in ufs_mtk_init_va09_pwr_ctrl()
609 struct device_node *np = hba->dev->of_node; in ufs_mtk_init_host_caps()
611 if (of_property_read_bool(np, "mediatek,ufs-boost-crypt")) in ufs_mtk_init_host_caps()
614 if (of_property_read_bool(np, "mediatek,ufs-support-va09")) in ufs_mtk_init_host_caps()
617 if (of_property_read_bool(np, "mediatek,ufs-disable-ah8")) in ufs_mtk_init_host_caps()
618 host->caps |= UFS_MTK_CAP_DISABLE_AH8; in ufs_mtk_init_host_caps()
620 if (of_property_read_bool(np, "mediatek,ufs-broken-vcc")) in ufs_mtk_init_host_caps()
621 host->caps |= UFS_MTK_CAP_BROKEN_VCC; in ufs_mtk_init_host_caps()
623 if (of_property_read_bool(np, "mediatek,ufs-pmc-via-fastauto")) in ufs_mtk_init_host_caps()
624 host->caps |= UFS_MTK_CAP_PMC_VIA_FASTAUTO; in ufs_mtk_init_host_caps()
626 dev_info(hba->dev, "caps: 0x%x", host->caps); in ufs_mtk_init_host_caps()
633 if (!host || !host->pm_qos_init) in ufs_mtk_boost_pm_qos()
636 cpu_latency_qos_update_request(&host->pm_qos_req, in ufs_mtk_boost_pm_qos()
651 phy_power_on(host->mphy); in ufs_mtk_pwr_ctrl()
659 phy_power_off(host->mphy); in ufs_mtk_pwr_ctrl()
664 * ufs_mtk_setup_clocks - enables/disable clocks
669 * Return: 0 on success, non-zero on failure.
693 * Gate ref-clk and poweroff mphy if link state is in in ufs_mtk_setup_clocks()
694 * OFF or Hibern8 by either Auto-Hibern8 or in ufs_mtk_setup_clocks()
718 if (host->hw_ver.major) in ufs_mtk_get_controller_version()
722 host->hw_ver.major = 2; in ufs_mtk_get_controller_version()
727 host->hw_ver.major = 3; in ufs_mtk_get_controller_version()
732 if (hba->ufs_version < ufshci_version(3, 0)) in ufs_mtk_get_controller_version()
733 hba->ufs_version = ufshci_version(3, 0); in ufs_mtk_get_controller_version()
740 return hba->ufs_version; in ufs_mtk_get_ufs_hci_version()
744 * ufs_mtk_init_clocks - Init mtk driver private clocks
751 struct list_head *head = &hba->clk_list_head; in ufs_mtk_init_clocks()
752 struct ufs_mtk_clk *mclk = &host->mclk; in ufs_mtk_init_clocks()
761 if (!strcmp(clki->name, "ufs_sel")) { in ufs_mtk_init_clocks()
762 host->mclk.ufs_sel_clki = clki; in ufs_mtk_init_clocks()
763 } else if (!strcmp(clki->name, "ufs_sel_max_src")) { in ufs_mtk_init_clocks()
764 host->mclk.ufs_sel_max_clki = clki; in ufs_mtk_init_clocks()
765 clk_disable_unprepare(clki->clk); in ufs_mtk_init_clocks()
766 list_del(&clki->list); in ufs_mtk_init_clocks()
767 } else if (!strcmp(clki->name, "ufs_sel_min_src")) { in ufs_mtk_init_clocks()
768 host->mclk.ufs_sel_min_clki = clki; in ufs_mtk_init_clocks()
769 clk_disable_unprepare(clki->clk); in ufs_mtk_init_clocks()
770 list_del(&clki->list); in ufs_mtk_init_clocks()
774 if (!mclk->ufs_sel_clki || !mclk->ufs_sel_max_clki || in ufs_mtk_init_clocks()
775 !mclk->ufs_sel_min_clki) { in ufs_mtk_init_clocks()
776 hba->caps &= ~UFSHCD_CAP_CLK_SCALING; in ufs_mtk_init_clocks()
777 dev_info(hba->dev, in ufs_mtk_init_clocks()
778 "%s: Clk-scaling not ready. Feature disabled.", in ufs_mtk_init_clocks()
786 struct ufs_vreg_info *info = &hba->vreg_info; in ufs_mtk_vreg_fix_vcc()
787 struct device_node *np = hba->dev->of_node; in ufs_mtk_vreg_fix_vcc()
788 struct device *dev = hba->dev; in ufs_mtk_vreg_fix_vcc()
793 if (hba->vreg_info.vcc) in ufs_mtk_vreg_fix_vcc()
796 if (of_property_read_bool(np, "mediatek,ufs-vcc-by-num")) { in ufs_mtk_vreg_fix_vcc()
799 snprintf(vcc_name, MAX_VCC_NAME, "vcc-opt%lu", res.a1); in ufs_mtk_vreg_fix_vcc()
801 return -ENODEV; in ufs_mtk_vreg_fix_vcc()
802 } else if (of_property_read_bool(np, "mediatek,ufs-vcc-by-ver")) { in ufs_mtk_vreg_fix_vcc()
803 ver = (hba->dev_info.wspecversion & 0xF00) >> 8; in ufs_mtk_vreg_fix_vcc()
804 snprintf(vcc_name, MAX_VCC_NAME, "vcc-ufs%u", ver); in ufs_mtk_vreg_fix_vcc()
809 err = ufshcd_populate_vreg(dev, vcc_name, &info->vcc); in ufs_mtk_vreg_fix_vcc()
813 err = ufshcd_get_vreg(dev, info->vcc); in ufs_mtk_vreg_fix_vcc()
817 err = regulator_enable(info->vcc->reg); in ufs_mtk_vreg_fix_vcc()
819 info->vcc->enabled = true; in ufs_mtk_vreg_fix_vcc()
828 struct ufs_vreg_info *info = &hba->vreg_info; in ufs_mtk_vreg_fix_vccqx()
831 if (hba->dev_info.wspecversion >= 0x0300) { in ufs_mtk_vreg_fix_vccqx()
832 vreg_on = &info->vccq; in ufs_mtk_vreg_fix_vccqx()
833 vreg_off = &info->vccq2; in ufs_mtk_vreg_fix_vccqx()
835 vreg_on = &info->vccq2; in ufs_mtk_vreg_fix_vccqx()
836 vreg_off = &info->vccq; in ufs_mtk_vreg_fix_vccqx()
840 (*vreg_on)->always_on = true; in ufs_mtk_vreg_fix_vccqx()
843 regulator_disable((*vreg_off)->reg); in ufs_mtk_vreg_fix_vccqx()
844 devm_kfree(hba->dev, (*vreg_off)->name); in ufs_mtk_vreg_fix_vccqx()
845 devm_kfree(hba->dev, *vreg_off); in ufs_mtk_vreg_fix_vccqx()
857 host->mcq_nr_intr = UFSHCD_MAX_Q_NR; in ufs_mtk_init_mcq_irq()
858 pdev = container_of(hba->dev, struct platform_device, dev); in ufs_mtk_init_mcq_irq()
860 for (i = 0; i < host->mcq_nr_intr; i++) { in ufs_mtk_init_mcq_irq()
864 host->mcq_intr_info[i].irq = MTK_MCQ_INVALID_IRQ; in ufs_mtk_init_mcq_irq()
867 host->mcq_intr_info[i].hba = hba; in ufs_mtk_init_mcq_irq()
868 host->mcq_intr_info[i].irq = irq; in ufs_mtk_init_mcq_irq()
869 dev_info(hba->dev, "get platform mcq irq: %d, %d\n", i, irq); in ufs_mtk_init_mcq_irq()
875 for (i = 0; i < host->mcq_nr_intr; i++) in ufs_mtk_init_mcq_irq()
876 host->mcq_intr_info[i].irq = MTK_MCQ_INVALID_IRQ; in ufs_mtk_init_mcq_irq()
878 host->mcq_nr_intr = 0; in ufs_mtk_init_mcq_irq()
882 * ufs_mtk_init - find other essential mmio bases
888 * Return: -EPROBE_DEFER if binding fails, returns negative error
894 struct device *dev = hba->dev; in ufs_mtk_init()
900 err = -ENOMEM; in ufs_mtk_init()
905 host->hba = hba; in ufs_mtk_init()
910 err = -EINVAL; in ufs_mtk_init()
926 hba->caps |= UFSHCD_CAP_RPM_AUTOSUSPEND; in ufs_mtk_init()
928 /* Enable clock-gating */ in ufs_mtk_init()
929 hba->caps |= UFSHCD_CAP_CLK_GATING; in ufs_mtk_init()
932 hba->caps |= UFSHCD_CAP_CRYPTO; in ufs_mtk_init()
935 hba->caps |= UFSHCD_CAP_WB_EN; in ufs_mtk_init()
938 hba->caps |= UFSHCD_CAP_CLK_SCALING; in ufs_mtk_init()
940 hba->quirks |= UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL; in ufs_mtk_init()
941 hba->quirks |= UFSHCD_QUIRK_MCQ_BROKEN_INTR; in ufs_mtk_init()
942 hba->quirks |= UFSHCD_QUIRK_MCQ_BROKEN_RTC; in ufs_mtk_init()
943 hba->vps->wb_flush_threshold = UFS_WB_BUF_REMAIN_PERCENT(80); in ufs_mtk_init()
945 if (host->caps & UFS_MTK_CAP_DISABLE_AH8) in ufs_mtk_init()
946 hba->caps |= UFSHCD_CAP_HIBERN8_WITH_CLK_GATING; in ufs_mtk_init()
960 host->ip_ver = ufshcd_readl(hba, REG_UFS_MTK_IP_VER); in ufs_mtk_init()
962 /* Initialize pm-qos request */ in ufs_mtk_init()
963 cpu_latency_qos_add_request(&host->pm_qos_req, PM_QOS_DEFAULT_VALUE); in ufs_mtk_init()
964 host->pm_qos_init = true; in ufs_mtk_init()
980 if (dev_req_params->hs_rate == hba->pwr_info.hs_rate) in ufs_mtk_pmc_via_fastauto()
983 if (dev_req_params->pwr_tx != FAST_MODE && in ufs_mtk_pmc_via_fastauto()
984 dev_req_params->gear_tx < UFS_HS_G4) in ufs_mtk_pmc_via_fastauto()
987 if (dev_req_params->pwr_rx != FAST_MODE && in ufs_mtk_pmc_via_fastauto()
988 dev_req_params->gear_rx < UFS_HS_G4) in ufs_mtk_pmc_via_fastauto()
1022 dev_req_params->lane_tx); in ufs_mtk_pre_pwr_change()
1024 dev_req_params->lane_rx); in ufs_mtk_pre_pwr_change()
1026 dev_req_params->hs_rate); in ufs_mtk_pre_pwr_change()
1035 dev_err(hba->dev, "%s: HSG1B FASTAUTO failed ret=%d\n", in ufs_mtk_pre_pwr_change()
1040 if (host->hw_ver.major >= 3) { in ufs_mtk_pre_pwr_change()
1042 dev_req_params->gear_tx, in ufs_mtk_pre_pwr_change()
1064 ret = -EINVAL; in ufs_mtk_pwr_change_notify()
1081 * Forcibly set as non-LPM mode if UIC commands is failed in ufs_mtk_unipro_set_lpm()
1082 * to use default hba_enable_delay_us value for re-enabling in ufs_mtk_unipro_set_lpm()
1085 host->unipro_lpm = lpm; in ufs_mtk_unipro_set_lpm()
1128 if (ufshcd_is_auto_hibern8_supported(hba) && hba->ahit) in ufs_mtk_setup_clk_gating()
1130 hba->ahit); in ufs_mtk_setup_clk_gating()
1133 ufshcd_clkgate_delay_set(hba->dev, ah_ms + 5); in ufs_mtk_setup_clk_gating()
1144 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 10) | in ufs_mtk_post_link()
1163 ret = -EINVAL; in ufs_mtk_link_startup_notify()
1181 * more than or equal to 1us of positive or negative RST_n in ufs_mtk_device_reset()
1182 * pulse width. in ufs_mtk_device_reset()
1184 * To be on safe side, keep the reset low for at least 10us. in ufs_mtk_device_reset()
1193 dev_info(hba->dev, "device reset done\n"); in ufs_mtk_device_reset()
1216 if (!hba->mcq_enabled) { in ufs_mtk_link_set_hpm()
1221 ufshcd_mcq_config_mac(hba, hba->nutrs); in ufs_mtk_link_set_hpm()
1256 if (hba->vreg_info.vccq) in ufs_mtk_vccqx_set_lpm()
1257 vccqx = hba->vreg_info.vccq; in ufs_mtk_vccqx_set_lpm()
1259 vccqx = hba->vreg_info.vccq2; in ufs_mtk_vccqx_set_lpm()
1261 regulator_set_mode(vccqx->reg, in ufs_mtk_vccqx_set_lpm()
1270 (unsigned long)hba->dev_info.wspecversion, in ufs_mtk_vsx_set_lpm()
1276 if (!hba->vreg_info.vccq && !hba->vreg_info.vccq2) in ufs_mtk_dev_vreg_set_lpm()
1279 /* Skip if VCC is assumed always-on */ in ufs_mtk_dev_vreg_set_lpm()
1280 if (!hba->vreg_info.vcc) in ufs_mtk_dev_vreg_set_lpm()
1288 if (lpm && hba->vreg_info.vcc->enabled) in ufs_mtk_dev_vreg_set_lpm()
1304 /* disable auto-hibern8 */ in ufs_mtk_auto_hibern8_disable()
1307 /* wait host return to idle state when auto-hibern8 off */ in ufs_mtk_auto_hibern8_disable()
1312 dev_warn(hba->dev, "exit h8 state fail, ret=%d\n", ret); in ufs_mtk_auto_hibern8_disable()
1336 * ufshcd_suspend() re-enabling regulators while vreg is still in ufs_mtk_suspend()
1337 * in low-power mode. in ufs_mtk_suspend()
1357 return -EAGAIN; in ufs_mtk_suspend()
1365 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) in ufs_mtk_resume()
1395 REG_UFS_REJECT_MON - REG_UFS_MPHYCTRL + 4, in ufs_mtk_dbg_register_dump()
1405 struct ufs_dev_info *dev_info = &hba->dev_info; in ufs_mtk_apply_dev_quirks()
1406 u16 mid = dev_info->wmanufacturerid; in ufs_mtk_apply_dev_quirks()
1434 if (ufs_mtk_is_broken_vcc(hba) && hba->vreg_info.vcc && in ufs_mtk_fixup_dev_quirks()
1435 (hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_AFTER_LPM)) { in ufs_mtk_fixup_dev_quirks()
1436 hba->vreg_info.vcc->always_on = true; in ufs_mtk_fixup_dev_quirks()
1438 * VCC will be kept always-on thus we don't in ufs_mtk_fixup_dev_quirks()
1439 * need any delay during regulator operations in ufs_mtk_fixup_dev_quirks()
1441 hba->dev_quirks &= ~(UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM | in ufs_mtk_fixup_dev_quirks()
1460 dev_info(hba->dev, in ufs_mtk_event_notify()
1468 dev_info(hba->dev, "%s\n", ufs_uic_pa_err_str[bit]); in ufs_mtk_event_notify()
1473 dev_info(hba->dev, "%s\n", ufs_uic_dl_err_str[bit]); in ufs_mtk_event_notify()
1482 hba->clk_scaling.min_gear = UFS_HS_G4; in ufs_mtk_config_scaling_param()
1484 hba->vps->devfreq_profile.polling_ms = 200; in ufs_mtk_config_scaling_param()
1485 hba->vps->ondemand_data.upthreshold = 50; in ufs_mtk_config_scaling_param()
1486 hba->vps->ondemand_data.downdifferential = 20; in ufs_mtk_config_scaling_param()
1490 * ufs_mtk_clk_scale - Internal clk scaling operation
1504 struct ufs_mtk_clk *mclk = &host->mclk; in ufs_mtk_clk_scale()
1505 struct ufs_clk_info *clki = mclk->ufs_sel_clki; in ufs_mtk_clk_scale()
1508 ret = clk_prepare_enable(clki->clk); in ufs_mtk_clk_scale()
1510 dev_info(hba->dev, in ufs_mtk_clk_scale()
1516 ret = clk_set_parent(clki->clk, mclk->ufs_sel_max_clki->clk); in ufs_mtk_clk_scale()
1517 clki->curr_freq = clki->max_freq; in ufs_mtk_clk_scale()
1519 ret = clk_set_parent(clki->clk, mclk->ufs_sel_min_clki->clk); in ufs_mtk_clk_scale()
1520 clki->curr_freq = clki->min_freq; in ufs_mtk_clk_scale()
1524 dev_info(hba->dev, in ufs_mtk_clk_scale()
1528 clk_disable_unprepare(clki->clk); in ufs_mtk_clk_scale()
1530 trace_ufs_mtk_clk_scale(clki->name, scale_up, clk_get_rate(clki->clk)); in ufs_mtk_clk_scale()
1560 hba->mcq_opr[OPR_SQD].offset = REG_UFS_MTK_SQD; in ufs_mtk_op_runtime_config()
1561 hba->mcq_opr[OPR_SQIS].offset = REG_UFS_MTK_SQIS; in ufs_mtk_op_runtime_config()
1562 hba->mcq_opr[OPR_CQD].offset = REG_UFS_MTK_CQD; in ufs_mtk_op_runtime_config()
1563 hba->mcq_opr[OPR_CQIS].offset = REG_UFS_MTK_CQIS; in ufs_mtk_op_runtime_config()
1566 opr = &hba->mcq_opr[i]; in ufs_mtk_op_runtime_config()
1567 opr->stride = REG_UFS_MCQ_STRIDE; in ufs_mtk_op_runtime_config()
1568 opr->base = hba->mmio_base + opr->offset; in ufs_mtk_op_runtime_config()
1579 if (!host->mcq_nr_intr) { in ufs_mtk_mcq_config_resource()
1580 dev_info(hba->dev, "IRQs not ready. MCQ disabled."); in ufs_mtk_mcq_config_resource()
1581 return -EINVAL; in ufs_mtk_mcq_config_resource()
1584 hba->mcq_base = hba->mmio_base + MCQ_QUEUE_OFFSET(hba->mcq_capabilities); in ufs_mtk_mcq_config_resource()
1591 struct ufs_hba *hba = mcq_intr_info->hba; in ufs_mtk_mcq_intr()
1594 int qid = mcq_intr_info->qid; in ufs_mtk_mcq_intr()
1596 hwq = &hba->uhq[qid]; in ufs_mtk_mcq_intr()
1614 for (i = 0; i < host->mcq_nr_intr; i++) { in ufs_mtk_config_mcq_irq()
1615 irq = host->mcq_intr_info[i].irq; in ufs_mtk_config_mcq_irq()
1617 dev_err(hba->dev, "invalid irq. %d\n", i); in ufs_mtk_config_mcq_irq()
1618 return -ENOPARAM; in ufs_mtk_config_mcq_irq()
1621 host->mcq_intr_info[i].qid = i; in ufs_mtk_config_mcq_irq()
1622 ret = devm_request_irq(hba->dev, irq, ufs_mtk_mcq_intr, 0, UFSHCD, in ufs_mtk_config_mcq_irq()
1623 &host->mcq_intr_info[i]); in ufs_mtk_config_mcq_irq()
1625 dev_dbg(hba->dev, "request irq %d intr %s\n", irq, ret ? "failed" : ""); in ufs_mtk_config_mcq_irq()
1628 dev_err(hba->dev, "Cannot request irq %d\n", ret); in ufs_mtk_config_mcq_irq()
1641 if (!host->mcq_set_intr) { in ufs_mtk_config_mcq()
1651 host->mcq_set_intr = true; in ufs_mtk_config_mcq()
1666 * struct ufs_hba_mtk_vops - UFS MTK specific variant operations
1696 * ufs_mtk_probe - probe routine of the driver
1699 * Return: zero for success and non-zero for failure.
1704 struct device *dev = &pdev->dev; in ufs_mtk_probe()
1710 "ti,syscon-reset"); in ufs_mtk_probe()
1712 dev_notice(dev, "find ti,syscon-reset fail\n"); in ufs_mtk_probe()
1720 link = device_link_add(dev, &reset_pdev->dev, in ufs_mtk_probe()
1722 put_device(&reset_pdev->dev); in ufs_mtk_probe()
1728 if (link->status == DL_STATE_DORMANT) { in ufs_mtk_probe()
1729 err = -EPROBE_DEFER; in ufs_mtk_probe()
1746 * ufs_mtk_remove - set driver_data of the device to NULL
1755 pm_runtime_get_sync(&(pdev)->dev); in ufs_mtk_remove()
1823 .name = "ufshcd-mtk",