Lines Matching +full:one +full:- +full:to +full:- +full:one
1 // SPDX-License-Identifier: GPL-2.0+
3 * SC16IS7xx tty serial driver - Copyright (C) 2014 GridPoint
47 * - only on 75x/76x
50 * - only on 75x/76x
53 * - only on 75x/76x
56 * - only on 75x/76x
84 /* IER register bits - write only if (EFR[4] == 1) */
97 /* FCR register bits - write only if (EFR[4] == 1) */
107 #define SC16IS7XX_IIR_RTOI_SRC 0x0c /* RX time-out interrupt */
109 * - only on 75x/76x
112 * - only on 75x/76x
117 * to inactive (HIGH)
124 * 00 -> 5 bit words
125 * 01 -> 6 bit words
126 * 10 -> 7 bit words
127 * 11 -> 8 bit words
132 * 0 -> 1 stop bit
133 * 1 -> 1-1.5 stop bits if
139 #define SC16IS7XX_LCR_FORCEPARITY_BIT (1 << 5) /* 9-bit multidrop parity */
153 * - only on 75x/76x
159 * - write enabled
163 * - write enabled
167 * - write enabled
183 #define SC16IS7XX_MSR_DCTS_BIT (1 << 0) /* Delta CTS Clear To Send */
186 * - only on 75x/76x
190 * - only on 75x/76x
194 * - only on 75x/76x
198 * - only on 75x/76x
201 * - only on 75x/76x
204 * - only on 75x/76x
210 * TCR trigger levels are available from 0 to 60 characters with a granularity
213 * no built-in hardware check to make sure this condition is met. Also, the TCR
215 * control is enabled to avoid spurious operation of the device.
224 * trigger levels. Trigger levels from 4 characters to 60 characters are
228 * trigger level setting defined in FCR. If TLR has non-zero trigger level value
229 * the trigger level defined in FCR is discarded. This applies to both transmit
245 #define SC16IS7XX_EFCR_9BIT_MODE_BIT (1 << 0) /* Enable 9-bit or Multidrop
253 * - Only 750/760
255 * - Only 760
263 * and writing to IER[7:4],
270 * 00 -> no transmitter flow
272 * 01 -> transmitter generates
274 * 10 -> transmitter generates
276 * 11 -> transmitter generates
284 * 00 -> no received flow
286 * 01 -> receiver compares
288 * 10 -> receiver compares
290 * 11 -> receiver compares
366 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_port_read() local
369 regmap_read(one->regmap, reg, &val); in sc16is7xx_port_read()
376 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_port_write() local
378 regmap_write(one->regmap, reg, val); in sc16is7xx_port_write()
383 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_fifo_read()
384 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_fifo_read() local
386 regmap_noinc_read(one->regmap, SC16IS7XX_RHR_REG, s->buf, rxlen); in sc16is7xx_fifo_read()
391 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_fifo_write()
392 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_fifo_write() local
395 * Don't send zero-length data, at least on SPI it confuses the chip in sc16is7xx_fifo_write()
401 regmap_noinc_write(one->regmap, SC16IS7XX_THR_REG, s->buf, to_send); in sc16is7xx_fifo_write()
407 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_port_update() local
409 regmap_update_bits(one->regmap, reg, mask, val); in sc16is7xx_port_update()
486 * Configure programmable baud rate generator (divisor) according to the
489 * From the datasheet, the divisor is computed according to:
492 * -----------------------
494 * divisor = ---------------------------
495 * baud-rate x sampling-rate
499 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_set_baud() local
502 unsigned long clk = port->uartclk, div = clk / 16 / baud; in sc16is7xx_set_baud()
511 * switched in by writing a magic value (0xbf) to the Line Control in sc16is7xx_set_baud()
513 * where it expects the IIR to be, leading to "Unexpected interrupt" in sc16is7xx_set_baud()
518 * This is similar to disabling the interrupt, but that doesn't work in sc16is7xx_set_baud()
522 mutex_lock(&one->efr_lock); in sc16is7xx_set_baud()
531 regcache_cache_bypass(one->regmap, true); in sc16is7xx_set_baud()
536 regcache_cache_bypass(one->regmap, false); in sc16is7xx_set_baud()
538 /* Put LCR back to the normal mode */ in sc16is7xx_set_baud()
541 mutex_unlock(&one->efr_lock); in sc16is7xx_set_baud()
548 mutex_lock(&one->efr_lock); in sc16is7xx_set_baud()
555 regcache_cache_bypass(one->regmap, true); in sc16is7xx_set_baud()
558 regcache_cache_bypass(one->regmap, false); in sc16is7xx_set_baud()
560 /* Put LCR back to the normal mode */ in sc16is7xx_set_baud()
563 mutex_unlock(&one->efr_lock); in sc16is7xx_set_baud()
571 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_handle_rx()
576 if (unlikely(rxlen >= sizeof(s->buf))) { in sc16is7xx_handle_rx()
577 dev_warn_ratelimited(port->dev, in sc16is7xx_handle_rx()
579 port->line, rxlen); in sc16is7xx_handle_rx()
580 port->icount.buf_overrun++; in sc16is7xx_handle_rx()
582 rxlen = sizeof(s->buf); in sc16is7xx_handle_rx()
595 s->buf[0] = sc16is7xx_port_read(port, SC16IS7XX_RHR_REG); in sc16is7xx_handle_rx()
604 port->icount.rx++; in sc16is7xx_handle_rx()
609 port->icount.brk++; in sc16is7xx_handle_rx()
613 port->icount.parity++; in sc16is7xx_handle_rx()
615 port->icount.frame++; in sc16is7xx_handle_rx()
617 port->icount.overrun++; in sc16is7xx_handle_rx()
619 lsr &= port->read_status_mask; in sc16is7xx_handle_rx()
631 ch = s->buf[i]; in sc16is7xx_handle_rx()
635 if (lsr & port->ignore_status_mask) in sc16is7xx_handle_rx()
641 rxlen -= bytes_read; in sc16is7xx_handle_rx()
644 tty_flip_buffer_push(&port->state->port); in sc16is7xx_handle_rx()
649 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_handle_tx()
650 struct circ_buf *xmit = &port->state->xmit; in sc16is7xx_handle_tx()
654 if (unlikely(port->x_char)) { in sc16is7xx_handle_tx()
655 sc16is7xx_port_write(port, SC16IS7XX_THR_REG, port->x_char); in sc16is7xx_handle_tx()
656 port->icount.tx++; in sc16is7xx_handle_tx()
657 port->x_char = 0; in sc16is7xx_handle_tx()
671 /* Limit to size of TX FIFO */ in sc16is7xx_handle_tx()
674 dev_err_ratelimited(port->dev, in sc16is7xx_handle_tx()
681 /* Convert to linear buffer */ in sc16is7xx_handle_tx()
683 s->buf[i] = xmit->buf[xmit->tail]; in sc16is7xx_handle_tx()
713 static void sc16is7xx_update_mlines(struct sc16is7xx_one *one) in sc16is7xx_update_mlines() argument
715 struct uart_port *port = &one->port; in sc16is7xx_update_mlines()
719 lockdep_assert_held_once(&one->efr_lock); in sc16is7xx_update_mlines()
722 changed = status ^ one->old_mctrl; in sc16is7xx_update_mlines()
727 one->old_mctrl = status; in sc16is7xx_update_mlines()
731 port->icount.rng++; in sc16is7xx_update_mlines()
733 port->icount.dsr++; in sc16is7xx_update_mlines()
739 wake_up_interruptible(&port->state->port.delta_msr_wait); in sc16is7xx_update_mlines()
747 struct uart_port *port = &s->p[portno].port; in sc16is7xx_port_irq()
748 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_port_irq() local
750 mutex_lock(&one->efr_lock); in sc16is7xx_port_irq()
769 * time-out interrupt but no data in the FIFO. This is in sc16is7xx_port_irq()
772 * When this happens, read one byte from the FIFO to in sc16is7xx_port_irq()
784 sc16is7xx_update_mlines(one); in sc16is7xx_port_irq()
790 dev_err_ratelimited(port->dev, in sc16is7xx_port_irq()
792 port->line, iir); in sc16is7xx_port_irq()
797 mutex_unlock(&one->efr_lock); in sc16is7xx_port_irq()
813 for (i = 0; i < s->devtype->nr_uart; ++i) in sc16is7xx_irq()
822 struct uart_port *port = &(to_sc16is7xx_one(ws, tx_work)->port); in sc16is7xx_tx_proc()
823 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_tx_proc() local
825 if ((port->rs485.flags & SER_RS485_ENABLED) && in sc16is7xx_tx_proc()
826 (port->rs485.delay_rts_before_send > 0)) in sc16is7xx_tx_proc()
827 msleep(port->rs485.delay_rts_before_send); in sc16is7xx_tx_proc()
829 mutex_lock(&one->efr_lock); in sc16is7xx_tx_proc()
831 mutex_unlock(&one->efr_lock); in sc16is7xx_tx_proc()
839 struct serial_rs485 *rs485 = &port->rs485; in sc16is7xx_reconf_rs485()
843 if (rs485->flags & SER_RS485_ENABLED) { in sc16is7xx_reconf_rs485()
846 if (rs485->flags & SER_RS485_RTS_AFTER_SEND) in sc16is7xx_reconf_rs485()
856 struct sc16is7xx_one *one = to_sc16is7xx_one(ws, reg_work); in sc16is7xx_reg_proc() local
860 uart_port_lock_irqsave(&one->port, &irqflags); in sc16is7xx_reg_proc()
861 config = one->config; in sc16is7xx_reg_proc()
862 memset(&one->config, 0, sizeof(one->config)); in sc16is7xx_reg_proc()
863 uart_port_unlock_irqrestore(&one->port, irqflags); in sc16is7xx_reg_proc()
869 if (one->port.mctrl & TIOCM_RTS) in sc16is7xx_reg_proc()
872 if (one->port.mctrl & TIOCM_DTR) in sc16is7xx_reg_proc()
875 if (one->port.mctrl & TIOCM_LOOP) in sc16is7xx_reg_proc()
877 sc16is7xx_port_update(&one->port, SC16IS7XX_MCR_REG, in sc16is7xx_reg_proc()
885 sc16is7xx_port_update(&one->port, SC16IS7XX_IER_REG, in sc16is7xx_reg_proc()
889 sc16is7xx_reconf_rs485(&one->port); in sc16is7xx_reg_proc()
894 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_ier_clear()
895 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_ier_clear() local
897 lockdep_assert_held_once(&port->lock); in sc16is7xx_ier_clear()
899 one->config.flags |= SC16IS7XX_RECONF_IER; in sc16is7xx_ier_clear()
900 one->config.ier_mask |= bit; in sc16is7xx_ier_clear()
901 one->config.ier_val &= ~bit; in sc16is7xx_ier_clear()
902 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_ier_clear()
907 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_ier_set()
908 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_ier_set() local
910 lockdep_assert_held_once(&port->lock); in sc16is7xx_ier_set()
912 one->config.flags |= SC16IS7XX_RECONF_IER; in sc16is7xx_ier_set()
913 one->config.ier_mask |= bit; in sc16is7xx_ier_set()
914 one->config.ier_val |= bit; in sc16is7xx_ier_set()
915 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_ier_set()
930 struct sc16is7xx_one *one = to_sc16is7xx_one(ws, ms_work.work); in sc16is7xx_ms_proc() local
931 struct sc16is7xx_port *s = dev_get_drvdata(one->port.dev); in sc16is7xx_ms_proc()
933 if (one->port.state) { in sc16is7xx_ms_proc()
934 mutex_lock(&one->efr_lock); in sc16is7xx_ms_proc()
935 sc16is7xx_update_mlines(one); in sc16is7xx_ms_proc()
936 mutex_unlock(&one->efr_lock); in sc16is7xx_ms_proc()
938 kthread_queue_delayed_work(&s->kworker, &one->ms_work, HZ); in sc16is7xx_ms_proc()
944 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_enable_ms() local
945 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_enable_ms()
947 lockdep_assert_held_once(&port->lock); in sc16is7xx_enable_ms()
949 kthread_queue_delayed_work(&s->kworker, &one->ms_work, 0); in sc16is7xx_enable_ms()
954 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_start_tx()
955 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_start_tx() local
957 kthread_queue_work(&s->kworker, &one->tx_work); in sc16is7xx_start_tx()
967 * AutoRTS feature will de-activate RTS output. in sc16is7xx_throttle()
994 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_get_mctrl() local
997 return one->old_mctrl; in sc16is7xx_get_mctrl()
1002 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_set_mctrl()
1003 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_set_mctrl() local
1005 one->config.flags |= SC16IS7XX_RECONF_MD; in sc16is7xx_set_mctrl()
1006 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_set_mctrl()
1020 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_set_termios() local
1025 kthread_cancel_delayed_work_sync(&one->ms_work); in sc16is7xx_set_termios()
1028 termios->c_cflag &= ~CMSPAR; in sc16is7xx_set_termios()
1031 switch (termios->c_cflag & CSIZE) { in sc16is7xx_set_termios()
1046 termios->c_cflag &= ~CSIZE; in sc16is7xx_set_termios()
1047 termios->c_cflag |= CS8; in sc16is7xx_set_termios()
1052 if (termios->c_cflag & PARENB) { in sc16is7xx_set_termios()
1054 if (!(termios->c_cflag & PARODD)) in sc16is7xx_set_termios()
1059 if (termios->c_cflag & CSTOPB) in sc16is7xx_set_termios()
1063 port->read_status_mask = SC16IS7XX_LSR_OE_BIT; in sc16is7xx_set_termios()
1064 if (termios->c_iflag & INPCK) in sc16is7xx_set_termios()
1065 port->read_status_mask |= SC16IS7XX_LSR_PE_BIT | in sc16is7xx_set_termios()
1067 if (termios->c_iflag & (BRKINT | PARMRK)) in sc16is7xx_set_termios()
1068 port->read_status_mask |= SC16IS7XX_LSR_BI_BIT; in sc16is7xx_set_termios()
1071 port->ignore_status_mask = 0; in sc16is7xx_set_termios()
1072 if (termios->c_iflag & IGNBRK) in sc16is7xx_set_termios()
1073 port->ignore_status_mask |= SC16IS7XX_LSR_BI_BIT; in sc16is7xx_set_termios()
1074 if (!(termios->c_cflag & CREAD)) in sc16is7xx_set_termios()
1075 port->ignore_status_mask |= SC16IS7XX_LSR_BRK_ERROR_MASK; in sc16is7xx_set_termios()
1078 mutex_lock(&one->efr_lock); in sc16is7xx_set_termios()
1084 regcache_cache_bypass(one->regmap, true); in sc16is7xx_set_termios()
1085 sc16is7xx_port_write(port, SC16IS7XX_XON1_REG, termios->c_cc[VSTART]); in sc16is7xx_set_termios()
1086 sc16is7xx_port_write(port, SC16IS7XX_XOFF1_REG, termios->c_cc[VSTOP]); in sc16is7xx_set_termios()
1088 port->status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS); in sc16is7xx_set_termios()
1089 if (termios->c_cflag & CRTSCTS) { in sc16is7xx_set_termios()
1092 port->status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; in sc16is7xx_set_termios()
1094 if (termios->c_iflag & IXON) in sc16is7xx_set_termios()
1096 if (termios->c_iflag & IXOFF) in sc16is7xx_set_termios()
1103 regcache_cache_bypass(one->regmap, false); in sc16is7xx_set_termios()
1108 mutex_unlock(&one->efr_lock); in sc16is7xx_set_termios()
1112 port->uartclk / 16 / 4 / 0xffff, in sc16is7xx_set_termios()
1113 port->uartclk / 16); in sc16is7xx_set_termios()
1120 /* Update timeout according to new baud rate */ in sc16is7xx_set_termios()
1121 uart_update_timeout(port, termios->c_cflag, baud); in sc16is7xx_set_termios()
1123 if (UART_ENABLE_MS(port, termios->c_cflag)) in sc16is7xx_set_termios()
1132 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_config_rs485()
1133 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_config_rs485() local
1135 if (rs485->flags & SER_RS485_ENABLED) { in sc16is7xx_config_rs485()
1138 * However, it's sometimes useful to delay TX even without RTS in sc16is7xx_config_rs485()
1139 * control therefore we try to handle .delay_rts_before_send. in sc16is7xx_config_rs485()
1141 if (rs485->delay_rts_after_send) in sc16is7xx_config_rs485()
1142 return -EINVAL; in sc16is7xx_config_rs485()
1145 one->config.flags |= SC16IS7XX_RECONF_RS485; in sc16is7xx_config_rs485()
1146 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_config_rs485()
1153 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_startup() local
1170 regcache_cache_bypass(one->regmap, true); in sc16is7xx_startup()
1172 /* Enable write access to enhanced features and internal clock div */ in sc16is7xx_startup()
1188 regcache_cache_bypass(one->regmap, false); in sc16is7xx_startup()
1197 one->irda_mode ? in sc16is7xx_startup()
1221 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_shutdown()
1222 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_shutdown() local
1224 kthread_cancel_delayed_work_sync(&one->ms_work); in sc16is7xx_shutdown()
1237 kthread_flush_worker(&s->kworker); in sc16is7xx_shutdown()
1242 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_type()
1244 return (port->type == PORT_SC16IS7XX) ? s->devtype->name : NULL; in sc16is7xx_type()
1256 port->type = PORT_SC16IS7XX; in sc16is7xx_config_port()
1262 if ((s->type != PORT_UNKNOWN) && (s->type != PORT_SC16IS7XX)) in sc16is7xx_verify_port()
1263 return -EINVAL; in sc16is7xx_verify_port()
1264 if (s->irq != port->irq) in sc16is7xx_verify_port()
1265 return -EINVAL; in sc16is7xx_verify_port()
1308 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_get()
1318 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_set()
1328 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_direction_input()
1339 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_direction_output()
1349 * transferred to the corresponding I/O pin. in sc16is7xx_gpio_direction_output()
1350 * The datasheet states that each register bit will be transferred to in sc16is7xx_gpio_direction_output()
1351 * the corresponding I/O pin programmed as output when writing to in sc16is7xx_gpio_direction_output()
1368 *valid_mask = s->gpio_valid_mask; in sc16is7xx_gpio_init_valid_mask()
1375 struct device *dev = s->p[0].port.dev; in sc16is7xx_setup_gpio_chip()
1377 if (!s->devtype->nr_gpio) in sc16is7xx_setup_gpio_chip()
1380 switch (s->mctrl_mask) { in sc16is7xx_setup_gpio_chip()
1382 s->gpio_valid_mask = GENMASK(7, 0); in sc16is7xx_setup_gpio_chip()
1385 s->gpio_valid_mask = GENMASK(3, 0); in sc16is7xx_setup_gpio_chip()
1388 s->gpio_valid_mask = GENMASK(7, 4); in sc16is7xx_setup_gpio_chip()
1394 if (s->gpio_valid_mask == 0) in sc16is7xx_setup_gpio_chip()
1397 s->gpio.owner = THIS_MODULE; in sc16is7xx_setup_gpio_chip()
1398 s->gpio.parent = dev; in sc16is7xx_setup_gpio_chip()
1399 s->gpio.label = dev_name(dev); in sc16is7xx_setup_gpio_chip()
1400 s->gpio.init_valid_mask = sc16is7xx_gpio_init_valid_mask; in sc16is7xx_setup_gpio_chip()
1401 s->gpio.direction_input = sc16is7xx_gpio_direction_input; in sc16is7xx_setup_gpio_chip()
1402 s->gpio.get = sc16is7xx_gpio_get; in sc16is7xx_setup_gpio_chip()
1403 s->gpio.direction_output = sc16is7xx_gpio_direction_output; in sc16is7xx_setup_gpio_chip()
1404 s->gpio.set = sc16is7xx_gpio_set; in sc16is7xx_setup_gpio_chip()
1405 s->gpio.base = -1; in sc16is7xx_setup_gpio_chip()
1406 s->gpio.ngpio = s->devtype->nr_gpio; in sc16is7xx_setup_gpio_chip()
1407 s->gpio.can_sleep = 1; in sc16is7xx_setup_gpio_chip()
1409 return gpiochip_add_data(&s->gpio, s); in sc16is7xx_setup_gpio_chip()
1414 * Configure ports designated to operate as modem control lines.
1423 struct device *dev = s->p[0].port.dev; in sc16is7xx_setup_mctrl_ports()
1425 count = device_property_count_u32(dev, "nxp,modem-control-line-ports"); in sc16is7xx_setup_mctrl_ports()
1429 ret = device_property_read_u32_array(dev, "nxp,modem-control-line-ports", in sc16is7xx_setup_mctrl_ports()
1434 s->mctrl_mask = 0; in sc16is7xx_setup_mctrl_ports()
1439 s->mctrl_mask |= SC16IS7XX_IOCONTROL_MODEM_A_BIT; in sc16is7xx_setup_mctrl_ports()
1441 s->mctrl_mask |= SC16IS7XX_IOCONTROL_MODEM_B_BIT; in sc16is7xx_setup_mctrl_ports()
1444 if (s->mctrl_mask) in sc16is7xx_setup_mctrl_ports()
1449 SC16IS7XX_IOCONTROL_MODEM_B_BIT, s->mctrl_mask); in sc16is7xx_setup_mctrl_ports()
1457 .delay_rts_after_send = 1, /* Not supported but keep returning -EINVAL */
1470 for (i = 0; i < devtype->nr_uart; i++) in sc16is7xx_probe()
1476 * tell us if we are really connected to the correct device. in sc16is7xx_probe()
1477 * The best we can do is to check if communication is at all possible. in sc16is7xx_probe()
1479 * Note: regmap[0] is used in the probe function to access registers in sc16is7xx_probe()
1480 * common to all channels/ports, as it is guaranteed to be present on in sc16is7xx_probe()
1485 return -EPROBE_DEFER; in sc16is7xx_probe()
1488 s = devm_kzalloc(dev, struct_size(s, p, devtype->nr_uart), GFP_KERNEL); in sc16is7xx_probe()
1491 return -ENOMEM; in sc16is7xx_probe()
1495 device_property_read_u32(dev, "clock-frequency", &uartclk); in sc16is7xx_probe()
1497 s->clk = devm_clk_get_optional(dev, NULL); in sc16is7xx_probe()
1498 if (IS_ERR(s->clk)) in sc16is7xx_probe()
1499 return PTR_ERR(s->clk); in sc16is7xx_probe()
1501 ret = clk_prepare_enable(s->clk); in sc16is7xx_probe()
1505 freq = clk_get_rate(s->clk); in sc16is7xx_probe()
1514 return -EINVAL; in sc16is7xx_probe()
1517 s->devtype = devtype; in sc16is7xx_probe()
1520 kthread_init_worker(&s->kworker); in sc16is7xx_probe()
1521 s->kworker_task = kthread_run(kthread_worker_fn, &s->kworker, in sc16is7xx_probe()
1523 if (IS_ERR(s->kworker_task)) { in sc16is7xx_probe()
1524 ret = PTR_ERR(s->kworker_task); in sc16is7xx_probe()
1527 sched_set_fifo(s->kworker_task); in sc16is7xx_probe()
1533 for (i = 0; i < devtype->nr_uart; ++i) { in sc16is7xx_probe()
1534 s->p[i].port.line = find_first_zero_bit(&sc16is7xx_lines, in sc16is7xx_probe()
1536 if (s->p[i].port.line >= SC16IS7XX_MAX_DEVS) { in sc16is7xx_probe()
1537 ret = -ERANGE; in sc16is7xx_probe()
1542 s->p[i].port.dev = dev; in sc16is7xx_probe()
1543 s->p[i].port.irq = irq; in sc16is7xx_probe()
1544 s->p[i].port.type = PORT_SC16IS7XX; in sc16is7xx_probe()
1545 s->p[i].port.fifosize = SC16IS7XX_FIFO_SIZE; in sc16is7xx_probe()
1546 s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY; in sc16is7xx_probe()
1547 s->p[i].port.iobase = i; in sc16is7xx_probe()
1549 * Use all ones as membase to make sure uart_configure_port() in in sc16is7xx_probe()
1553 s->p[i].port.membase = (void __iomem *)~0; in sc16is7xx_probe()
1554 s->p[i].port.iotype = UPIO_PORT; in sc16is7xx_probe()
1555 s->p[i].port.uartclk = freq; in sc16is7xx_probe()
1556 s->p[i].port.rs485_config = sc16is7xx_config_rs485; in sc16is7xx_probe()
1557 s->p[i].port.rs485_supported = sc16is7xx_rs485_supported; in sc16is7xx_probe()
1558 s->p[i].port.ops = &sc16is7xx_ops; in sc16is7xx_probe()
1559 s->p[i].old_mctrl = 0; in sc16is7xx_probe()
1560 s->p[i].regmap = regmaps[i]; in sc16is7xx_probe()
1562 mutex_init(&s->p[i].efr_lock); in sc16is7xx_probe()
1564 ret = uart_get_rs485_mode(&s->p[i].port); in sc16is7xx_probe()
1569 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_IER_REG, 0); in sc16is7xx_probe()
1571 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFCR_REG, in sc16is7xx_probe()
1576 kthread_init_work(&s->p[i].tx_work, sc16is7xx_tx_proc); in sc16is7xx_probe()
1577 kthread_init_work(&s->p[i].reg_work, sc16is7xx_reg_proc); in sc16is7xx_probe()
1578 kthread_init_delayed_work(&s->p[i].ms_work, sc16is7xx_ms_proc); in sc16is7xx_probe()
1581 ret = uart_add_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_probe()
1585 set_bit(s->p[i].port.line, &sc16is7xx_lines); in sc16is7xx_probe()
1588 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, in sc16is7xx_probe()
1593 /* Enable write access to enhanced features */ in sc16is7xx_probe()
1594 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFR_REG, in sc16is7xx_probe()
1599 /* Restore access to general registers */ in sc16is7xx_probe()
1600 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, 0x00); in sc16is7xx_probe()
1602 /* Go to suspend mode */ in sc16is7xx_probe()
1603 sc16is7xx_power(&s->p[i].port, 0); in sc16is7xx_probe()
1606 if (dev->of_node) { in sc16is7xx_probe()
1611 of_property_for_each_u32(dev->of_node, "irda-mode-ports", in sc16is7xx_probe()
1613 if (u < devtype->nr_uart) in sc16is7xx_probe()
1614 s->p[u].irda_mode = true; in sc16is7xx_probe()
1628 * Setup interrupt. We first try to acquire the IRQ line as level IRQ. in sc16is7xx_probe()
1631 * back to a non-shared falling-edge trigger. in sc16is7xx_probe()
1647 if (s->gpio_valid_mask) in sc16is7xx_probe()
1648 gpiochip_remove(&s->gpio); in sc16is7xx_probe()
1652 for (i = 0; i < devtype->nr_uart; i++) in sc16is7xx_probe()
1653 if (test_and_clear_bit(s->p[i].port.line, &sc16is7xx_lines)) in sc16is7xx_probe()
1654 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_probe()
1656 kthread_stop(s->kworker_task); in sc16is7xx_probe()
1659 clk_disable_unprepare(s->clk); in sc16is7xx_probe()
1670 if (s->gpio_valid_mask) in sc16is7xx_remove()
1671 gpiochip_remove(&s->gpio); in sc16is7xx_remove()
1674 for (i = 0; i < s->devtype->nr_uart; i++) { in sc16is7xx_remove()
1675 kthread_cancel_delayed_work_sync(&s->p[i].ms_work); in sc16is7xx_remove()
1676 if (test_and_clear_bit(s->p[i].port.line, &sc16is7xx_lines)) in sc16is7xx_remove()
1677 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_remove()
1678 sc16is7xx_power(&s->p[i].port, 0); in sc16is7xx_remove()
1681 kthread_flush_worker(&s->kworker); in sc16is7xx_remove()
1682 kthread_stop(s->kworker_task); in sc16is7xx_remove()
1684 clk_disable_unprepare(s->clk); in sc16is7xx_remove()
1738 spi->bits_per_word = 8; in sc16is7xx_spi_probe()
1740 if ((spi->mode & SPI_MODE_X_MASK) != SPI_MODE_0) in sc16is7xx_spi_probe()
1741 return dev_err_probe(&spi->dev, -EINVAL, "Unsupported SPI mode\n"); in sc16is7xx_spi_probe()
1743 spi->mode = spi->mode ? : SPI_MODE_0; in sc16is7xx_spi_probe()
1744 spi->max_speed_hz = spi->max_speed_hz ? : 4 * HZ_PER_MHZ; in sc16is7xx_spi_probe()
1749 if (spi->dev.of_node) { in sc16is7xx_spi_probe()
1750 devtype = device_get_match_data(&spi->dev); in sc16is7xx_spi_probe()
1752 return -ENODEV; in sc16is7xx_spi_probe()
1756 devtype = (struct sc16is7xx_devtype *)id_entry->driver_data; in sc16is7xx_spi_probe()
1759 for (i = 0; i < devtype->nr_uart; i++) { in sc16is7xx_spi_probe()
1762 * If read_flag_mask is 0, the regmap code sets it to a default in sc16is7xx_spi_probe()
1772 return sc16is7xx_probe(&spi->dev, devtype, regmaps, spi->irq); in sc16is7xx_spi_probe()
1777 sc16is7xx_remove(&spi->dev); in sc16is7xx_spi_remove()
1814 if (i2c->dev.of_node) { in sc16is7xx_i2c_probe()
1815 devtype = device_get_match_data(&i2c->dev); in sc16is7xx_i2c_probe()
1817 return -ENODEV; in sc16is7xx_i2c_probe()
1819 devtype = (struct sc16is7xx_devtype *)id->driver_data; in sc16is7xx_i2c_probe()
1822 for (i = 0; i < devtype->nr_uart; i++) { in sc16is7xx_i2c_probe()
1829 return sc16is7xx_probe(&i2c->dev, devtype, regmaps, i2c->irq); in sc16is7xx_i2c_probe()
1834 sc16is7xx_remove(&client->dev); in sc16is7xx_i2c_remove()
1874 pr_err("failed to init sc16is7xx i2c --> %d\n", ret); in sc16is7xx_init()
1882 pr_err("failed to init sc16is7xx spi --> %d\n", ret); in sc16is7xx_init()