Lines Matching refs:FIFO_512x
407 #define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1)) macro
427 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE); in mpc512x_psc_fifo_init()
428 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE); in mpc512x_psc_fifo_init()
429 out_be32(&FIFO_512x(port)->txalarm, 1); in mpc512x_psc_fifo_init()
430 out_be32(&FIFO_512x(port)->tximr, 0); in mpc512x_psc_fifo_init()
432 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE); in mpc512x_psc_fifo_init()
433 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE); in mpc512x_psc_fifo_init()
434 out_be32(&FIFO_512x(port)->rxalarm, 1); in mpc512x_psc_fifo_init()
435 out_be32(&FIFO_512x(port)->rximr, 0); in mpc512x_psc_fifo_init()
437 out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM); in mpc512x_psc_fifo_init()
438 out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM); in mpc512x_psc_fifo_init()
443 return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY); in mpc512x_psc_raw_rx_rdy()
448 return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL); in mpc512x_psc_raw_tx_rdy()
453 return in_be32(&FIFO_512x(port)->rxsr) in mpc512x_psc_rx_rdy()
454 & in_be32(&FIFO_512x(port)->rximr) in mpc512x_psc_rx_rdy()
460 return in_be32(&FIFO_512x(port)->txsr) in mpc512x_psc_tx_rdy()
461 & in_be32(&FIFO_512x(port)->tximr) in mpc512x_psc_tx_rdy()
467 return in_be32(&FIFO_512x(port)->txsr) in mpc512x_psc_tx_empty()
475 rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr); in mpc512x_psc_stop_rx()
477 out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr); in mpc512x_psc_stop_rx()
484 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr); in mpc512x_psc_start_tx()
486 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr); in mpc512x_psc_start_tx()
493 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr); in mpc512x_psc_stop_tx()
495 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr); in mpc512x_psc_stop_tx()
500 out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr)); in mpc512x_psc_rx_clr_irq()
505 out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr)); in mpc512x_psc_tx_clr_irq()
510 out_8(&FIFO_512x(port)->txdata_8, c); in mpc512x_psc_write_char()
515 return in_8(&FIFO_512x(port)->rxdata_8); in mpc512x_psc_read_char()
521 in_be32(&FIFO_512x(port)->tximr) << 16 | in mpc512x_psc_cw_disable_ints()
522 in_be32(&FIFO_512x(port)->rximr); in mpc512x_psc_cw_disable_ints()
523 out_be32(&FIFO_512x(port)->tximr, 0); in mpc512x_psc_cw_disable_ints()
524 out_be32(&FIFO_512x(port)->rximr, 0); in mpc512x_psc_cw_disable_ints()
529 out_be32(&FIFO_512x(port)->tximr, in mpc512x_psc_cw_restore_ints()
531 out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f); in mpc512x_psc_cw_restore_ints()