56 	u8 isr_fcr = 0;  in cls_set_cts_flow_control()  local
64 	isr_fcr = readb(&ch->ch_cls_uart->isr_fcr);  in cls_set_cts_flow_control()
67 	isr_fcr |= (UART_EXAR654_EFR_ECB | UART_EXAR654_EFR_CTSDSR);  in cls_set_cts_flow_control()
68 	isr_fcr &= ~(UART_EXAR654_EFR_IXON);  in cls_set_cts_flow_control()
70 	writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr);  in cls_set_cts_flow_control()
84 	writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr);  in cls_set_cts_flow_control()
88 		&ch->ch_cls_uart->isr_fcr);  in cls_set_cts_flow_control()
97 	u8 isr_fcr = 0;  in cls_set_ixon_flow_control()  local
105 	isr_fcr = readb(&ch->ch_cls_uart->isr_fcr);  in cls_set_ixon_flow_control()
108 	isr_fcr |= (UART_EXAR654_EFR_ECB | UART_EXAR654_EFR_IXON);  in cls_set_ixon_flow_control()
109 	isr_fcr &= ~(UART_EXAR654_EFR_CTSDSR);  in cls_set_ixon_flow_control()
111 	writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr);  in cls_set_ixon_flow_control()
131 	writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr);  in cls_set_ixon_flow_control()
135 		&ch->ch_cls_uart->isr_fcr);  in cls_set_ixon_flow_control()
142 	u8 isr_fcr = 0;  in cls_set_no_output_flow_control()  local
150 	isr_fcr = readb(&ch->ch_cls_uart->isr_fcr);  in cls_set_no_output_flow_control()
153 	isr_fcr |= (UART_EXAR654_EFR_ECB);  in cls_set_no_output_flow_control()
154 	isr_fcr &= ~(UART_EXAR654_EFR_CTSDSR | UART_EXAR654_EFR_IXON);  in cls_set_no_output_flow_control()
156 	writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr);  in cls_set_no_output_flow_control()
170 	writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr);  in cls_set_no_output_flow_control()
174 		&ch->ch_cls_uart->isr_fcr);  in cls_set_no_output_flow_control()
185 	u8 isr_fcr = 0;  in cls_set_rts_flow_control()  local
193 	isr_fcr = readb(&ch->ch_cls_uart->isr_fcr);  in cls_set_rts_flow_control()
196 	isr_fcr |= (UART_EXAR654_EFR_ECB | UART_EXAR654_EFR_RTSDTR);  in cls_set_rts_flow_control()
197 	isr_fcr &= ~(UART_EXAR654_EFR_IXOFF);  in cls_set_rts_flow_control()
199 	writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr);  in cls_set_rts_flow_control()
209 	writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr);  in cls_set_rts_flow_control()
213 		&ch->ch_cls_uart->isr_fcr);  in cls_set_rts_flow_control()
223 	u8 isr_fcr = 0;  in cls_set_ixoff_flow_control()  local
231 	isr_fcr = readb(&ch->ch_cls_uart->isr_fcr);  in cls_set_ixoff_flow_control()
234 	isr_fcr |= (UART_EXAR654_EFR_ECB | UART_EXAR654_EFR_IXOFF);  in cls_set_ixoff_flow_control()
235 	isr_fcr &= ~(UART_EXAR654_EFR_RTSDTR);  in cls_set_ixoff_flow_control()
237 	writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr);  in cls_set_ixoff_flow_control()
253 	writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr);  in cls_set_ixoff_flow_control()
257 		&ch->ch_cls_uart->isr_fcr);  in cls_set_ixoff_flow_control()
264 	u8 isr_fcr = 0;  in cls_set_no_input_flow_control()  local
272 	isr_fcr = readb(&ch->ch_cls_uart->isr_fcr);  in cls_set_no_input_flow_control()
275 	isr_fcr |= (UART_EXAR654_EFR_ECB);  in cls_set_no_input_flow_control()
276 	isr_fcr &= ~(UART_EXAR654_EFR_RTSDTR | UART_EXAR654_EFR_IXOFF);  in cls_set_no_input_flow_control()
278 	writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr);  in cls_set_no_input_flow_control()
288 	writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr);  in cls_set_no_input_flow_control()
292 		&ch->ch_cls_uart->isr_fcr);  in cls_set_no_input_flow_control()
569 		isr = readb(&ch->ch_cls_uart->isr_fcr);  in cls_parse_isr()
612 						&ch->ch_cls_uart->isr_fcr);  in cls_flush_uart_write()
616 		tmp = readb(&ch->ch_cls_uart->isr_fcr);  in cls_flush_uart_write()
838 	unsigned char isr_fcr = 0;  in cls_uart_init()  local
848 	isr_fcr = readb(&ch->ch_cls_uart->isr_fcr);  in cls_uart_init()
851 	isr_fcr |= (UART_EXAR654_EFR_ECB);  in cls_uart_init()
853 	writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr);  in cls_uart_init()
862 						 &ch->ch_cls_uart->isr_fcr);  in cls_uart_init()