Lines Matching refs:pl011_write

294 static void pl011_write(unsigned int val, const struct uart_amba_port *uap,  in pl011_write()  function
554 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_callback()
669 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_refill()
704 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_irq()
706 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_irq()
716 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_irq()
730 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_stop()
756 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_start()
761 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
772 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
783 pl011_write(uap->port.x_char, uap, REG_DR); in pl011_dma_tx_start()
789 pl011_write(dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
815 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_flush_buffer()
855 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_trigger_dma()
859 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_trigger_dma()
917 pl011_write(UART011_OEIS | UART011_BEIS | UART011_PEIS | in pl011_dma_rx_chars()
964 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_irq()
984 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_irq()
1032 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_callback()
1048 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_stop()
1092 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_poll()
1154 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_startup()
1162 pl011_write(ST_UART011_DMAWM_RX_16 | ST_UART011_DMAWM_TX_16, in pl011_dma_startup()
1191 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_shutdown()
1319 pl011_write(cr, uap, REG_CR); in pl011_rs485_tx_stop()
1330 pl011_write(uap->im, uap, REG_IMSC); in pl011_stop_tx()
1344 pl011_write(uap->im, uap, REG_IMSC); in pl011_start_tx_pio()
1366 pl011_write(cr, uap, REG_CR); in pl011_rs485_tx_start()
1394 pl011_write(uap->im, uap, REG_IMSC); in pl011_stop_rx()
1414 pl011_write(uap->im, uap, REG_IMSC); in pl011_enable_ms()
1434 pl011_write(uap->im, uap, REG_IMSC); in pl011_rx_chars()
1458 pl011_write(c, uap, REG_DR); in pl011_tx_char()
1536 pl011_write(0x00, uap, REG_ICR); in check_apply_cts_event_workaround()
1560 pl011_write(status & ~(UART011_TXIS|UART011_RTIS| in pl011_int()
1646 pl011_write(cr, uap, REG_CR); in pl011_set_mctrl()
1662 pl011_write(lcr_h, uap, REG_LCRH_TX); in pl011_break_ctl()
1673 pl011_write(pl011_read(uap, REG_MIS), uap, REG_ICR); in pl011_quiesce_irqs()
1687 pl011_write(pl011_read(uap, REG_IMSC) & ~UART011_TXIM, uap, in pl011_quiesce_irqs()
1719 pl011_write(ch, uap, REG_DR); in pl011_put_poll_char()
1743 pl011_write(UART011_OEIS | UART011_BEIS | UART011_PEIS | in pl011_hwinit()
1752 pl011_write(UART011_RTIM | UART011_RXIM, uap, REG_IMSC); in pl011_hwinit()
1772 pl011_write(lcr_h, uap, REG_LCRH_RX); in pl011_write_lcr_h()
1780 pl011_write(0xff, uap, REG_MIS); in pl011_write_lcr_h()
1781 pl011_write(lcr_h, uap, REG_LCRH_TX); in pl011_write_lcr_h()
1787 pl011_write(uap->im, uap, REG_IMSC); in pl011_allocate_irq()
1805 pl011_write(UART011_RTIS | UART011_RXIS, uap, REG_ICR); in pl011_enable_interrupts()
1823 pl011_write(uap->im, uap, REG_IMSC); in pl011_enable_interrupts()
1838 pl011_write(uap->im, uap, REG_IMSC); in pl011_unthrottle_rx()
1858 pl011_write(uap->vendor->ifls, uap, REG_IFLS); in pl011_startup()
1869 pl011_write(cr, uap, REG_CR); in pl011_startup()
1919 pl011_write(val, uap, lcrh); in pl011_shutdown_channel()
1936 pl011_write(cr, uap, REG_CR); in pl011_disable_uart()
1953 pl011_write(uap->im, uap, REG_IMSC); in pl011_disable_interrupts()
1954 pl011_write(0xffff, uap, REG_ICR); in pl011_disable_interrupts()
2156 pl011_write(quot & 0x3f, uap, REG_FBRD); in pl011_set_termios()
2157 pl011_write(quot >> 6, uap, REG_IBRD); in pl011_set_termios()
2173 pl011_write(old_cr, uap, REG_CR); in pl011_set_termios()
2246 pl011_write(cr, uap, REG_CR); in pl011_rs485_config()
2318 pl011_write(ch, uap, REG_DR); in pl011_console_putchar()
2346 pl011_write(new_cr, uap, REG_CR); in pl011_console_write()
2360 pl011_write(old_cr, uap, REG_CR); in pl011_console_write()
2761 pl011_write(0, uap, REG_IMSC); in pl011_register_port()
2762 pl011_write(0xffff, uap, REG_ICR); in pl011_register_port()