Lines Matching refs:rtl8192_setBBreg
547 …rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertr… in dm_TXPowerTrackingCallback_TSSI()
554 …rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertr… in dm_TXPowerTrackingCallback_TSSI()
696 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[priv->OFDM_index]); in dm_TXPowerTrackingCallback_ThermalMeter()
1312 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal); in dm_CCKTxPowerAdjust_TSSI()
1318 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal); in dm_CCKTxPowerAdjust_TSSI()
1323 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal); in dm_CCKTxPowerAdjust_TSSI()
1328 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal); in dm_CCKTxPowerAdjust_TSSI()
1334 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal); in dm_CCKTxPowerAdjust_TSSI()
1339 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal); in dm_CCKTxPowerAdjust_TSSI()
1353 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal); in dm_CCKTxPowerAdjust_ThermalMeter()
1361 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal); in dm_CCKTxPowerAdjust_ThermalMeter()
1368 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal); in dm_CCKTxPowerAdjust_ThermalMeter()
1376 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal); in dm_CCKTxPowerAdjust_ThermalMeter()
1384 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal); in dm_CCKTxPowerAdjust_ThermalMeter()
1391 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal); in dm_CCKTxPowerAdjust_ThermalMeter()
1415 …rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertr… in dm_txpower_reset_recovery()
1422 …rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertr… in dm_txpower_reset_recovery()
1476 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_bb_initialgain_restore()
1477 rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bit_mask, (u32)priv->initgain_backup.xaagccore1); in dm_bb_initialgain_restore()
1478 rtl8192_setBBreg(dev, rOFDM0_XBAGCCore1, bit_mask, (u32)priv->initgain_backup.xbagccore1); in dm_bb_initialgain_restore()
1479 rtl8192_setBBreg(dev, rOFDM0_XCAGCCore1, bit_mask, (u32)priv->initgain_backup.xcagccore1); in dm_bb_initialgain_restore()
1480 rtl8192_setBBreg(dev, rOFDM0_XDAGCCore1, bit_mask, (u32)priv->initgain_backup.xdagccore1); in dm_bb_initialgain_restore()
1482 rtl8192_setBBreg(dev, rCCK0_CCA, bit_mask, (u32)priv->initgain_backup.cca); in dm_bb_initialgain_restore()
1490 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite. */ in dm_bb_initialgain_restore()
1502 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_bb_initialgain_backup()
1602 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_ctrl_initgain_byrssi_by_driverrssi()
1636 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite.*/ in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1666 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1740 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite. */ in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
2374 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x1<<min_rssi_index, 0x0); /* 0xc04[3:0] */ in dm_rxpath_sel_byrssi()
2375 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x1<<min_rssi_index, 0x0); /* 0xd04[3:0] */ in dm_rxpath_sel_byrssi()
2388 rtl8192_setBBreg(dev, rCCK0_AFESetting, 0x0f000000, DM_RxPathSelTable.cck_rx_path); in dm_rxpath_sel_byrssi()
2396 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x1<<i, 0x1); /* 0xc04[3:0] */ in dm_rxpath_sel_byrssi()
2397 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x1<<i, 0x1); /* 0xd04[3:0] */ in dm_rxpath_sel_byrssi()