33     const isys_irq_ID_t	isys_irqc_id,  in isys_irqc_state_get()  argument
36 	state->edge     = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_EDGE_REG_IDX);  in isys_irqc_state_get()
37 	state->mask     = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_MASK_REG_IDX);  in isys_irqc_state_get()
38 	state->status   = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_STATUS_REG_IDX);  in isys_irqc_state_get()
39 	state->enable   = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_ENABLE_REG_IDX);  in isys_irqc_state_get()
40 	state->level_no = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_LEVEL_NO_REG_IDX);  in isys_irqc_state_get()
52     const isys_irq_ID_t	isys_irqc_id,  in isys_irqc_state_dump()  argument
57 			    isys_irqc_id,  in isys_irqc_state_dump()
69     const isys_irq_ID_t	isys_irqc_id,  in isys_irqc_reg_store()  argument
75 	assert(isys_irqc_id < N_ISYS_IRQ_ID);  in isys_irqc_reg_store()
78 	reg_addr = ISYS_IRQ_BASE[isys_irqc_id] + (reg_idx * sizeof(hrt_data));  in isys_irqc_reg_store()
86     const isys_irq_ID_t	isys_irqc_id,  in isys_irqc_reg_load()  argument
92 	assert(isys_irqc_id < N_ISYS_IRQ_ID);  in isys_irqc_reg_load()
95 	reg_addr = ISYS_IRQ_BASE[isys_irqc_id] + (reg_idx * sizeof(hrt_data));  in isys_irqc_reg_load()