190 		p_ep_regs = &udc->p_regs->EP_REGS[num];  in _nbu2ss_get_begin_ram_address()
225 	_nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, data);  in _nbu2ss_ep_init()
230 	_nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, data);  in _nbu2ss_ep_init()
253 	_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);  in _nbu2ss_ep_init()
260 		_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);  in _nbu2ss_ep_init()
263 		_nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);  in _nbu2ss_ep_init()
266 		_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);  in _nbu2ss_ep_init()
271 		_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);  in _nbu2ss_ep_init()
274 		_nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);  in _nbu2ss_ep_init()
277 		_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);  in _nbu2ss_ep_init()
297 	_nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, 0);  in _nbu2ss_epn_exit()
302 	_nbu2ss_bitclr(&udc->p_regs->USB_INT_ENA, data);  in _nbu2ss_epn_exit()
308 		_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);  in _nbu2ss_epn_exit()
311 		_nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);  in _nbu2ss_epn_exit()
314 		_nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);  in _nbu2ss_epn_exit()
319 		_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);  in _nbu2ss_epn_exit()
322 		_nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);  in _nbu2ss_epn_exit()
325 		_nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);  in _nbu2ss_epn_exit()
338 	data = _nbu2ss_readl(&udc->p_regs->USBSSCONF);  in _nbu2ss_ep_dma_init()
348 		_nbu2ss_writel(&udc->p_regs->EP_DCR[num].EP_DCR2, data);  in _nbu2ss_ep_dma_init()
353 		_nbu2ss_bitset(&udc->p_regs->EP_DCR[num].EP_DCR1, data);  in _nbu2ss_ep_dma_init()
358 		_nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);  in _nbu2ss_ep_dma_init()
362 		_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, EPN_AUTO);  in _nbu2ss_ep_dma_init()
367 		_nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);  in _nbu2ss_ep_dma_init()
377 	struct fc_regs __iomem *preg = udc->p_regs;  in _nbu2ss_ep_dma_exit()
408 	struct fc_regs __iomem *preg = udc->p_regs;  in _nbu2ss_ep_dma_abort()
422 	struct fc_regs __iomem *preg = udc->p_regs;  in _nbu2ss_ep_in_end()
547 		buf32->dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);  in ep0_out_pio()
564 		temp_32.dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);  in ep0_out_overbytes()
593 		_nbu2ss_writel(&udc->p_regs->EP0_WRITE, p_buf_32->dw);  in EP0_in_PIO()
628 	data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);  in EP0_send_NULL()
636 	_nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);  in EP0_send_NULL()
647 	data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);  in EP0_receive_NULL()
653 	_nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);  in EP0_receive_NULL()
683 	data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);  in _nbu2ss_ep0_in_transfer()
686 	_nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);  in _nbu2ss_ep0_in_transfer()
725 	i_recv_length = _nbu2ss_readl(&udc->p_regs->EP0_LENGTH) & EP0_LDATA;  in _nbu2ss_ep0_out_transfer()
776 		i_remain_size = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);  in _nbu2ss_ep0_out_transfer()
780 			_nbu2ss_bitclr(&udc->p_regs->EP0_CONTROL, EP0_ONAK);  in _nbu2ss_ep0_out_transfer()
799 	struct fc_regs __iomem *preg = udc->p_regs;  in _nbu2ss_out_dma()
858 	struct fc_regs __iomem *preg = udc->p_regs;  in _nbu2ss_epn_out_pio()
936 	struct fc_regs __iomem *preg = udc->p_regs;  in _nbu2ss_epn_out_transfer()
993 	struct fc_regs __iomem *preg = udc->p_regs;  in _nbu2ss_in_dma()
1061 	struct fc_regs __iomem *preg = udc->p_regs;  in _nbu2ss_epn_in_pio()
1134 	status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);  in _nbu2ss_epn_in_transfer()
1224 		length = _nbu2ss_readl(&ep->udc->p_regs->EP_REGS[ep->epnum - 1].EP_LEN_DCNT);  in _nbu2ss_restert_transfer()
1251 	_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);  in _nbu2ss_endpoint_toggle_reset()
1262 	struct fc_regs __iomem *preg = udc->p_regs;  in _nbu2ss_set_endpoint_stall()
1322 	data = _nbu2ss_readl(&udc->p_regs->USB_CONTROL);  in _nbu2ss_set_test_mode()
1326 	_nbu2ss_writel(&udc->p_regs->USB_CONTROL, data);  in _nbu2ss_set_test_mode()
1327 	_nbu2ss_bitset(&udc->p_regs->TEST_CONTROL, CS_TESTMODEEN);  in _nbu2ss_set_test_mode()
1362 	struct fc_regs __iomem *preg = udc->p_regs;  in _nbu2ss_get_ep_stall()
1439 	data = _nbu2ss_readl(&udc->p_regs->USB_STATUS);  in _nbu2ss_get_speed()
1454 	struct fc_regs __iomem *preg = udc->p_regs;  in _nbu2ss_epn_set_stall()
1556 	_nbu2ss_writel(&udc->p_regs->USB_ADDRESS, wValue);  in std_req_set_address()
1576 		_nbu2ss_bitset(&udc->p_regs->USB_CONTROL, CONF);  in std_req_set_configuration()
1580 		_nbu2ss_bitclr(&udc->p_regs->USB_CONTROL, CONF);  in std_req_set_configuration()
1590 	*pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA0);  in _nbu2ss_read_request_data()
1592 	*pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA1);  in _nbu2ss_read_request_data()
1708 		_nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, EP0_BCLR);  in _nbu2ss_ep0_out_data_stage()
1745 	status = _nbu2ss_readl(&udc->p_regs->EP0_STATUS);  in _nbu2ss_ep0_int()
1747 	_nbu2ss_writel(&udc->p_regs->EP0_STATUS, ~intr);  in _nbu2ss_ep0_int()
1859 	struct fc_regs __iomem *preg = udc->p_regs;  in _nbu2ss_epn_in_int()
1951 	struct fc_regs __iomem *preg = udc->p_regs;  in _nbu2ss_epn_out_dma_int()
2012 	status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);  in _nbu2ss_epn_int()
2015 	_nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_STATUS, ~status);  in _nbu2ss_epn_int()
2052 	_nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, (EP0_AUTO | EP0_BCLR));  in _nbu2ss_ep0_enable()
2053 	_nbu2ss_writel(&udc->p_regs->EP0_INT_ENA, EP0_INT_EN_BIT);  in _nbu2ss_ep0_enable()
2106 			reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL)  in _nbu2ss_pullup()
2109 			_nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);  in _nbu2ss_pullup()
2114 		reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL) | CONNECTB)  in _nbu2ss_pullup()
2117 		_nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);  in _nbu2ss_pullup()
2127 	struct fc_regs __iomem *p = udc->p_regs;  in _nbu2ss_fifo_flush()
2152 	_nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));  in _nbu2ss_enable_controller()
2155 	_nbu2ss_bitclr(&udc->p_regs->EPCTR, DIRPD);  in _nbu2ss_enable_controller()
2158 	_nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);  in _nbu2ss_enable_controller()
2160 	_nbu2ss_writel(&udc->p_regs->AHBSCTR, WAIT_MODE);  in _nbu2ss_enable_controller()
2162 	_nbu2ss_writel(&udc->p_regs->AHBMCTR,  in _nbu2ss_enable_controller()
2165 	while (!(_nbu2ss_readl(&udc->p_regs->EPCTR) & PLL_LOCK)) {  in _nbu2ss_enable_controller()
2174 	_nbu2ss_bitset(&udc->p_regs->UTMI_CHARACTER_1, USB_SQUSET);  in _nbu2ss_enable_controller()
2176 	_nbu2ss_bitset(&udc->p_regs->USB_CONTROL, (INT_SEL | SOF_RCV));  in _nbu2ss_enable_controller()
2182 	_nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, USB_INT_EN_BIT);  in _nbu2ss_enable_controller()
2192 	_nbu2ss_bitset(&udc->p_regs->EPCTR, EPC_RST);  in _nbu2ss_reset_controller()
2193 	_nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);  in _nbu2ss_reset_controller()
2202 		_nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));  in _nbu2ss_disable_controller()
2319 		_nbu2ss_bitset(&udc->p_regs->USB_CONTROL, SUSPEND);  in _nbu2ss_int_usb_suspend()
2345 	struct fc_regs __iomem *preg = udc->p_regs;  in _nbu2ss_udc_irq()
2747 	preg = udc->p_regs;  in nbu2ss_ep_fifo_status()
2835 	return _nbu2ss_readl(&udc->p_regs->USB_ADDRESS) & FRAME;  in nbu2ss_gad_get_frame()
2859 	_nbu2ss_bitset(&udc->p_regs->EPCTR, PLL_RESUME);  in nbu2ss_gad_wakeup()
2862 		data = _nbu2ss_readl(&udc->p_regs->EPCTR);  in nbu2ss_gad_wakeup()
2868 	_nbu2ss_bitclr(&udc->p_regs->EPCTR, PLL_RESUME);  in nbu2ss_gad_wakeup()
3098 	udc->p_regs = (struct fc_regs __iomem *)mmio_base;  in nbu2ss_drv_probe()