Lines Matching refs:dev

32 static inline u8 gige_read8(struct ssb_gige *dev, u16 offset)  in gige_read8()  argument
34 return ssb_read8(dev->dev, offset); in gige_read8()
37 static inline u16 gige_read16(struct ssb_gige *dev, u16 offset) in gige_read16() argument
39 return ssb_read16(dev->dev, offset); in gige_read16()
42 static inline u32 gige_read32(struct ssb_gige *dev, u16 offset) in gige_read32() argument
44 return ssb_read32(dev->dev, offset); in gige_read32()
47 static inline void gige_write8(struct ssb_gige *dev, in gige_write8() argument
50 ssb_write8(dev->dev, offset, value); in gige_write8()
53 static inline void gige_write16(struct ssb_gige *dev, in gige_write16() argument
56 ssb_write16(dev->dev, offset, value); in gige_write16()
59 static inline void gige_write32(struct ssb_gige *dev, in gige_write32() argument
62 ssb_write32(dev->dev, offset, value); in gige_write32()
66 u8 gige_pcicfg_read8(struct ssb_gige *dev, unsigned int offset) in gige_pcicfg_read8() argument
69 return gige_read8(dev, SSB_GIGE_PCICFG + offset); in gige_pcicfg_read8()
73 u16 gige_pcicfg_read16(struct ssb_gige *dev, unsigned int offset) in gige_pcicfg_read16() argument
76 return gige_read16(dev, SSB_GIGE_PCICFG + offset); in gige_pcicfg_read16()
80 u32 gige_pcicfg_read32(struct ssb_gige *dev, unsigned int offset) in gige_pcicfg_read32() argument
83 return gige_read32(dev, SSB_GIGE_PCICFG + offset); in gige_pcicfg_read32()
87 void gige_pcicfg_write8(struct ssb_gige *dev, in gige_pcicfg_write8() argument
91 gige_write8(dev, SSB_GIGE_PCICFG + offset, value); in gige_pcicfg_write8()
95 void gige_pcicfg_write16(struct ssb_gige *dev, in gige_pcicfg_write16() argument
99 gige_write16(dev, SSB_GIGE_PCICFG + offset, value); in gige_pcicfg_write16()
103 void gige_pcicfg_write32(struct ssb_gige *dev, in gige_pcicfg_write32() argument
107 gige_write32(dev, SSB_GIGE_PCICFG + offset, value); in gige_pcicfg_write32()
113 struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops); in ssb_gige_pci_read_config() local
121 spin_lock_irqsave(&dev->lock, flags); in ssb_gige_pci_read_config()
124 *val = gige_pcicfg_read8(dev, reg); in ssb_gige_pci_read_config()
127 *val = gige_pcicfg_read16(dev, reg); in ssb_gige_pci_read_config()
130 *val = gige_pcicfg_read32(dev, reg); in ssb_gige_pci_read_config()
135 spin_unlock_irqrestore(&dev->lock, flags); in ssb_gige_pci_read_config()
143 struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops); in ssb_gige_pci_write_config() local
151 spin_lock_irqsave(&dev->lock, flags); in ssb_gige_pci_write_config()
154 gige_pcicfg_write8(dev, reg, val); in ssb_gige_pci_write_config()
157 gige_pcicfg_write16(dev, reg, val); in ssb_gige_pci_write_config()
160 gige_pcicfg_write32(dev, reg, val); in ssb_gige_pci_write_config()
165 spin_unlock_irqrestore(&dev->lock, flags); in ssb_gige_pci_write_config()
173 struct ssb_gige *dev; in ssb_gige_probe() local
176 dev = kzalloc(sizeof(*dev), GFP_KERNEL); in ssb_gige_probe()
177 if (!dev) in ssb_gige_probe()
179 dev->dev = sdev; in ssb_gige_probe()
181 spin_lock_init(&dev->lock); in ssb_gige_probe()
182 dev->pci_controller.pci_ops = &dev->pci_ops; in ssb_gige_probe()
183 dev->pci_controller.io_resource = &dev->io_resource; in ssb_gige_probe()
184 dev->pci_controller.mem_resource = &dev->mem_resource; in ssb_gige_probe()
185 dev->pci_controller.io_map_base = 0x800; in ssb_gige_probe()
186 dev->pci_ops.read = ssb_gige_pci_read_config; in ssb_gige_probe()
187 dev->pci_ops.write = ssb_gige_pci_write_config; in ssb_gige_probe()
189 dev->io_resource.name = SSB_GIGE_IO_RES_NAME; in ssb_gige_probe()
190 dev->io_resource.start = 0x800; in ssb_gige_probe()
191 dev->io_resource.end = 0x8FF; in ssb_gige_probe()
192 dev->io_resource.flags = IORESOURCE_IO | IORESOURCE_PCI_FIXED; in ssb_gige_probe()
199 gige_pcicfg_write32(dev, PCI_BASE_ADDRESS_0, base); in ssb_gige_probe()
200 gige_pcicfg_write32(dev, PCI_BASE_ADDRESS_1, 0); in ssb_gige_probe()
202 dev->mem_resource.name = SSB_GIGE_MEM_RES_NAME; in ssb_gige_probe()
203 dev->mem_resource.start = base; in ssb_gige_probe()
204 dev->mem_resource.end = base + 0x10000 - 1; in ssb_gige_probe()
205 dev->mem_resource.flags = IORESOURCE_MEM | IORESOURCE_PCI_FIXED; in ssb_gige_probe()
208 gige_pcicfg_write16(dev, PCI_COMMAND, in ssb_gige_probe()
209 gige_pcicfg_read16(dev, PCI_COMMAND) in ssb_gige_probe()
218 gige_write32(dev, SSB_GIGE_SHIM_FLUSHSTAT, 0x00000068); in ssb_gige_probe()
227 dev->has_rgmii = 1; in ssb_gige_probe()
231 dev->has_rgmii = 0; in ssb_gige_probe()
236 ssb_set_drvdata(sdev, dev); in ssb_gige_probe()
237 register_pci_controller(&dev->pci_controller); in ssb_gige_probe()
253 struct ssb_gige *dev = ssb_get_drvdata(sdev); in ssb_gige_pcibios_plat_dev_init() local
256 if (pdev->bus->ops != &dev->pci_ops) { in ssb_gige_pcibios_plat_dev_init()
264 res->name = dev->mem_resource.name; in ssb_gige_pcibios_plat_dev_init()
265 res->start = dev->mem_resource.start; in ssb_gige_pcibios_plat_dev_init()
266 res->end = dev->mem_resource.end; in ssb_gige_pcibios_plat_dev_init()
278 struct ssb_gige *dev = ssb_get_drvdata(sdev); in ssb_gige_map_irq() local
280 if (pdev->bus->ops != &dev->pci_ops) { in ssb_gige_map_irq()