28 static void ssb_chipco_pll_write(struct ssb_chipcommon *cc,  in ssb_chipco_pll_write()  function
149 	ssb_chipco_pll_write(cc, SSB_PMU0_PLLCTL0, pllctl);  in ssb_pmu0_pllinit_r0()
159 	ssb_chipco_pll_write(cc, SSB_PMU0_PLLCTL1, pllctl);  in ssb_pmu0_pllinit_r0()
165 	ssb_chipco_pll_write(cc, SSB_PMU0_PLLCTL2, pllctl);  in ssb_pmu0_pllinit_r0()
285 	ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, pllctl);  in ssb_pmu1_pllinit_r0()
292 	ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, pllctl);  in ssb_pmu1_pllinit_r0()
298 	ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL3, pllctl);  in ssb_pmu1_pllinit_r0()
305 		ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, pllctl);  in ssb_pmu1_pllinit_r0()
680 		ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11100070);  in ssb_pmu_spuravoid_pllupdate()
681 		ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x1014140a);  in ssb_pmu_spuravoid_pllupdate()
682 		ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888854);  in ssb_pmu_spuravoid_pllupdate()
684 			ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x05201828);  in ssb_pmu_spuravoid_pllupdate()
686 			ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x05001828);  in ssb_pmu_spuravoid_pllupdate()
691 			ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11500008);  in ssb_pmu_spuravoid_pllupdate()
692 			ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x0C000C06);  in ssb_pmu_spuravoid_pllupdate()
693 			ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x0F600a08);  in ssb_pmu_spuravoid_pllupdate()
694 			ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL3, 0x00000000);  in ssb_pmu_spuravoid_pllupdate()
695 			ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL4, 0x2001E920);  in ssb_pmu_spuravoid_pllupdate()
696 			ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888815);  in ssb_pmu_spuravoid_pllupdate()
698 			ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11100008);  in ssb_pmu_spuravoid_pllupdate()
699 			ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x0c000c06);  in ssb_pmu_spuravoid_pllupdate()
700 			ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x03000a08);  in ssb_pmu_spuravoid_pllupdate()
701 			ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL3, 0x00000000);  in ssb_pmu_spuravoid_pllupdate()
702 			ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL4, 0x200005c0);  in ssb_pmu_spuravoid_pllupdate()
703 			ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888855);  in ssb_pmu_spuravoid_pllupdate()