226 static inline u32 tegra_spi_readl(struct tegra_spi_data *tspi,  in tegra_spi_readl()  function
247 	val = tegra_spi_readl(tspi, SPI_TRANS_STATUS);  in tegra_spi_clear_status()
251 	val = tegra_spi_readl(tspi, SPI_FIFO_STATUS);  in tegra_spi_clear_status()
303 	fifo_status = tegra_spi_readl(tspi, SPI_FIFO_STATUS);  in tegra_spi_fill_tx_fifo_from_client_txbuf()
353 	fifo_status = tegra_spi_readl(tspi, SPI_FIFO_STATUS);  in tegra_spi_read_rx_fifo_to_client_rxbuf()
358 			u32 x = tegra_spi_readl(tspi, SPI_RX_FIFO);  in tegra_spi_read_rx_fifo_to_client_rxbuf()
375 			u32 x = tegra_spi_readl(tspi, SPI_RX_FIFO) & rx_mask;  in tegra_spi_read_rx_fifo_to_client_rxbuf()
515 	status = tegra_spi_readl(tspi, SPI_FIFO_STATUS);  in tegra_spi_flush_fifos()
520 			status = tegra_spi_readl(tspi, SPI_FIFO_STATUS);  in tegra_spi_flush_fifos()
971 		val = tegra_spi_readl(tspi, SPI_INTR_MASK);  in tegra_spi_setup()
1018 		tegra_spi_readl(tspi, SPI_COMMAND1),  in tegra_spi_dump_regs()
1019 		tegra_spi_readl(tspi, SPI_COMMAND2));  in tegra_spi_dump_regs()
1021 		tegra_spi_readl(tspi, SPI_DMA_CTL),  in tegra_spi_dump_regs()
1022 		tegra_spi_readl(tspi, SPI_DMA_BLK));  in tegra_spi_dump_regs()
1024 		tegra_spi_readl(tspi, SPI_TRANS_STATUS),  in tegra_spi_dump_regs()
1025 		tegra_spi_readl(tspi, SPI_FIFO_STATUS));  in tegra_spi_dump_regs()
1254 	tspi->status_reg = tegra_spi_readl(tspi, SPI_FIFO_STATUS);  in tegra_spi_isr()
1401 	tspi->spi_cs_timing1 = tegra_spi_readl(tspi, SPI_CS_TIMING1);  in tegra_spi_probe()
1402 	tspi->spi_cs_timing2 = tegra_spi_readl(tspi, SPI_CS_TIMING2);  in tegra_spi_probe()
1403 	tspi->def_command2_reg = tegra_spi_readl(tspi, SPI_COMMAND2);  in tegra_spi_probe()
1489 	tegra_spi_readl(tspi, SPI_COMMAND1);  in tegra_spi_runtime_suspend()