100 	u32 reg_val;  in mtk_spi_slave_disable_dma()  local
102 	reg_val = readl(mdata->base + SPIS_DMA_CFG_REG);  in mtk_spi_slave_disable_dma()
103 	reg_val &= ~RX_DMA_EN;  in mtk_spi_slave_disable_dma()
104 	reg_val &= ~TX_DMA_EN;  in mtk_spi_slave_disable_dma()
105 	writel(reg_val, mdata->base + SPIS_DMA_CFG_REG);  in mtk_spi_slave_disable_dma()
110 	u32 reg_val;  in mtk_spi_slave_disable_xfer()  local
112 	reg_val = readl(mdata->base + SPIS_CFG_REG);  in mtk_spi_slave_disable_xfer()
113 	reg_val &= ~SPIS_TX_EN;  in mtk_spi_slave_disable_xfer()
114 	reg_val &= ~SPIS_RX_EN;  in mtk_spi_slave_disable_xfer()
115 	writel(reg_val, mdata->base + SPIS_CFG_REG);  in mtk_spi_slave_disable_xfer()
135 	u32 reg_val;  in mtk_spi_slave_prepare_message()  local
140 	reg_val = readl(mdata->base + SPIS_CFG_REG);  in mtk_spi_slave_prepare_message()
142 		reg_val |= SPIS_CPHA;  in mtk_spi_slave_prepare_message()
144 		reg_val &= ~SPIS_CPHA;  in mtk_spi_slave_prepare_message()
146 		reg_val |= SPIS_CPOL;  in mtk_spi_slave_prepare_message()
148 		reg_val &= ~SPIS_CPOL;  in mtk_spi_slave_prepare_message()
151 		reg_val &= ~(SPIS_TXMSBF | SPIS_RXMSBF);  in mtk_spi_slave_prepare_message()
153 		reg_val |= SPIS_TXMSBF | SPIS_RXMSBF;  in mtk_spi_slave_prepare_message()
155 	reg_val &= ~SPIS_TX_ENDIAN;  in mtk_spi_slave_prepare_message()
156 	reg_val &= ~SPIS_RX_ENDIAN;  in mtk_spi_slave_prepare_message()
157 	writel(reg_val, mdata->base + SPIS_CFG_REG);  in mtk_spi_slave_prepare_message()
167 	int reg_val, cnt, remainder, ret;  in mtk_spi_slave_fifo_transfer()  local
171 	reg_val = readl(mdata->base + SPIS_CFG_REG);  in mtk_spi_slave_fifo_transfer()
173 		reg_val |= SPIS_RX_EN;  in mtk_spi_slave_fifo_transfer()
175 		reg_val |= SPIS_TX_EN;  in mtk_spi_slave_fifo_transfer()
176 	writel(reg_val, mdata->base + SPIS_CFG_REG);  in mtk_spi_slave_fifo_transfer()
185 		reg_val = 0;  in mtk_spi_slave_fifo_transfer()
186 		memcpy(&reg_val, xfer->tx_buf + cnt * 4, remainder);  in mtk_spi_slave_fifo_transfer()
187 		writel(reg_val, mdata->base + SPIS_TX_DATA_REG);  in mtk_spi_slave_fifo_transfer()
205 	int reg_val, ret;  in mtk_spi_slave_dma_transfer()  local
238 	reg_val = readl(mdata->base + SPIS_CFG_REG);  in mtk_spi_slave_dma_transfer()
240 		reg_val |= SPIS_TX_EN;  in mtk_spi_slave_dma_transfer()
242 		reg_val |= SPIS_RX_EN;  in mtk_spi_slave_dma_transfer()
243 	writel(reg_val, mdata->base + SPIS_CFG_REG);  in mtk_spi_slave_dma_transfer()
246 	reg_val = 0;  in mtk_spi_slave_dma_transfer()
247 	reg_val |= (xfer->len - 1) & TX_DMA_LEN;  in mtk_spi_slave_dma_transfer()
248 	writel(reg_val, mdata->base + SPIS_DMA_CFG_REG);  in mtk_spi_slave_dma_transfer()
250 	reg_val = readl(mdata->base + SPIS_DMA_CFG_REG);  in mtk_spi_slave_dma_transfer()
252 		reg_val |= TX_DMA_EN;  in mtk_spi_slave_dma_transfer()
254 		reg_val |= RX_DMA_EN;  in mtk_spi_slave_dma_transfer()
255 	reg_val |= TX_DMA_TRIG_EN;  in mtk_spi_slave_dma_transfer()
256 	writel(reg_val, mdata->base + SPIS_DMA_CFG_REG);  in mtk_spi_slave_dma_transfer()
301 	u32 reg_val;  in mtk_spi_slave_setup()  local
303 	reg_val = DMA_DONE_EN | DATA_DONE_EN |  in mtk_spi_slave_setup()
305 	writel(reg_val, mdata->base + SPIS_IRQ_EN_REG);  in mtk_spi_slave_setup()
307 	reg_val = DMA_DONE_MASK | DATA_DONE_MASK |  in mtk_spi_slave_setup()
309 	writel(reg_val, mdata->base + SPIS_IRQ_MASK_REG);  in mtk_spi_slave_setup()
332 	u32 int_status, reg_val, cnt, remainder;  in mtk_spi_slave_interrupt()  local
365 			reg_val = readl(mdata->base + SPIS_RX_DATA_REG);  in mtk_spi_slave_interrupt()
367 			       &reg_val, remainder);  in mtk_spi_slave_interrupt()