Lines Matching +full:rx +full:- +full:sample +full:- +full:delay +full:- +full:ns
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Addy Ke <addy.ke@rock-chips.com>
18 #define DRIVER_NAME "rockchip-spi"
67 /* ss_n to sclk_out delay */
158 * SPI_CTRLR1 is 16-bits, so we should support lengths of 0xffff + 1. However,
163 /* 2 for native cs, 2 for cs-gpio */
181 void *rx; member
199 bool cs_high_supported; /* native CS supports active-high polarity */
206 writel_relaxed((enable ? 1U : 0U), rs->regs + ROCKCHIP_SPI_SSIENR); in spi_enable_chip()
215 if (!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_TARGET_TX_BUSY) && in wait_for_tx_idle()
216 !((readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY))) in wait_for_tx_idle()
219 if (!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY)) in wait_for_tx_idle()
224 dev_warn(rs->dev, "spi controller is in busy state!\n"); in wait_for_tx_idle()
231 ver = readl_relaxed(rs->regs + ROCKCHIP_SPI_VERSION); in get_fifo_len()
244 struct spi_controller *ctlr = spi->controller; in rockchip_spi_set_cs()
246 bool cs_asserted = spi->mode & SPI_CS_HIGH ? enable : !enable; in rockchip_spi_set_cs()
248 /* Return immediately for no-op */ in rockchip_spi_set_cs()
249 if (cs_asserted == rs->cs_asserted[spi_get_chipselect(spi, 0)]) in rockchip_spi_set_cs()
254 pm_runtime_get_sync(rs->dev); in rockchip_spi_set_cs()
257 ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, 1); in rockchip_spi_set_cs()
259 ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, in rockchip_spi_set_cs()
263 ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, 1); in rockchip_spi_set_cs()
265 ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, in rockchip_spi_set_cs()
269 pm_runtime_put(rs->dev); in rockchip_spi_set_cs()
272 rs->cs_asserted[spi_get_chipselect(spi, 0)] = cs_asserted; in rockchip_spi_set_cs()
281 * this also flushes both rx and tx fifos in rockchip_spi_handle_err()
286 writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_handle_err()
287 writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR); in rockchip_spi_handle_err()
289 if (atomic_read(&rs->state) & TXDMA) in rockchip_spi_handle_err()
290 dmaengine_terminate_async(ctlr->dma_tx); in rockchip_spi_handle_err()
292 if (atomic_read(&rs->state) & RXDMA) in rockchip_spi_handle_err()
293 dmaengine_terminate_async(ctlr->dma_rx); in rockchip_spi_handle_err()
298 u32 tx_free = rs->fifo_len - readl_relaxed(rs->regs + ROCKCHIP_SPI_TXFLR); in rockchip_spi_pio_writer()
299 u32 words = min(rs->tx_left, tx_free); in rockchip_spi_pio_writer()
301 rs->tx_left -= words; in rockchip_spi_pio_writer()
302 for (; words; words--) { in rockchip_spi_pio_writer()
305 if (rs->n_bytes == 1) in rockchip_spi_pio_writer()
306 txw = *(u8 *)rs->tx; in rockchip_spi_pio_writer()
308 txw = *(u16 *)rs->tx; in rockchip_spi_pio_writer()
310 writel_relaxed(txw, rs->regs + ROCKCHIP_SPI_TXDR); in rockchip_spi_pio_writer()
311 rs->tx += rs->n_bytes; in rockchip_spi_pio_writer()
317 u32 words = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFLR); in rockchip_spi_pio_reader()
318 u32 rx_left = (rs->rx_left > words) ? rs->rx_left - words : 0; in rockchip_spi_pio_reader()
322 * enough words in the rx fifo to get the last interrupt in rockchip_spi_pio_reader()
326 u32 ftl = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFTLR) + 1; in rockchip_spi_pio_reader()
330 words = rs->rx_left - rx_left; in rockchip_spi_pio_reader()
334 rs->rx_left = rx_left; in rockchip_spi_pio_reader()
335 for (; words; words--) { in rockchip_spi_pio_reader()
336 u32 rxw = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXDR); in rockchip_spi_pio_reader()
338 if (!rs->rx) in rockchip_spi_pio_reader()
341 if (rs->n_bytes == 1) in rockchip_spi_pio_reader()
342 *(u8 *)rs->rx = (u8)rxw; in rockchip_spi_pio_reader()
344 *(u16 *)rs->rx = (u16)rxw; in rockchip_spi_pio_reader()
345 rs->rx += rs->n_bytes; in rockchip_spi_pio_reader()
355 if (rs->cs_inactive && readl_relaxed(rs->regs + ROCKCHIP_SPI_IMR) & INT_CS_INACTIVE) { in rockchip_spi_isr()
356 ctlr->target_abort(ctlr); in rockchip_spi_isr()
357 writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_isr()
358 writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR); in rockchip_spi_isr()
363 if (rs->tx_left) in rockchip_spi_isr()
367 if (!rs->rx_left) { in rockchip_spi_isr()
369 writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_isr()
370 writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR); in rockchip_spi_isr()
381 rs->tx = xfer->tx_buf; in rockchip_spi_prepare_irq()
382 rs->rx = xfer->rx_buf; in rockchip_spi_prepare_irq()
383 rs->tx_left = rs->tx ? xfer->len / rs->n_bytes : 0; in rockchip_spi_prepare_irq()
384 rs->rx_left = xfer->len / rs->n_bytes; in rockchip_spi_prepare_irq()
386 writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR); in rockchip_spi_prepare_irq()
390 if (rs->tx_left) in rockchip_spi_prepare_irq()
393 if (rs->cs_inactive) in rockchip_spi_prepare_irq()
394 writel_relaxed(INT_RF_FULL | INT_CS_INACTIVE, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_prepare_irq()
396 writel_relaxed(INT_RF_FULL, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_prepare_irq()
406 int state = atomic_fetch_andnot(RXDMA, &rs->state); in rockchip_spi_dma_rxcb()
408 if (state & TXDMA && !rs->target_abort) in rockchip_spi_dma_rxcb()
411 if (rs->cs_inactive) in rockchip_spi_dma_rxcb()
412 writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_dma_rxcb()
422 int state = atomic_fetch_andnot(TXDMA, &rs->state); in rockchip_spi_dma_txcb()
424 if (state & RXDMA && !rs->target_abort) in rockchip_spi_dma_txcb()
428 wait_for_tx_idle(rs, ctlr->target); in rockchip_spi_dma_txcb()
452 atomic_set(&rs->state, 0); in rockchip_spi_prepare_dma()
454 rs->tx = xfer->tx_buf; in rockchip_spi_prepare_dma()
455 rs->rx = xfer->rx_buf; in rockchip_spi_prepare_dma()
458 if (xfer->rx_buf) { in rockchip_spi_prepare_dma()
461 .src_addr = rs->dma_addr_rx, in rockchip_spi_prepare_dma()
462 .src_addr_width = rs->n_bytes, in rockchip_spi_prepare_dma()
463 .src_maxburst = rockchip_spi_calc_burst_size(xfer->len / rs->n_bytes), in rockchip_spi_prepare_dma()
466 dmaengine_slave_config(ctlr->dma_rx, &rxconf); in rockchip_spi_prepare_dma()
469 ctlr->dma_rx, in rockchip_spi_prepare_dma()
470 xfer->rx_sg.sgl, xfer->rx_sg.nents, in rockchip_spi_prepare_dma()
473 return -EINVAL; in rockchip_spi_prepare_dma()
475 rxdesc->callback = rockchip_spi_dma_rxcb; in rockchip_spi_prepare_dma()
476 rxdesc->callback_param = ctlr; in rockchip_spi_prepare_dma()
480 if (xfer->tx_buf) { in rockchip_spi_prepare_dma()
483 .dst_addr = rs->dma_addr_tx, in rockchip_spi_prepare_dma()
484 .dst_addr_width = rs->n_bytes, in rockchip_spi_prepare_dma()
485 .dst_maxburst = rs->fifo_len / 4, in rockchip_spi_prepare_dma()
488 dmaengine_slave_config(ctlr->dma_tx, &txconf); in rockchip_spi_prepare_dma()
491 ctlr->dma_tx, in rockchip_spi_prepare_dma()
492 xfer->tx_sg.sgl, xfer->tx_sg.nents, in rockchip_spi_prepare_dma()
496 dmaengine_terminate_sync(ctlr->dma_rx); in rockchip_spi_prepare_dma()
497 return -EINVAL; in rockchip_spi_prepare_dma()
500 txdesc->callback = rockchip_spi_dma_txcb; in rockchip_spi_prepare_dma()
501 txdesc->callback_param = ctlr; in rockchip_spi_prepare_dma()
504 /* rx must be started before tx due to spi instinct */ in rockchip_spi_prepare_dma()
506 atomic_or(RXDMA, &rs->state); in rockchip_spi_prepare_dma()
507 ctlr->dma_rx->cookie = dmaengine_submit(rxdesc); in rockchip_spi_prepare_dma()
508 dma_async_issue_pending(ctlr->dma_rx); in rockchip_spi_prepare_dma()
511 if (rs->cs_inactive) in rockchip_spi_prepare_dma()
512 writel_relaxed(INT_CS_INACTIVE, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_prepare_dma()
517 atomic_or(TXDMA, &rs->state); in rockchip_spi_prepare_dma()
519 dma_async_issue_pending(ctlr->dma_tx); in rockchip_spi_prepare_dma()
539 rs->target_abort = false; in rockchip_spi_config()
541 cr0 |= rs->rsd << CR0_RSD_OFFSET; in rockchip_spi_config()
542 cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET; in rockchip_spi_config()
543 if (spi->mode & SPI_LSB_FIRST) in rockchip_spi_config()
545 if (spi->mode & SPI_CS_HIGH) in rockchip_spi_config()
548 if (xfer->rx_buf && xfer->tx_buf) in rockchip_spi_config()
550 else if (xfer->rx_buf) in rockchip_spi_config()
555 switch (xfer->bits_per_word) { in rockchip_spi_config()
558 cr1 = xfer->len - 1; in rockchip_spi_config()
562 cr1 = xfer->len - 1; in rockchip_spi_config()
566 cr1 = xfer->len / 2 - 1; in rockchip_spi_config()
570 * ctlr->bits_per_word_mask, so this shouldn't in rockchip_spi_config()
573 dev_err(rs->dev, "unknown bits per word: %d\n", in rockchip_spi_config()
574 xfer->bits_per_word); in rockchip_spi_config()
575 return -EINVAL; in rockchip_spi_config()
579 if (xfer->tx_buf) in rockchip_spi_config()
581 if (xfer->rx_buf) in rockchip_spi_config()
585 writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0); in rockchip_spi_config()
586 writel_relaxed(cr1, rs->regs + ROCKCHIP_SPI_CTRLR1); in rockchip_spi_config()
592 if ((xfer->len / rs->n_bytes) < rs->fifo_len) in rockchip_spi_config()
593 writel_relaxed(xfer->len / rs->n_bytes - 1, rs->regs + ROCKCHIP_SPI_RXFTLR); in rockchip_spi_config()
595 writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR); in rockchip_spi_config()
597 writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_DMATDLR); in rockchip_spi_config()
598 writel_relaxed(rockchip_spi_calc_burst_size(xfer->len / rs->n_bytes) - 1, in rockchip_spi_config()
599 rs->regs + ROCKCHIP_SPI_DMARDLR); in rockchip_spi_config()
600 writel_relaxed(dmacr, rs->regs + ROCKCHIP_SPI_DMACR); in rockchip_spi_config()
606 writel_relaxed(2 * DIV_ROUND_UP(rs->freq, 2 * xfer->speed_hz), in rockchip_spi_config()
607 rs->regs + ROCKCHIP_SPI_BAUDR); in rockchip_spi_config()
624 /* Get current dma rx point */ in rockchip_spi_target_abort()
625 if (atomic_read(&rs->state) & RXDMA) { in rockchip_spi_target_abort()
626 dmaengine_pause(ctlr->dma_rx); in rockchip_spi_target_abort()
627 status = dmaengine_tx_status(ctlr->dma_rx, ctlr->dma_rx->cookie, &state); in rockchip_spi_target_abort()
629 rs->rx = rs->xfer->rx_buf; in rockchip_spi_target_abort()
630 rs->xfer->len = 0; in rockchip_spi_target_abort()
631 rx_fifo_left = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFLR); in rockchip_spi_target_abort()
632 for (; rx_fifo_left; rx_fifo_left--) in rockchip_spi_target_abort()
633 readl_relaxed(rs->regs + ROCKCHIP_SPI_RXDR); in rockchip_spi_target_abort()
636 rs->rx += rs->xfer->len - rs->n_bytes * state.residue; in rockchip_spi_target_abort()
640 /* Get the valid data left in rx fifo and set rs->xfer->len real rx size */ in rockchip_spi_target_abort()
641 if (rs->rx) { in rockchip_spi_target_abort()
642 rx_fifo_left = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFLR); in rockchip_spi_target_abort()
643 for (; rx_fifo_left; rx_fifo_left--) { in rockchip_spi_target_abort()
644 u32 rxw = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXDR); in rockchip_spi_target_abort()
646 if (rs->n_bytes == 1) in rockchip_spi_target_abort()
647 *(u8 *)rs->rx = (u8)rxw; in rockchip_spi_target_abort()
649 *(u16 *)rs->rx = (u16)rxw; in rockchip_spi_target_abort()
650 rs->rx += rs->n_bytes; in rockchip_spi_target_abort()
652 rs->xfer->len = (unsigned int)(rs->rx - rs->xfer->rx_buf); in rockchip_spi_target_abort()
656 if (atomic_read(&rs->state) & RXDMA) in rockchip_spi_target_abort()
657 dmaengine_terminate_sync(ctlr->dma_rx); in rockchip_spi_target_abort()
658 if (atomic_read(&rs->state) & TXDMA) in rockchip_spi_target_abort()
659 dmaengine_terminate_sync(ctlr->dma_tx); in rockchip_spi_target_abort()
660 atomic_set(&rs->state, 0); in rockchip_spi_target_abort()
662 rs->target_abort = true; in rockchip_spi_target_abort()
678 if (!xfer->len) { in rockchip_spi_transfer_one()
683 WARN_ON(readl_relaxed(rs->regs + ROCKCHIP_SPI_SSIENR) && in rockchip_spi_transfer_one()
684 (readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY)); in rockchip_spi_transfer_one()
686 if (!xfer->tx_buf && !xfer->rx_buf) { in rockchip_spi_transfer_one()
687 dev_err(rs->dev, "No buffer for transfer\n"); in rockchip_spi_transfer_one()
688 return -EINVAL; in rockchip_spi_transfer_one()
691 if (xfer->len > ROCKCHIP_SPI_MAX_TRANLEN) { in rockchip_spi_transfer_one()
692 dev_err(rs->dev, "Transfer is too long (%d)\n", xfer->len); in rockchip_spi_transfer_one()
693 return -EINVAL; in rockchip_spi_transfer_one()
696 rs->n_bytes = xfer->bits_per_word <= 8 ? 1 : 2; in rockchip_spi_transfer_one()
697 rs->xfer = xfer; in rockchip_spi_transfer_one()
698 use_dma = ctlr->can_dma ? ctlr->can_dma(ctlr, spi, xfer) : false; in rockchip_spi_transfer_one()
700 ret = rockchip_spi_config(rs, spi, xfer, use_dma, ctlr->target); in rockchip_spi_transfer_one()
715 unsigned int bytes_per_word = xfer->bits_per_word <= 8 ? 1 : 2; in rockchip_spi_can_dma()
721 return xfer->len / bytes_per_word >= rs->fifo_len; in rockchip_spi_can_dma()
726 struct rockchip_spi *rs = spi_controller_get_devdata(spi->controller); in rockchip_spi_setup()
729 if (!spi_get_csgpiod(spi, 0) && (spi->mode & SPI_CS_HIGH) && !rs->cs_high_supported) { in rockchip_spi_setup()
730 dev_warn(&spi->dev, "setup: non GPIO CS can't be active-high\n"); in rockchip_spi_setup()
731 return -EINVAL; in rockchip_spi_setup()
734 pm_runtime_get_sync(rs->dev); in rockchip_spi_setup()
736 cr0 = readl_relaxed(rs->regs + ROCKCHIP_SPI_CTRLR0); in rockchip_spi_setup()
739 cr0 |= ((spi->mode & 0x3) << CR0_SCPH_OFFSET); in rockchip_spi_setup()
740 if (spi->mode & SPI_CS_HIGH && spi_get_chipselect(spi, 0) <= 1) in rockchip_spi_setup()
745 writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0); in rockchip_spi_setup()
747 pm_runtime_put(rs->dev); in rockchip_spi_setup()
758 struct device_node *np = pdev->dev.of_node; in rockchip_spi_probe()
762 target_mode = of_property_read_bool(np, "spi-slave"); in rockchip_spi_probe()
765 ctlr = spi_alloc_target(&pdev->dev, in rockchip_spi_probe()
768 ctlr = spi_alloc_host(&pdev->dev, in rockchip_spi_probe()
772 return -ENOMEM; in rockchip_spi_probe()
779 rs->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &mem); in rockchip_spi_probe()
780 if (IS_ERR(rs->regs)) { in rockchip_spi_probe()
781 ret = PTR_ERR(rs->regs); in rockchip_spi_probe()
785 rs->apb_pclk = devm_clk_get(&pdev->dev, "apb_pclk"); in rockchip_spi_probe()
786 if (IS_ERR(rs->apb_pclk)) { in rockchip_spi_probe()
787 dev_err(&pdev->dev, "Failed to get apb_pclk\n"); in rockchip_spi_probe()
788 ret = PTR_ERR(rs->apb_pclk); in rockchip_spi_probe()
792 rs->spiclk = devm_clk_get(&pdev->dev, "spiclk"); in rockchip_spi_probe()
793 if (IS_ERR(rs->spiclk)) { in rockchip_spi_probe()
794 dev_err(&pdev->dev, "Failed to get spi_pclk\n"); in rockchip_spi_probe()
795 ret = PTR_ERR(rs->spiclk); in rockchip_spi_probe()
799 ret = clk_prepare_enable(rs->apb_pclk); in rockchip_spi_probe()
801 dev_err(&pdev->dev, "Failed to enable apb_pclk\n"); in rockchip_spi_probe()
805 ret = clk_prepare_enable(rs->spiclk); in rockchip_spi_probe()
807 dev_err(&pdev->dev, "Failed to enable spi_clk\n"); in rockchip_spi_probe()
817 ret = devm_request_threaded_irq(&pdev->dev, ret, rockchip_spi_isr, NULL, in rockchip_spi_probe()
818 IRQF_ONESHOT, dev_name(&pdev->dev), ctlr); in rockchip_spi_probe()
822 rs->dev = &pdev->dev; in rockchip_spi_probe()
823 rs->freq = clk_get_rate(rs->spiclk); in rockchip_spi_probe()
825 if (!of_property_read_u32(pdev->dev.of_node, "rx-sample-delay-ns", in rockchip_spi_probe()
827 /* rx sample delay is expressed in parent clock cycles (max 3) */ in rockchip_spi_probe()
828 u32 rsd = DIV_ROUND_CLOSEST(rsd_nsecs * (rs->freq >> 8), in rockchip_spi_probe()
831 dev_warn(rs->dev, "%u Hz are too slow to express %u ns delay\n", in rockchip_spi_probe()
832 rs->freq, rsd_nsecs); in rockchip_spi_probe()
835 dev_warn(rs->dev, "%u Hz are too fast to express %u ns delay, clamping at %u ns\n", in rockchip_spi_probe()
836 rs->freq, rsd_nsecs, in rockchip_spi_probe()
837 CR0_RSD_MAX * 1000000000U / rs->freq); in rockchip_spi_probe()
839 rs->rsd = rsd; in rockchip_spi_probe()
842 rs->fifo_len = get_fifo_len(rs); in rockchip_spi_probe()
843 if (!rs->fifo_len) { in rockchip_spi_probe()
844 dev_err(&pdev->dev, "Failed to get fifo length\n"); in rockchip_spi_probe()
845 ret = -EINVAL; in rockchip_spi_probe()
849 pm_runtime_set_autosuspend_delay(&pdev->dev, ROCKCHIP_AUTOSUSPEND_TIMEOUT); in rockchip_spi_probe()
850 pm_runtime_use_autosuspend(&pdev->dev); in rockchip_spi_probe()
851 pm_runtime_set_active(&pdev->dev); in rockchip_spi_probe()
852 pm_runtime_enable(&pdev->dev); in rockchip_spi_probe()
854 ctlr->auto_runtime_pm = true; in rockchip_spi_probe()
855 ctlr->bus_num = pdev->id; in rockchip_spi_probe()
856 ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP | SPI_LSB_FIRST; in rockchip_spi_probe()
858 ctlr->mode_bits |= SPI_NO_CS; in rockchip_spi_probe()
859 ctlr->target_abort = rockchip_spi_target_abort; in rockchip_spi_probe()
861 ctlr->flags = SPI_CONTROLLER_GPIO_SS; in rockchip_spi_probe()
862 ctlr->max_native_cs = ROCKCHIP_SPI_MAX_CS_NUM; in rockchip_spi_probe()
865 * if num-cs is missing in the dts, default to 1 in rockchip_spi_probe()
867 if (of_property_read_u32(np, "num-cs", &num_cs)) in rockchip_spi_probe()
869 ctlr->num_chipselect = num_cs; in rockchip_spi_probe()
870 ctlr->use_gpio_descriptors = true; in rockchip_spi_probe()
872 ctlr->dev.of_node = pdev->dev.of_node; in rockchip_spi_probe()
873 ctlr->bits_per_word_mask = SPI_BPW_MASK(16) | SPI_BPW_MASK(8) | SPI_BPW_MASK(4); in rockchip_spi_probe()
874 ctlr->min_speed_hz = rs->freq / BAUDR_SCKDV_MAX; in rockchip_spi_probe()
875 ctlr->max_speed_hz = min(rs->freq / BAUDR_SCKDV_MIN, MAX_SCLK_OUT); in rockchip_spi_probe()
877 ctlr->setup = rockchip_spi_setup; in rockchip_spi_probe()
878 ctlr->set_cs = rockchip_spi_set_cs; in rockchip_spi_probe()
879 ctlr->transfer_one = rockchip_spi_transfer_one; in rockchip_spi_probe()
880 ctlr->max_transfer_size = rockchip_spi_max_transfer_size; in rockchip_spi_probe()
881 ctlr->handle_err = rockchip_spi_handle_err; in rockchip_spi_probe()
883 ctlr->dma_tx = dma_request_chan(rs->dev, "tx"); in rockchip_spi_probe()
884 if (IS_ERR(ctlr->dma_tx)) { in rockchip_spi_probe()
886 if (PTR_ERR(ctlr->dma_tx) == -EPROBE_DEFER) { in rockchip_spi_probe()
887 ret = -EPROBE_DEFER; in rockchip_spi_probe()
890 dev_warn(rs->dev, "Failed to request TX DMA channel\n"); in rockchip_spi_probe()
891 ctlr->dma_tx = NULL; in rockchip_spi_probe()
894 ctlr->dma_rx = dma_request_chan(rs->dev, "rx"); in rockchip_spi_probe()
895 if (IS_ERR(ctlr->dma_rx)) { in rockchip_spi_probe()
896 if (PTR_ERR(ctlr->dma_rx) == -EPROBE_DEFER) { in rockchip_spi_probe()
897 ret = -EPROBE_DEFER; in rockchip_spi_probe()
900 dev_warn(rs->dev, "Failed to request RX DMA channel\n"); in rockchip_spi_probe()
901 ctlr->dma_rx = NULL; in rockchip_spi_probe()
904 if (ctlr->dma_tx && ctlr->dma_rx) { in rockchip_spi_probe()
905 rs->dma_addr_tx = mem->start + ROCKCHIP_SPI_TXDR; in rockchip_spi_probe()
906 rs->dma_addr_rx = mem->start + ROCKCHIP_SPI_RXDR; in rockchip_spi_probe()
907 ctlr->can_dma = rockchip_spi_can_dma; in rockchip_spi_probe()
910 switch (readl_relaxed(rs->regs + ROCKCHIP_SPI_VERSION)) { in rockchip_spi_probe()
912 rs->cs_high_supported = true; in rockchip_spi_probe()
913 ctlr->mode_bits |= SPI_CS_HIGH; in rockchip_spi_probe()
914 if (ctlr->can_dma && target_mode) in rockchip_spi_probe()
915 rs->cs_inactive = true; in rockchip_spi_probe()
917 rs->cs_inactive = false; in rockchip_spi_probe()
920 rs->cs_inactive = false; in rockchip_spi_probe()
924 ret = devm_spi_register_controller(&pdev->dev, ctlr); in rockchip_spi_probe()
926 dev_err(&pdev->dev, "Failed to register controller\n"); in rockchip_spi_probe()
933 if (ctlr->dma_rx) in rockchip_spi_probe()
934 dma_release_channel(ctlr->dma_rx); in rockchip_spi_probe()
936 if (ctlr->dma_tx) in rockchip_spi_probe()
937 dma_release_channel(ctlr->dma_tx); in rockchip_spi_probe()
939 pm_runtime_disable(&pdev->dev); in rockchip_spi_probe()
941 clk_disable_unprepare(rs->spiclk); in rockchip_spi_probe()
943 clk_disable_unprepare(rs->apb_pclk); in rockchip_spi_probe()
955 pm_runtime_get_sync(&pdev->dev); in rockchip_spi_remove()
957 clk_disable_unprepare(rs->spiclk); in rockchip_spi_remove()
958 clk_disable_unprepare(rs->apb_pclk); in rockchip_spi_remove()
960 pm_runtime_put_noidle(&pdev->dev); in rockchip_spi_remove()
961 pm_runtime_disable(&pdev->dev); in rockchip_spi_remove()
962 pm_runtime_set_suspended(&pdev->dev); in rockchip_spi_remove()
964 if (ctlr->dma_tx) in rockchip_spi_remove()
965 dma_release_channel(ctlr->dma_tx); in rockchip_spi_remove()
966 if (ctlr->dma_rx) in rockchip_spi_remove()
967 dma_release_channel(ctlr->dma_rx); in rockchip_spi_remove()
1014 clk_disable_unprepare(rs->spiclk); in rockchip_spi_runtime_suspend()
1015 clk_disable_unprepare(rs->apb_pclk); in rockchip_spi_runtime_suspend()
1026 ret = clk_prepare_enable(rs->apb_pclk); in rockchip_spi_runtime_resume()
1030 ret = clk_prepare_enable(rs->spiclk); in rockchip_spi_runtime_resume()
1032 clk_disable_unprepare(rs->apb_pclk); in rockchip_spi_runtime_resume()
1045 { .compatible = "rockchip,px30-spi", },
1046 { .compatible = "rockchip,rk3036-spi", },
1047 { .compatible = "rockchip,rk3066-spi", },
1048 { .compatible = "rockchip,rk3188-spi", },
1049 { .compatible = "rockchip,rk3228-spi", },
1050 { .compatible = "rockchip,rk3288-spi", },
1051 { .compatible = "rockchip,rk3308-spi", },
1052 { .compatible = "rockchip,rk3328-spi", },
1053 { .compatible = "rockchip,rk3368-spi", },
1054 { .compatible = "rockchip,rk3399-spi", },
1055 { .compatible = "rockchip,rv1108-spi", },
1056 { .compatible = "rockchip,rv1126-spi", },
1073 MODULE_AUTHOR("Addy Ke <addy.ke@rock-chips.com>");