Lines Matching refs:mstr_cfg
422 u32 mstr_cfg; in qcom_qspi_transfer_one() local
433 mstr_cfg = readl(ctrl->base + MSTR_CONFIG); in qcom_qspi_transfer_one()
451 if (!(mstr_cfg & DMA_ENABLE)) { in qcom_qspi_transfer_one()
452 mstr_cfg |= DMA_ENABLE; in qcom_qspi_transfer_one()
453 writel(mstr_cfg, ctrl->base + MSTR_CONFIG); in qcom_qspi_transfer_one()
468 if (mstr_cfg & DMA_ENABLE) { in qcom_qspi_transfer_one()
469 mstr_cfg &= ~DMA_ENABLE; in qcom_qspi_transfer_one()
470 writel(mstr_cfg, ctrl->base + MSTR_CONFIG); in qcom_qspi_transfer_one()
487 u32 mstr_cfg; in qcom_qspi_prepare_message() local
496 mstr_cfg = readl(ctrl->base + MSTR_CONFIG); in qcom_qspi_prepare_message()
497 mstr_cfg &= ~CHIP_SELECT_NUM; in qcom_qspi_prepare_message()
499 mstr_cfg |= CHIP_SELECT_NUM; in qcom_qspi_prepare_message()
501 mstr_cfg |= FB_CLK_EN | PIN_WPN | PIN_HOLDN | SBL_EN | FULL_CYCLE_MODE; in qcom_qspi_prepare_message()
502 mstr_cfg &= ~(SPI_MODE_MSK | TX_DATA_OE_DELAY_MSK | TX_DATA_DELAY_MSK); in qcom_qspi_prepare_message()
503 mstr_cfg |= message->spi->mode << SPI_MODE_SHFT; in qcom_qspi_prepare_message()
504 mstr_cfg |= tx_data_oe_delay << TX_DATA_OE_DELAY_SHFT; in qcom_qspi_prepare_message()
505 mstr_cfg |= tx_data_delay << TX_DATA_DELAY_SHFT; in qcom_qspi_prepare_message()
506 mstr_cfg &= ~DMA_ENABLE; in qcom_qspi_prepare_message()
508 writel(mstr_cfg, ctrl->base + MSTR_CONFIG); in qcom_qspi_prepare_message()