Lines Matching refs:mdata
269 static void mtk_spi_reset(struct mtk_spi *mdata) in mtk_spi_reset() argument
274 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_reset()
276 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_reset()
278 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_reset()
280 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_reset()
285 struct mtk_spi *mdata = spi_master_get_devdata(spi->master); in mtk_spi_set_hw_cs_timing() local
296 setup = (delay * DIV_ROUND_UP(mdata->spi_clk_hz, 1000000)) / 1000; in mtk_spi_set_hw_cs_timing()
301 hold = (delay * DIV_ROUND_UP(mdata->spi_clk_hz, 1000000)) / 1000; in mtk_spi_set_hw_cs_timing()
306 inactive = (delay * DIV_ROUND_UP(mdata->spi_clk_hz, 1000000)) / 1000; in mtk_spi_set_hw_cs_timing()
309 reg_val = readl(mdata->base + SPI_CFG0_REG); in mtk_spi_set_hw_cs_timing()
310 if (mdata->dev_comp->enhance_timing) { in mtk_spi_set_hw_cs_timing()
336 writel(reg_val, mdata->base + SPI_CFG0_REG); in mtk_spi_set_hw_cs_timing()
341 reg_val = readl(mdata->base + SPI_CFG1_REG); in mtk_spi_set_hw_cs_timing()
344 writel(reg_val, mdata->base + SPI_CFG1_REG); in mtk_spi_set_hw_cs_timing()
356 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_hw_init() local
361 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_hw_init()
362 if (mdata->dev_comp->ipm_design) { in mtk_spi_hw_init()
398 if (mdata->dev_comp->enhance_timing) { in mtk_spi_hw_init()
420 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_hw_init()
423 if (mdata->dev_comp->need_pad_sel) in mtk_spi_hw_init()
424 writel(mdata->pad_sel[spi_get_chipselect(spi, 0)], in mtk_spi_hw_init()
425 mdata->base + SPI_PAD_SEL_REG); in mtk_spi_hw_init()
428 if (mdata->dev_comp->enhance_timing) { in mtk_spi_hw_init()
429 if (mdata->dev_comp->ipm_design) { in mtk_spi_hw_init()
430 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_hw_init()
434 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_hw_init()
436 reg_val = readl(mdata->base + SPI_CFG1_REG); in mtk_spi_hw_init()
440 writel(reg_val, mdata->base + SPI_CFG1_REG); in mtk_spi_hw_init()
443 reg_val = readl(mdata->base + SPI_CFG1_REG); in mtk_spi_hw_init()
447 writel(reg_val, mdata->base + SPI_CFG1_REG); in mtk_spi_hw_init()
464 struct mtk_spi *mdata = spi_master_get_devdata(spi->master); in mtk_spi_set_cs() local
469 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_set_cs()
472 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_set_cs()
475 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_set_cs()
476 mdata->state = MTK_SPI_IDLE; in mtk_spi_set_cs()
477 mtk_spi_reset(mdata); in mtk_spi_set_cs()
485 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_prepare_transfer() local
487 if (speed_hz < mdata->spi_clk_hz / 2) in mtk_spi_prepare_transfer()
488 div = DIV_ROUND_UP(mdata->spi_clk_hz, speed_hz); in mtk_spi_prepare_transfer()
494 if (mdata->dev_comp->enhance_timing) { in mtk_spi_prepare_transfer()
495 reg_val = readl(mdata->base + SPI_CFG2_REG); in mtk_spi_prepare_transfer()
502 writel(reg_val, mdata->base + SPI_CFG2_REG); in mtk_spi_prepare_transfer()
504 reg_val = readl(mdata->base + SPI_CFG0_REG); in mtk_spi_prepare_transfer()
510 writel(reg_val, mdata->base + SPI_CFG0_REG); in mtk_spi_prepare_transfer()
517 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_setup_packet() local
519 if (mdata->dev_comp->ipm_design) in mtk_spi_setup_packet()
521 mdata->xfer_len, in mtk_spi_setup_packet()
525 mdata->xfer_len, in mtk_spi_setup_packet()
528 packet_loop = mdata->xfer_len / packet_size; in mtk_spi_setup_packet()
530 reg_val = readl(mdata->base + SPI_CFG1_REG); in mtk_spi_setup_packet()
531 if (mdata->dev_comp->ipm_design) in mtk_spi_setup_packet()
538 writel(reg_val, mdata->base + SPI_CFG1_REG); in mtk_spi_setup_packet()
544 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_enable_transfer() local
546 cmd = readl(mdata->base + SPI_CMD_REG); in mtk_spi_enable_transfer()
547 if (mdata->state == MTK_SPI_IDLE) in mtk_spi_enable_transfer()
551 writel(cmd, mdata->base + SPI_CMD_REG); in mtk_spi_enable_transfer()
554 static int mtk_spi_get_mult_delta(struct mtk_spi *mdata, u32 xfer_len) in mtk_spi_get_mult_delta() argument
558 if (mdata->dev_comp->ipm_design) { in mtk_spi_get_mult_delta()
572 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_update_mdata_len() local
574 if (mdata->tx_sgl_len && mdata->rx_sgl_len) { in mtk_spi_update_mdata_len()
575 if (mdata->tx_sgl_len > mdata->rx_sgl_len) { in mtk_spi_update_mdata_len()
576 mult_delta = mtk_spi_get_mult_delta(mdata, mdata->rx_sgl_len); in mtk_spi_update_mdata_len()
577 mdata->xfer_len = mdata->rx_sgl_len - mult_delta; in mtk_spi_update_mdata_len()
578 mdata->rx_sgl_len = mult_delta; in mtk_spi_update_mdata_len()
579 mdata->tx_sgl_len -= mdata->xfer_len; in mtk_spi_update_mdata_len()
581 mult_delta = mtk_spi_get_mult_delta(mdata, mdata->tx_sgl_len); in mtk_spi_update_mdata_len()
582 mdata->xfer_len = mdata->tx_sgl_len - mult_delta; in mtk_spi_update_mdata_len()
583 mdata->tx_sgl_len = mult_delta; in mtk_spi_update_mdata_len()
584 mdata->rx_sgl_len -= mdata->xfer_len; in mtk_spi_update_mdata_len()
586 } else if (mdata->tx_sgl_len) { in mtk_spi_update_mdata_len()
587 mult_delta = mtk_spi_get_mult_delta(mdata, mdata->tx_sgl_len); in mtk_spi_update_mdata_len()
588 mdata->xfer_len = mdata->tx_sgl_len - mult_delta; in mtk_spi_update_mdata_len()
589 mdata->tx_sgl_len = mult_delta; in mtk_spi_update_mdata_len()
590 } else if (mdata->rx_sgl_len) { in mtk_spi_update_mdata_len()
591 mult_delta = mtk_spi_get_mult_delta(mdata, mdata->rx_sgl_len); in mtk_spi_update_mdata_len()
592 mdata->xfer_len = mdata->rx_sgl_len - mult_delta; in mtk_spi_update_mdata_len()
593 mdata->rx_sgl_len = mult_delta; in mtk_spi_update_mdata_len()
600 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_setup_dma_addr() local
602 if (mdata->tx_sgl) { in mtk_spi_setup_dma_addr()
604 mdata->base + SPI_TX_SRC_REG); in mtk_spi_setup_dma_addr()
606 if (mdata->dev_comp->dma_ext) in mtk_spi_setup_dma_addr()
608 mdata->base + SPI_TX_SRC_REG_64); in mtk_spi_setup_dma_addr()
612 if (mdata->rx_sgl) { in mtk_spi_setup_dma_addr()
614 mdata->base + SPI_RX_DST_REG); in mtk_spi_setup_dma_addr()
616 if (mdata->dev_comp->dma_ext) in mtk_spi_setup_dma_addr()
618 mdata->base + SPI_RX_DST_REG_64); in mtk_spi_setup_dma_addr()
629 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_fifo_transfer() local
631 mdata->cur_transfer = xfer; in mtk_spi_fifo_transfer()
632 mdata->xfer_len = min(MTK_SPI_MAX_FIFO_SIZE, xfer->len); in mtk_spi_fifo_transfer()
633 mdata->num_xfered = 0; in mtk_spi_fifo_transfer()
639 iowrite32_rep(mdata->base + SPI_TX_DATA_REG, xfer->tx_buf, cnt); in mtk_spi_fifo_transfer()
644 writel(reg_val, mdata->base + SPI_TX_DATA_REG); in mtk_spi_fifo_transfer()
658 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_dma_transfer() local
660 mdata->tx_sgl = NULL; in mtk_spi_dma_transfer()
661 mdata->rx_sgl = NULL; in mtk_spi_dma_transfer()
662 mdata->tx_sgl_len = 0; in mtk_spi_dma_transfer()
663 mdata->rx_sgl_len = 0; in mtk_spi_dma_transfer()
664 mdata->cur_transfer = xfer; in mtk_spi_dma_transfer()
665 mdata->num_xfered = 0; in mtk_spi_dma_transfer()
669 cmd = readl(mdata->base + SPI_CMD_REG); in mtk_spi_dma_transfer()
674 writel(cmd, mdata->base + SPI_CMD_REG); in mtk_spi_dma_transfer()
677 mdata->tx_sgl = xfer->tx_sg.sgl; in mtk_spi_dma_transfer()
679 mdata->rx_sgl = xfer->rx_sg.sgl; in mtk_spi_dma_transfer()
681 if (mdata->tx_sgl) { in mtk_spi_dma_transfer()
682 xfer->tx_dma = sg_dma_address(mdata->tx_sgl); in mtk_spi_dma_transfer()
683 mdata->tx_sgl_len = sg_dma_len(mdata->tx_sgl); in mtk_spi_dma_transfer()
685 if (mdata->rx_sgl) { in mtk_spi_dma_transfer()
686 xfer->rx_dma = sg_dma_address(mdata->rx_sgl); in mtk_spi_dma_transfer()
687 mdata->rx_sgl_len = sg_dma_len(mdata->rx_sgl); in mtk_spi_dma_transfer()
702 struct mtk_spi *mdata = spi_master_get_devdata(spi->master); in mtk_spi_transfer_one() local
706 if (mdata->dev_comp->ipm_design) { in mtk_spi_transfer_one()
712 writel(reg_val, mdata->base + SPI_CFG3_IPM_REG); in mtk_spi_transfer_one()
733 struct mtk_spi *mdata = spi_master_get_devdata(spi->master); in mtk_spi_setup() local
738 if (mdata->dev_comp->need_pad_sel && spi_get_csgpiod(spi, 0)) in mtk_spi_setup()
749 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_interrupt() local
750 struct spi_transfer *trans = mdata->cur_transfer; in mtk_spi_interrupt()
752 reg_val = readl(mdata->base + SPI_STATUS0_REG); in mtk_spi_interrupt()
754 mdata->state = MTK_SPI_PAUSED; in mtk_spi_interrupt()
756 mdata->state = MTK_SPI_IDLE; in mtk_spi_interrupt()
759 if (mdata->use_spimem) { in mtk_spi_interrupt()
760 complete(&mdata->spimem_done); in mtk_spi_interrupt()
766 cnt = mdata->xfer_len / 4; in mtk_spi_interrupt()
767 ioread32_rep(mdata->base + SPI_RX_DATA_REG, in mtk_spi_interrupt()
768 trans->rx_buf + mdata->num_xfered, cnt); in mtk_spi_interrupt()
769 remainder = mdata->xfer_len % 4; in mtk_spi_interrupt()
771 reg_val = readl(mdata->base + SPI_RX_DATA_REG); in mtk_spi_interrupt()
773 mdata->num_xfered + in mtk_spi_interrupt()
780 mdata->num_xfered += mdata->xfer_len; in mtk_spi_interrupt()
781 if (mdata->num_xfered == trans->len) { in mtk_spi_interrupt()
786 len = trans->len - mdata->num_xfered; in mtk_spi_interrupt()
787 mdata->xfer_len = min(MTK_SPI_MAX_FIFO_SIZE, len); in mtk_spi_interrupt()
791 cnt = mdata->xfer_len / 4; in mtk_spi_interrupt()
792 iowrite32_rep(mdata->base + SPI_TX_DATA_REG, in mtk_spi_interrupt()
793 trans->tx_buf + mdata->num_xfered, cnt); in mtk_spi_interrupt()
795 remainder = mdata->xfer_len % 4; in mtk_spi_interrupt()
799 trans->tx_buf + (cnt * 4) + mdata->num_xfered, in mtk_spi_interrupt()
801 writel(reg_val, mdata->base + SPI_TX_DATA_REG); in mtk_spi_interrupt()
810 if (mdata->tx_sgl) in mtk_spi_interrupt()
811 trans->tx_dma += mdata->xfer_len; in mtk_spi_interrupt()
812 if (mdata->rx_sgl) in mtk_spi_interrupt()
813 trans->rx_dma += mdata->xfer_len; in mtk_spi_interrupt()
815 if (mdata->tx_sgl && (mdata->tx_sgl_len == 0)) { in mtk_spi_interrupt()
816 mdata->tx_sgl = sg_next(mdata->tx_sgl); in mtk_spi_interrupt()
817 if (mdata->tx_sgl) { in mtk_spi_interrupt()
818 trans->tx_dma = sg_dma_address(mdata->tx_sgl); in mtk_spi_interrupt()
819 mdata->tx_sgl_len = sg_dma_len(mdata->tx_sgl); in mtk_spi_interrupt()
822 if (mdata->rx_sgl && (mdata->rx_sgl_len == 0)) { in mtk_spi_interrupt()
823 mdata->rx_sgl = sg_next(mdata->rx_sgl); in mtk_spi_interrupt()
824 if (mdata->rx_sgl) { in mtk_spi_interrupt()
825 trans->rx_dma = sg_dma_address(mdata->rx_sgl); in mtk_spi_interrupt()
826 mdata->rx_sgl_len = sg_dma_len(mdata->rx_sgl); in mtk_spi_interrupt()
830 if (!mdata->tx_sgl && !mdata->rx_sgl) { in mtk_spi_interrupt()
832 cmd = readl(mdata->base + SPI_CMD_REG); in mtk_spi_interrupt()
835 writel(cmd, mdata->base + SPI_CMD_REG); in mtk_spi_interrupt()
892 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_mem_setup_dma_xfer() local
894 writel((u32)(mdata->tx_dma & MTK_SPI_32BITS_MASK), in mtk_spi_mem_setup_dma_xfer()
895 mdata->base + SPI_TX_SRC_REG); in mtk_spi_mem_setup_dma_xfer()
897 if (mdata->dev_comp->dma_ext) in mtk_spi_mem_setup_dma_xfer()
898 writel((u32)(mdata->tx_dma >> 32), in mtk_spi_mem_setup_dma_xfer()
899 mdata->base + SPI_TX_SRC_REG_64); in mtk_spi_mem_setup_dma_xfer()
903 writel((u32)(mdata->rx_dma & MTK_SPI_32BITS_MASK), in mtk_spi_mem_setup_dma_xfer()
904 mdata->base + SPI_RX_DST_REG); in mtk_spi_mem_setup_dma_xfer()
906 if (mdata->dev_comp->dma_ext) in mtk_spi_mem_setup_dma_xfer()
907 writel((u32)(mdata->rx_dma >> 32), in mtk_spi_mem_setup_dma_xfer()
908 mdata->base + SPI_RX_DST_REG_64); in mtk_spi_mem_setup_dma_xfer()
916 struct mtk_spi *mdata = spi_master_get_devdata(mem->spi->master); in mtk_spi_transfer_wait() local
934 if (!wait_for_completion_timeout(&mdata->spimem_done, in mtk_spi_transfer_wait()
936 dev_err(mdata->dev, "spi-mem transfer timeout\n"); in mtk_spi_transfer_wait()
946 struct mtk_spi *mdata = spi_master_get_devdata(mem->spi->master); in mtk_spi_mem_exec_op() local
951 mdata->use_spimem = true; in mtk_spi_mem_exec_op()
952 reinit_completion(&mdata->spimem_done); in mtk_spi_mem_exec_op()
954 mtk_spi_reset(mdata); in mtk_spi_mem_exec_op()
958 reg_val = readl(mdata->base + SPI_CFG3_IPM_REG); in mtk_spi_mem_exec_op()
972 writel(0, mdata->base + SPI_CFG1_REG); in mtk_spi_mem_exec_op()
975 mdata->xfer_len = op->data.nbytes; in mtk_spi_mem_exec_op()
1005 writel(reg_val, mdata->base + SPI_CFG3_IPM_REG); in mtk_spi_mem_exec_op()
1015 mdata->use_spimem = false; in mtk_spi_mem_exec_op()
1039 mdata->tx_dma = dma_map_single(mdata->dev, tx_tmp_buf, in mtk_spi_mem_exec_op()
1041 if (dma_mapping_error(mdata->dev, mdata->tx_dma)) { in mtk_spi_mem_exec_op()
1058 mdata->rx_dma = dma_map_single(mdata->dev, in mtk_spi_mem_exec_op()
1062 if (dma_mapping_error(mdata->dev, mdata->rx_dma)) { in mtk_spi_mem_exec_op()
1068 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_mem_exec_op()
1072 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_mem_exec_op()
1084 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_mem_exec_op()
1088 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_mem_exec_op()
1092 dma_unmap_single(mdata->dev, mdata->rx_dma, in mtk_spi_mem_exec_op()
1102 dma_unmap_single(mdata->dev, mdata->tx_dma, in mtk_spi_mem_exec_op()
1106 mdata->use_spimem = false; in mtk_spi_mem_exec_op()
1121 struct mtk_spi *mdata; in mtk_spi_probe() local
1124 master = devm_spi_alloc_master(dev, sizeof(*mdata)); in mtk_spi_probe()
1140 mdata = spi_master_get_devdata(master); in mtk_spi_probe()
1141 mdata->dev_comp = device_get_match_data(dev); in mtk_spi_probe()
1143 if (mdata->dev_comp->enhance_timing) in mtk_spi_probe()
1146 if (mdata->dev_comp->must_tx) in mtk_spi_probe()
1148 if (mdata->dev_comp->ipm_design) in mtk_spi_probe()
1152 if (mdata->dev_comp->ipm_design) { in mtk_spi_probe()
1153 mdata->dev = dev; in mtk_spi_probe()
1155 init_completion(&mdata->spimem_done); in mtk_spi_probe()
1158 if (mdata->dev_comp->need_pad_sel) { in mtk_spi_probe()
1159 mdata->pad_num = of_property_count_u32_elems(dev->of_node, in mtk_spi_probe()
1161 if (mdata->pad_num < 0) in mtk_spi_probe()
1165 mdata->pad_sel = devm_kmalloc_array(dev, mdata->pad_num, in mtk_spi_probe()
1167 if (!mdata->pad_sel) in mtk_spi_probe()
1170 for (i = 0; i < mdata->pad_num; i++) { in mtk_spi_probe()
1173 i, &mdata->pad_sel[i]); in mtk_spi_probe()
1174 if (mdata->pad_sel[i] > MT8173_SPI_MAX_PAD_SEL) in mtk_spi_probe()
1177 i, mdata->pad_sel[i]); in mtk_spi_probe()
1182 mdata->base = devm_platform_ioremap_resource(pdev, 0); in mtk_spi_probe()
1183 if (IS_ERR(mdata->base)) in mtk_spi_probe()
1184 return PTR_ERR(mdata->base); in mtk_spi_probe()
1193 if (mdata->dev_comp->ipm_design) in mtk_spi_probe()
1198 mdata->parent_clk = devm_clk_get(dev, "parent-clk"); in mtk_spi_probe()
1199 if (IS_ERR(mdata->parent_clk)) in mtk_spi_probe()
1200 return dev_err_probe(dev, PTR_ERR(mdata->parent_clk), in mtk_spi_probe()
1203 mdata->sel_clk = devm_clk_get(dev, "sel-clk"); in mtk_spi_probe()
1204 if (IS_ERR(mdata->sel_clk)) in mtk_spi_probe()
1205 return dev_err_probe(dev, PTR_ERR(mdata->sel_clk), "failed to get sel-clk\n"); in mtk_spi_probe()
1207 mdata->spi_clk = devm_clk_get(dev, "spi-clk"); in mtk_spi_probe()
1208 if (IS_ERR(mdata->spi_clk)) in mtk_spi_probe()
1209 return dev_err_probe(dev, PTR_ERR(mdata->spi_clk), "failed to get spi-clk\n"); in mtk_spi_probe()
1211 mdata->spi_hclk = devm_clk_get_optional(dev, "hclk"); in mtk_spi_probe()
1212 if (IS_ERR(mdata->spi_hclk)) in mtk_spi_probe()
1213 return dev_err_probe(dev, PTR_ERR(mdata->spi_hclk), "failed to get hclk\n"); in mtk_spi_probe()
1215 ret = clk_set_parent(mdata->sel_clk, mdata->parent_clk); in mtk_spi_probe()
1219 ret = clk_prepare_enable(mdata->spi_hclk); in mtk_spi_probe()
1223 ret = clk_prepare_enable(mdata->spi_clk); in mtk_spi_probe()
1225 clk_disable_unprepare(mdata->spi_hclk); in mtk_spi_probe()
1229 mdata->spi_clk_hz = clk_get_rate(mdata->spi_clk); in mtk_spi_probe()
1231 if (mdata->dev_comp->no_need_unprepare) { in mtk_spi_probe()
1232 clk_disable(mdata->spi_clk); in mtk_spi_probe()
1233 clk_disable(mdata->spi_hclk); in mtk_spi_probe()
1235 clk_disable_unprepare(mdata->spi_clk); in mtk_spi_probe()
1236 clk_disable_unprepare(mdata->spi_hclk); in mtk_spi_probe()
1239 if (mdata->dev_comp->need_pad_sel) { in mtk_spi_probe()
1240 if (mdata->pad_num != master->num_chipselect) in mtk_spi_probe()
1243 mdata->pad_num, master->num_chipselect); in mtk_spi_probe()
1250 if (mdata->dev_comp->dma_ext) in mtk_spi_probe()
1278 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_remove() local
1281 if (mdata->use_spimem && !completion_done(&mdata->spimem_done)) in mtk_spi_remove()
1282 complete(&mdata->spimem_done); in mtk_spi_remove()
1293 mtk_spi_reset(mdata); in mtk_spi_remove()
1295 if (mdata->dev_comp->no_need_unprepare) { in mtk_spi_remove()
1296 clk_unprepare(mdata->spi_clk); in mtk_spi_remove()
1297 clk_unprepare(mdata->spi_hclk); in mtk_spi_remove()
1310 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_suspend() local
1317 clk_disable_unprepare(mdata->spi_clk); in mtk_spi_suspend()
1318 clk_disable_unprepare(mdata->spi_hclk); in mtk_spi_suspend()
1328 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_resume() local
1331 ret = clk_prepare_enable(mdata->spi_clk); in mtk_spi_resume()
1337 ret = clk_prepare_enable(mdata->spi_hclk); in mtk_spi_resume()
1340 clk_disable_unprepare(mdata->spi_clk); in mtk_spi_resume()
1347 clk_disable_unprepare(mdata->spi_clk); in mtk_spi_resume()
1348 clk_disable_unprepare(mdata->spi_hclk); in mtk_spi_resume()
1359 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_runtime_suspend() local
1361 if (mdata->dev_comp->no_need_unprepare) { in mtk_spi_runtime_suspend()
1362 clk_disable(mdata->spi_clk); in mtk_spi_runtime_suspend()
1363 clk_disable(mdata->spi_hclk); in mtk_spi_runtime_suspend()
1365 clk_disable_unprepare(mdata->spi_clk); in mtk_spi_runtime_suspend()
1366 clk_disable_unprepare(mdata->spi_hclk); in mtk_spi_runtime_suspend()
1375 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_runtime_resume() local
1378 if (mdata->dev_comp->no_need_unprepare) { in mtk_spi_runtime_resume()
1379 ret = clk_enable(mdata->spi_clk); in mtk_spi_runtime_resume()
1384 ret = clk_enable(mdata->spi_hclk); in mtk_spi_runtime_resume()
1387 clk_disable(mdata->spi_clk); in mtk_spi_runtime_resume()
1391 ret = clk_prepare_enable(mdata->spi_clk); in mtk_spi_runtime_resume()
1397 ret = clk_prepare_enable(mdata->spi_hclk); in mtk_spi_runtime_resume()
1400 clk_disable_unprepare(mdata->spi_clk); in mtk_spi_runtime_resume()