117 static inline u32 mchp_corespi_read(struct mchp_corespi *spi, unsigned int reg)  in mchp_corespi_read()  function
129 	u32 control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_disable()
143 	while ((i < fifo_max) && !(mchp_corespi_read(spi, REG_STATUS) & STATUS_RXFIFO_EMPTY)) {  in mchp_corespi_read_fifo()
144 		data = mchp_corespi_read(spi, REG_RX_DATA);  in mchp_corespi_read_fifo()
156 	u32 control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_enable_ints()
164 	u32 control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_disable_ints()
174 	u32 frames = mchp_corespi_read(spi, REG_FRAMESUP);  in mchp_corespi_set_xfer_size()
204 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_set_xfer_size()
219 	while ((i < fifo_max) && !(mchp_corespi_read(spi, REG_STATUS) & STATUS_TXFIFO_FULL)) {  in mchp_corespi_write_fifo()
231 	u32 frame_size = mchp_corespi_read(spi, REG_FRAME_SIZE);  in mchp_corespi_set_framesize()
241 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_set_framesize()
256 	reg = mchp_corespi_read(corespi, REG_SLAVE_SELECT);  in mchp_corespi_set_cs()
284 		reg = mchp_corespi_read(corespi, REG_SLAVE_SELECT);  in mchp_corespi_setup()
295 	u32 control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_init()
332 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_init()
344 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_set_clk_gen()
357 	u32 control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_set_mode()
395 	u32 intfield = mchp_corespi_read(spi, REG_MIS) & 0xf;  in mchp_corespi_interrupt()