34 	union cvmx_mpi_cfg mpi_cfg;  in octeon_spi_do_transfer()  local
50 	mpi_cfg.u64 = 0;  in octeon_spi_do_transfer()
52 	mpi_cfg.s.clkdiv = clkdiv;  in octeon_spi_do_transfer()
53 	mpi_cfg.s.cshi = (mode & SPI_CS_HIGH) ? 1 : 0;  in octeon_spi_do_transfer()
54 	mpi_cfg.s.lsbfirst = (mode & SPI_LSB_FIRST) ? 1 : 0;  in octeon_spi_do_transfer()
55 	mpi_cfg.s.wireor = (mode & SPI_3WIRE) ? 1 : 0;  in octeon_spi_do_transfer()
56 	mpi_cfg.s.idlelo = cpha != cpol;  in octeon_spi_do_transfer()
57 	mpi_cfg.s.cslate = cpha ? 1 : 0;  in octeon_spi_do_transfer()
58 	mpi_cfg.s.enable = 1;  in octeon_spi_do_transfer()
62 	mpi_cfg.u64 |= p->cs_enax;  in octeon_spi_do_transfer()
64 	if (mpi_cfg.u64 != p->last_cfg) {  in octeon_spi_do_transfer()
65 		p->last_cfg = mpi_cfg.u64;  in octeon_spi_do_transfer()
66 		writeq(mpi_cfg.u64, p->register_base + OCTEON_SPI_CFG(p));  in octeon_spi_do_transfer()