Lines Matching +full:cs +full:- +full:to +full:- +full:clk
1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Based on: spi-bcm2835.c
13 #include <linux/clk.h>
32 "time in us to run a transfer in polling mode - if zero no polling is used\n");
88 struct clk *clk; member
112 snprintf(name, sizeof(name), "spi-bcm2835aux-%s", dname); in bcm2835aux_debugfs_create()
116 bs->debugfs_dir = dir; in bcm2835aux_debugfs_create()
120 &bs->count_transfer_polling); in bcm2835aux_debugfs_create()
122 &bs->count_transfer_irq); in bcm2835aux_debugfs_create()
124 &bs->count_transfer_irq_after_poll); in bcm2835aux_debugfs_create()
129 debugfs_remove_recursive(bs->debugfs_dir); in bcm2835aux_debugfs_remove()
130 bs->debugfs_dir = NULL; in bcm2835aux_debugfs_remove()
145 return readl(bs->regs + reg); in bcm2835aux_rd()
151 writel(val, bs->regs + reg); in bcm2835aux_wr()
157 int count = min(bs->rx_len, 3); in bcm2835aux_rd_fifo()
160 if (bs->rx_buf) { in bcm2835aux_rd_fifo()
163 *bs->rx_buf++ = (data >> 16) & 0xff; in bcm2835aux_rd_fifo()
166 *bs->rx_buf++ = (data >> 8) & 0xff; in bcm2835aux_rd_fifo()
169 *bs->rx_buf++ = (data >> 0) & 0xff; in bcm2835aux_rd_fifo()
170 /* fallthrough - no default */ in bcm2835aux_rd_fifo()
173 bs->rx_len -= count; in bcm2835aux_rd_fifo()
174 bs->pending -= count; in bcm2835aux_rd_fifo()
184 /* gather up to 3 bytes to write to the FIFO */ in bcm2835aux_wr_fifo()
185 count = min(bs->tx_len, 3); in bcm2835aux_wr_fifo()
188 byte = bs->tx_buf ? *bs->tx_buf++ : 0; in bcm2835aux_wr_fifo()
189 data |= byte << (8 * (2 - i)); in bcm2835aux_wr_fifo()
192 /* and set the variable bit-length */ in bcm2835aux_wr_fifo()
196 bs->tx_len -= count; in bcm2835aux_wr_fifo()
197 bs->pending += count; in bcm2835aux_wr_fifo()
199 /* write to the correct TX-register */ in bcm2835aux_wr_fifo()
200 if (bs->tx_len) in bcm2835aux_wr_fifo()
218 /* check if we have data to read */ in bcm2835aux_spi_transfer_helper()
219 for (; bs->rx_len && (stat & BCM2835_AUX_SPI_STAT_RX_LVL); in bcm2835aux_spi_transfer_helper()
223 /* check if we have data to write */ in bcm2835aux_spi_transfer_helper()
224 while (bs->tx_len && in bcm2835aux_spi_transfer_helper()
225 (bs->pending < 12) && in bcm2835aux_spi_transfer_helper()
245 if (!bs->tx_len) { in bcm2835aux_spi_interrupt()
247 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1] | in bcm2835aux_spi_interrupt()
252 if (!bs->rx_len) { in bcm2835aux_spi_interrupt()
253 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1]); in bcm2835aux_spi_interrupt()
267 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1] | in __bcm2835aux_spi_transfer_one_irq()
282 bs->count_transfer_irq++; in bcm2835aux_spi_transfer_one_irq()
285 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1]); in bcm2835aux_spi_transfer_one_irq()
286 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL0, bs->cntl[0]); in bcm2835aux_spi_transfer_one_irq()
289 while ((bs->tx_len) && in bcm2835aux_spi_transfer_one_irq()
290 (bs->pending < 12) && in bcm2835aux_spi_transfer_one_irq()
308 bs->count_transfer_polling++; in bcm2835aux_spi_transfer_one_poll()
311 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1]); in bcm2835aux_spi_transfer_one_poll()
312 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL0, bs->cntl[0]); in bcm2835aux_spi_transfer_one_poll()
314 /* set the timeout to at least 2 jiffies */ in bcm2835aux_spi_transfer_one_poll()
318 while (bs->rx_len) { in bcm2835aux_spi_transfer_one_poll()
323 /* there is still data pending to read check the timeout */ in bcm2835aux_spi_transfer_one_poll()
324 if (bs->rx_len && time_after(jiffies, timeout)) { in bcm2835aux_spi_transfer_one_poll()
325 dev_dbg_ratelimited(&spi->dev, in bcm2835aux_spi_transfer_one_poll()
326 … "timeout period reached: jiffies: %lu remaining tx/rx: %d/%d - falling back to interrupt mode\n", in bcm2835aux_spi_transfer_one_poll()
327 jiffies - timeout, in bcm2835aux_spi_transfer_one_poll()
328 bs->tx_len, bs->rx_len); in bcm2835aux_spi_transfer_one_poll()
329 /* forward to interrupt handler */ in bcm2835aux_spi_transfer_one_poll()
330 bs->count_transfer_irq_after_poll++; in bcm2835aux_spi_transfer_one_poll()
348 /* calculate the registers to handle in bcm2835aux_spi_transfer_one()
357 spi_hz = tfr->speed_hz; in bcm2835aux_spi_transfer_one()
358 clk_hz = clk_get_rate(bs->clk); in bcm2835aux_spi_transfer_one()
363 speed = DIV_ROUND_UP(clk_hz, 2 * spi_hz) - 1; in bcm2835aux_spi_transfer_one()
370 bs->cntl[0] &= ~(BCM2835_AUX_SPI_CNTL0_SPEED); in bcm2835aux_spi_transfer_one()
372 bs->cntl[0] |= speed << BCM2835_AUX_SPI_CNTL0_SPEED_SHIFT; in bcm2835aux_spi_transfer_one()
374 tfr->effective_speed_hz = clk_hz / (2 * (speed + 1)); in bcm2835aux_spi_transfer_one()
377 bs->tx_buf = tfr->tx_buf; in bcm2835aux_spi_transfer_one()
378 bs->rx_buf = tfr->rx_buf; in bcm2835aux_spi_transfer_one()
379 bs->tx_len = tfr->len; in bcm2835aux_spi_transfer_one()
380 bs->rx_len = tfr->len; in bcm2835aux_spi_transfer_one()
381 bs->pending = 0; in bcm2835aux_spi_transfer_one()
385 * transferred - in our case the chunk size is 3 bytes, so we in bcm2835aux_spi_transfer_one()
386 * approximate this by 9 cycles/byte. This is used to find the number in bcm2835aux_spi_transfer_one()
391 byte_limit = hz_per_byte ? tfr->effective_speed_hz / hz_per_byte : 1; in bcm2835aux_spi_transfer_one()
394 if (tfr->len < byte_limit) in bcm2835aux_spi_transfer_one()
404 struct spi_device *spi = msg->spi; in bcm2835aux_spi_prepare_message()
407 bs->cntl[0] = BCM2835_AUX_SPI_CNTL0_ENABLE | in bcm2835aux_spi_prepare_message()
410 bs->cntl[1] = BCM2835_AUX_SPI_CNTL1_MSBF_IN; in bcm2835aux_spi_prepare_message()
413 if (spi->mode & SPI_CPOL) { in bcm2835aux_spi_prepare_message()
414 bs->cntl[0] |= BCM2835_AUX_SPI_CNTL0_CPOL; in bcm2835aux_spi_prepare_message()
415 bs->cntl[0] |= BCM2835_AUX_SPI_CNTL0_OUT_RISING; in bcm2835aux_spi_prepare_message()
417 bs->cntl[0] |= BCM2835_AUX_SPI_CNTL0_IN_RISING; in bcm2835aux_spi_prepare_message()
419 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1]); in bcm2835aux_spi_prepare_message()
420 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL0, bs->cntl[0]); in bcm2835aux_spi_prepare_message()
445 /* sanity check for native cs */ in bcm2835aux_spi_setup()
446 if (spi->mode & SPI_NO_CS) in bcm2835aux_spi_setup()
452 /* for dt-backwards compatibility: only support native on CS0 in bcm2835aux_spi_setup()
453 * known things not supported with broken native CS: in bcm2835aux_spi_setup()
454 * * multiple chip-selects: cs0-cs2 are all in bcm2835aux_spi_setup()
457 * * SPI_CS_HIGH: cs are always asserted low in bcm2835aux_spi_setup()
458 * * cs_change: cs is deasserted after each spi_transfer in bcm2835aux_spi_setup()
459 * * cs_delay_usec: cs is always deasserted one SCK cycle in bcm2835aux_spi_setup()
463 dev_warn(&spi->dev, in bcm2835aux_spi_setup()
464 "Native CS is not supported - please configure cs-gpio in device-tree\n"); in bcm2835aux_spi_setup()
469 dev_warn(&spi->dev, "Native CS is not working for cs > 0\n"); in bcm2835aux_spi_setup()
471 return -EINVAL; in bcm2835aux_spi_setup()
481 host = devm_spi_alloc_host(&pdev->dev, sizeof(*bs)); in bcm2835aux_spi_probe()
483 return -ENOMEM; in bcm2835aux_spi_probe()
486 host->mode_bits = (SPI_CPOL | SPI_CS_HIGH | SPI_NO_CS); in bcm2835aux_spi_probe()
487 host->bits_per_word_mask = SPI_BPW_MASK(8); in bcm2835aux_spi_probe()
488 /* even though the driver never officially supported native CS in bcm2835aux_spi_probe()
489 * allow a single native CS for legacy DT support purposes when in bcm2835aux_spi_probe()
490 * no cs-gpio is configured. in bcm2835aux_spi_probe()
491 * Known limitations for native cs are: in bcm2835aux_spi_probe()
492 * * multiple chip-selects: cs0-cs2 are all simultaniously asserted in bcm2835aux_spi_probe()
493 * whenever there is a transfer - this even includes SPI_NO_CS in bcm2835aux_spi_probe()
494 * * SPI_CS_HIGH: is ignores - cs are always asserted low in bcm2835aux_spi_probe()
495 * * cs_change: cs is deasserted after each spi_transfer in bcm2835aux_spi_probe()
496 * * cs_delay_usec: cs is always deasserted one SCK cycle after in bcm2835aux_spi_probe()
499 host->num_chipselect = 1; in bcm2835aux_spi_probe()
500 host->setup = bcm2835aux_spi_setup; in bcm2835aux_spi_probe()
501 host->transfer_one = bcm2835aux_spi_transfer_one; in bcm2835aux_spi_probe()
502 host->handle_err = bcm2835aux_spi_handle_err; in bcm2835aux_spi_probe()
503 host->prepare_message = bcm2835aux_spi_prepare_message; in bcm2835aux_spi_probe()
504 host->unprepare_message = bcm2835aux_spi_unprepare_message; in bcm2835aux_spi_probe()
505 host->dev.of_node = pdev->dev.of_node; in bcm2835aux_spi_probe()
506 host->use_gpio_descriptors = true; in bcm2835aux_spi_probe()
511 bs->regs = devm_platform_ioremap_resource(pdev, 0); in bcm2835aux_spi_probe()
512 if (IS_ERR(bs->regs)) in bcm2835aux_spi_probe()
513 return PTR_ERR(bs->regs); in bcm2835aux_spi_probe()
515 bs->clk = devm_clk_get(&pdev->dev, NULL); in bcm2835aux_spi_probe()
516 if (IS_ERR(bs->clk)) { in bcm2835aux_spi_probe()
517 err = PTR_ERR(bs->clk); in bcm2835aux_spi_probe()
518 dev_err(&pdev->dev, "could not get clk: %d\n", err); in bcm2835aux_spi_probe()
522 bs->irq = platform_get_irq(pdev, 0); in bcm2835aux_spi_probe()
523 if (bs->irq < 0) in bcm2835aux_spi_probe()
524 return bs->irq; in bcm2835aux_spi_probe()
527 err = clk_prepare_enable(bs->clk); in bcm2835aux_spi_probe()
529 dev_err(&pdev->dev, "could not prepare clock: %d\n", err); in bcm2835aux_spi_probe()
534 clk_hz = clk_get_rate(bs->clk); in bcm2835aux_spi_probe()
536 dev_err(&pdev->dev, "clock returns 0 Hz\n"); in bcm2835aux_spi_probe()
537 err = -ENODEV; in bcm2835aux_spi_probe()
541 /* reset SPI-HW block */ in bcm2835aux_spi_probe()
544 err = devm_request_irq(&pdev->dev, bs->irq, in bcm2835aux_spi_probe()
547 dev_name(&pdev->dev), host); in bcm2835aux_spi_probe()
549 dev_err(&pdev->dev, "could not request IRQ: %d\n", err); in bcm2835aux_spi_probe()
555 dev_err(&pdev->dev, "could not register SPI host: %d\n", err); in bcm2835aux_spi_probe()
559 bcm2835aux_debugfs_create(bs, dev_name(&pdev->dev)); in bcm2835aux_spi_probe()
564 clk_disable_unprepare(bs->clk); in bcm2835aux_spi_probe()
580 clk_disable_unprepare(bs->clk); in bcm2835aux_spi_remove()
584 { .compatible = "brcm,bcm2835-aux-spi", },
591 .name = "spi-bcm2835aux",